root/platform/sx110is/sub/100b/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. debug_my_blink
  2. taskCreateHook
  3. CreateTask_spytask
  4. boot
  5. loc_FFC001A4_my
  6. sub_FFC00F98_my
  7. sub_FFC04D90_my
  8. taskcreate_Startup_my
  9. task_Startup_my
  10. init_file_modules_task
  11. sub_FFC5FB6C_my
  12. sub_FFC44A3C_my
  13. sub_FFC44878_my
  14. sub_FFC44608_my
  15. JogDial_task_my

   1 //sx110.100b
   2 
   3 #include "lolevel.h"
   4 #include "platform.h"
   5 #include "core.h"
   6 #include "dryos31.h"
   7 
   8 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
   9 
  10 #define DP (void*)0xC02200C4                                    // direct-print (blue)
  11 #define LED_PR  0xc02200C4
  12 #define LED_RED 0xc02200C8
  13 #define LED_GRN 0xc02200CC
  14 #define LED_PWR 0xc02200D0
  15 
  16 #define DELAY 800000
  17 
  18 void debug_my_blink()
  19 {
  20         volatile long *p = (void*)DP;                   // turned off later, so assumed to be power
  21         volatile long *p2 = (void*)LED_RED;                     // turned off later, so assumed to be power
  22         int counter;
  23 
  24         // DEBUG: blink led
  25         //led on
  26         counter = DELAY; 
  27         *p = 0x46; 
  28         while (counter--) { asm("nop\n nop\n"); };
  29         *p2 = 0x46;
  30         //led off
  31         counter = DELAY; 
  32         *p = 0x44; 
  33         while (counter--) { asm("nop\n nop\n"); };
  34         *p2= 0x44;
  35 }
  36 
  37 //js
  38 const char * const new_sa = &_end;
  39 
  40 extern void task_PhySw();
  41 extern void task_CaptSeq();
  42 extern void task_InitFileModules();
  43 extern void task_MovieRecord();
  44 extern void task_ExpDrv();
  45 extern void task_FileWrite();
  46 extern void task_RotaryEncoder();
  47 void JogDial_task_my(void);
  48 
  49 void taskCreateHook(context_t **context) { 
  50 
  51     task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  52 
  53     if(tcb->entry == (void*)task_CaptSeq)           tcb->entry = (void*)capt_seq_task;
  54     if(tcb->entry == (void*)task_PhySw)             tcb->entry = (void*)mykbd_task;
  55     if(tcb->entry == (void*)task_RotaryEncoder)     tcb->entry = (void*)JogDial_task_my;
  56     if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  57     if(tcb->entry == (void*)task_MovieRecord)       tcb->entry = (void*)movie_record_task;
  58     if(tcb->entry == (void*)task_ExpDrv)            tcb->entry = (void*)exp_drv_task;
  59     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  60 }
  61 
  62 void CreateTask_spytask() {
  63         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  64 };
  65 
  66 //jse
  67 
  68 void boot();
  69 
  70 void boot() { //#fs
  71                 long *canon_data_src = (void*)0xFFEFF5F8; 
  72                 long *canon_data_dst = (void*)0x1900;
  73                 long canon_data_len = 0xE6B4 - 0x1900;          // data_end - data_start
  74                 long *canon_bss_start = (void*)0xE6B4;          // just after data
  75                 long canon_bss_len = 0xA2728 - 0xE6B4;
  76 
  77     long i;
  78 
  79     // enable caches and write buffer... this is a carryover from old dryos ports, may not be useful
  80     asm volatile (
  81         "MRC     p15, 0, R0,c1,c0\n"
  82         "ORR     R0, R0, #0x1000\n"
  83         "ORR     R0, R0, #4\n"
  84         "ORR     R0, R0, #1\n"
  85         "MCR     p15, 0, R0,c1,c0\n"
  86     :::"r0");
  87 
  88     for(i=0;i<canon_data_len/4;i++)
  89         canon_data_dst[i]=canon_data_src[i];
  90 
  91     for(i=0;i<canon_bss_len/4;i++)
  92         canon_bss_start[i]=0;
  93 
  94 // done below
  95 //    *(int*)(0x2478+0x4) = (*(int*)0xC02200B8)&1 ? 0x100000: 0x200000; // replacement of sub_FFC111A4  //from taskcreate_startup to sub_FFC111A4 and there to sub_FFC35CC4
  96         
  97     // jump to init-sequence that follows the data-copy-routine
  98     asm volatile ("B    loc_FFC001A4_my\n");    // <---------------
  99 }; //#fe
 100 //JSE
 101 
 102 //JS
 103 void __attribute__((naked,noinline)) loc_FFC001A4_my() {
 104         *(int*)0x1930=(int)taskCreateHook;
 105         *(int*)0x1934=(int)taskCreateHook;
 106     *(int*)(0x2478+0x4) = (*(int*)0xC02200B8)&1 ? 0x100000: 0x200000; // replacement of sub_FFC111A4    //from taskcreate_startup to sub_FFC111A4 and there to sub_FFC35CC4
 107         asm volatile (
 108                 "loc_FFC001A4:\n"               
 109                         "LDR    R0, =0xFFC0021C\n"
 110                         "MOV    R1, #0\n"
 111                         "LDR    R3, =0xFFC00254\n"
 112                 "loc_FFC001B0:\n"               
 113                         "CMP    R0, R3\n"
 114                         "LDRCC  R2, [R0],#4\n"
 115                         "STRCC  R2, [R1],#4\n"
 116                         "BCC    loc_FFC001B0\n"
 117                         "LDR    R0, =0xFFC00254\n"
 118                         "MOV    R1, #0x4B0\n"
 119                         "LDR    R3, =0xFFC00468\n"
 120                 "loc_FFC001CC:\n"               
 121                         "CMP    R0, R3\n"
 122                         "LDRCC  R2, [R0],#4\n"
 123                         "STRCC  R2, [R1],#4\n"
 124                         "BCC    loc_FFC001CC\n"
 125                         "MOV    R0, #0xD2\n"
 126                         "MSR    CPSR_cxsf, R0\n"
 127                         "MOV    SP, #0x1000\n"
 128                         "MOV    R0, #0xD3\n"
 129                         "MSR    CPSR_cxsf, R0\n"
 130                         "MOV    SP, #0x1000\n"
 131                         "LDR    R0, =loc_FFC00210\n"
 132                         "LDR    R2, =0xEEEEEEEE\n"
 133                         "MOV    R3, #0x1000\n"
 134                                 
 135                 "loc_FFC00200:\n"               
 136                         "CMP    R0, R3\n"
 137                         "STRCC  R2, [R0],#4\n"
 138                         "BCC    loc_FFC00200\n"
 139                         "BL     sub_FFC00F98_my\n"      // <---------- changed
 140                                 
 141                 "loc_FFC00210:\n"               
 142                         "ANDEQ  R0, R0, R4,ASR#13\n"
 143                                 
 144                 "loc_FFC00214:\n"               
 145                                 
 146                         "ANDEQ  R0, R0, R0,ROR R6\n"
 147                                 
 148                 "loc_FFC00218:\n"               
 149                         "ANDEQ  R0, R0, R4,ROR R6\n"
 150                                 
 151                 "loc_FFC0021C:\n"               
 152                         "NOP\n" 
 153                         "LDR    PC, =0xFFC00468\n"
 154         );
 155 }
 156 //JSE
 157 
 158 //JS
 159 
 160 void __attribute__((naked,noinline)) sub_FFC00F98_my() {
 161 
 162       asm volatile (
 163                         "STR    LR, [SP,#-4]!\n"        //ROM:FFC00F98                 STR     LR, [SP,#unk_FFFFFFFC]!
 164                         "SUB    SP, SP, #0x74\n"
 165                         "MOV    R0, SP\n"
 166                         "MOV    R1, #0x74\n"
 167                         "BL     sub_FFE8F154\n"
 168                         "MOV    R0, #0x53000\n"
 169                         "STR    R0, [SP,#0x4]\n"
 170 
 171 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 172                         "LDR    R0, =0xA2728\n"         // <--- removed
 173 #else
 174                         "LDR     R0, =new_sa\n"         // <--- added
 175                         "LDR     R0, [R0]\n"           // <--- added
 176 #endif
 177                         "LDR    R2, =0x279C00\n"
 178                         "LDR    R1, =0x2724A8\n"
 179                         "STR    R0, [SP,#0x8]\n"
 180                         "SUB    R0, R1, R0\n"
 181                         "ADD    R3, SP, #0xC\n"
 182                         "STR    R2, [SP,#0x0]\n"
 183                         "STMIA  R3, {R0-R2}\n"
 184                         "MOV    R0, #0x22\n"
 185                         "STR    R0, [SP,#0x18]\n"
 186                         "MOV    R0, #0x68\n"
 187                         "STR    R0, [SP,#0x1C]\n"
 188                         "LDR    R0, =0x19B\n"
 189                         "LDR    R1, =sub_FFC04D90_my\n" // <-------------- changed
 190                         "STR    R0, [SP,#0x20]\n"
 191                         "MOV    R0, #0x96\n"
 192                         "STR    R0, [SP,#0x24]\n"
 193                         "MOV    R0, #0x78\n"
 194                         "STR    R0, [SP,#0x28]\n"
 195                         "MOV    R0, #0x64\n"
 196                         "STR    R0, [SP,#0x2C]\n"
 197                         "MOV    R0, #0\n"
 198                         "STR    R0, [SP,#0x30]\n"
 199                         "STR    R0, [SP,#0x34]\n"
 200                         "MOV    R0, #0x10\n"
 201                         "STR    R0, [SP,#0x5C]\n"
 202                         "MOV    R0, #0x800\n"
 203                         "STR    R0, [SP,#0x60]\n"
 204                         "MOV    R0, #0xA0\n"
 205                         "STR    R0, [SP,#0x64]\n"
 206                         "MOV    R0, #0x280\n"
 207                         "STR    R0, [SP,#0x68]\n"
 208                         "MOV    R0, SP\n"
 209                         "MOV    R2, #0\n"
 210                         "BL     sub_FFC02D3C\n"
 211                         "ADD    SP, SP, #0x74\n"
 212                         "LDR    PC, [SP],#4\n"
 213                         
 214         );
 215 }
 216 //JSE
 217 
 218 void __attribute__((naked,noinline)) sub_FFC04D90_my() {
 219 asm volatile (
 220                         "STMFD  SP!, {R4,LR}\n"
 221                         "BL     sub_FFC00944\n"
 222                         "BL     sub_FFC09708\n" //dmsetup
 223                         "CMP    R0, #0\n"
 224                         "LDRLT  R0, =0xFFC04EA4\n"
 225                         "BLLT   sub_FFC04E84\n"
 226                         "BL     sub_FFC049B8\n"
 227                         "CMP    R0, #0\n"
 228                         "LDRLT  R0, =0xFFC04EAC\n"
 229                         "BLLT   sub_FFC04E84\n"
 230                         "LDR    R0, =0xFFC04EBC\n"
 231                         "BL     sub_FFC04AA0\n"         //termDeviceCreate
 232                         "CMP    R0, #0\n"
 233                         "LDRLT  R0, =0xFFC04EC4\n"
 234                         "BLLT   sub_FFC04E84\n"
 235                         "LDR    R0, =0xFFC04EBC\n"
 236                         "BL     sub_FFC0354C\n" //stdioSetup
 237                         "CMP    R0, #0\n"
 238                         "LDRLT  R0, =0xFFC04ED8\n"
 239                         "BLLT   sub_FFC04E84\n"
 240                         "BL     sub_FFC09290    \n"             //stdlibSetup
 241                         "CMP    R0, #0\n"
 242                         "LDRLT  R0, =0xFFC04EE4\n"
 243                         "BLLT   sub_FFC04E84\n"
 244                         "BL     sub_FFC0147C\n"
 245                         "CMP    R0, #0\n"
 246                         "LDRLT  R0, =0xFFC04EF0\n"
 247                         "BLLT   sub_FFC04E84\n"
 248                         "LDMFD  SP!, {R4,LR}\n"
 249                         "B      taskcreate_Startup_my\n"                // <--------------- changed, 0xFFC0CD6C in fw
 250         );
 251 };
 252 //JSE
 253 
 254 //JS
 255 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 256                          asm volatile (
 257                         "STMFD  SP!, {R3,LR}\n"
 258                         "BL     sub_FFC1119C\n"         //j_null0x245
 259                         "BL     sub_FFC19194\n"
 260                         "CMP    R0, #0\n"
 261                         "BNE    loc_FFC0CDA0\n"
 262                         "BL     sub_FFC11198\n"
 263                         "CMP    R0, #0\n"
 264                         "BNE    loc_FFC0CDA0\n"
 265                         "LDR    R1, =0xC0220000\n"
 266                         "MOV    R0, #0x44\n"
 267                         "STR    R0, [R1,#0x54]\n"
 268                         "STR    R0, [R1,#0x4C]\n"
 269                 "loc_FFC0CD9C:\n"               
 270                         "B      loc_FFC0CD9C\n"
 271                 "loc_FFC0CDA0:\n"
 272 //                      "BL     sub_FFC111A4\n"         // removed for correct power-on on "on/off" button.
 273                         "BL     sub_FFC111A0\n"                         //j_null0x246
 274                         "BL     sub_FFC17524\n"
 275                         "LDR    R1, =0x2CE000\n"
 276                         "MOV    R0, #0\n"
 277                         "BL     sub_FFC1776C\n"
 278                         "BL     sub_FFC17718\n"
 279                         "MOV    R3, #0\n"
 280                         "STR    R3, [SP]\n"
 281                         "LDR    R3, =task_Startup_my\n"         // <----------- changed, 0x:FFC0CD10 in fw
 282                         "MOV    R2, #0\n"
 283                         "MOV    R1, #0x19\n"
 284                         "LDR    R0, =0xFFC0CDE8\n"
 285                         "BL     sub_FFC0B8C0\n"
 286                         "MOV    R0, #0\n"
 287                         "LDMFD  SP!, {R12,PC}\n"
 288      );
 289 }
 290 //JSE
 291 //JS
 292 void __attribute__((naked,noinline)) task_Startup_my() {
 293      asm volatile (
 294                         "STMFD  SP!, {R4,LR}\n"
 295                         "BL     sub_FFC0515C\n"         //taskcreate_ClockSave
 296                         "BL     sub_FFC12308\n"
 297                         "BL     sub_FFC10BE0\n"
 298                         "BL     sub_FFC191D4\n"                         //j_null0x249
 299                         "BL     sub_FFC1939C\n"
 300 //                      "BL     sub_FFC1925C\n" //start diskboot.bin, //StartDiskboot --> removed
 301                         "BL     sub_FFC19554\n"
 302                         "BL     sub_FFC193EC\n"
 303                         "BL     sub_FFC16818\n"
 304                         "BL     sub_FFC19558\n"
 305             "BL         CreateTask_spytask\n"    // <--- function added
 306                         "BL     sub_FFC11094\n"         //taskcreate_PhySw
 307                         "BL     sub_FFC14270\n"
 308                         "BL     sub_FFC19570\n"
 309                         "BL     sub_FFC0FC08\n"         //null0x2
 310                         "BL     sub_FFC10530\n"
 311                         "BL     sub_FFC18F74\n"         //taskcreate_Bye
 312                         "BL     sub_FFC10B90\n"
 313                         "BL     sub_FFC1044C\n"
 314                         "BL     sub_FFC1A008\n"
 315                         "BL     sub_FFC10424\n"
 316                         "LDMFD  SP!, {R4,LR}\n"
 317                         "B      sub_FFC0505C\n"
 318      );
 319 }
 320 //JSE
 321 
 322 //JS
 323 
 324 void __attribute__((naked,noinline)) init_file_modules_task() {
 325  asm volatile(
 326                         "STMFD  SP!, {R4-R6,LR}\n"
 327                         "BL     sub_FFC5FB40\n"
 328                         "LDR    R5, =0x5006\n"
 329                         "MOVS   R4, R0\n"
 330                         "MOVNE  R1, #0\n"
 331                         "MOVNE  R0, R5\n"
 332                         "BLNE   sub_FFC61C00\n"         //eventproc_export_PostLogicalEventToUI
 333                         "BL     sub_FFC5FB6C_my\n"                      // <---------- changed
 334             "BL         core_spytask_can_start\n"      // CHDK: Set "it's-save-to-start"-Flag for spytask
 335                         "CMP    R4, #0\n"
 336                         "MOVEQ  R0, R5\n"
 337                         "LDMEQFD        SP!, {R4-R6,LR}\n"
 338                         "MOVEQ  R1, #0\n"
 339                         "BEQ    sub_FFC61C00\n"         //eventproc_export_PostLogicalEventToUI
 340                         "LDMFD  SP!, {R4-R6,PC}\n"
 341  );
 342 }
 343 // JSE
 344 
 345 //JS
 346 void __attribute__((naked,noinline)) sub_FFC5FB6C_my() {
 347  asm volatile(
 348                         "STMFD  SP!, {R4,LR}\n"
 349                         "BL     sub_FFC44A3C_my\n"              // <--------- changed
 350                         "BL     sub_FFCF7C2C\n"                 //null0x106
 351                         "LDR    R4, =0x5678\n"
 352                         "LDR    R0, [R4,#4]\n"
 353                         "CMP    R0, #0\n"
 354                         "BNE    loc_FFC5FBA0\n"
 355                         "BL     sub_FFC43F04\n"
 356                         "BL     sub_FFCEDA20\n"
 357                         "BL     sub_FFC43F04\n"
 358                         "BL     sub_FFC3FDD8\n"
 359                         "BL     sub_FFC43E04\n"
 360                         "BL     sub_FFCEDAEC\n"
 361                 "loc_FFC5FBA0:\n"               
 362                         "MOV    R0, #1\n"
 363                         "STR    R0, [R4]\n"
 364                         "LDMFD  SP!, {R4,PC}\n"
 365  );
 366 }
 367 //JSE
 368 
 369 //JS
 370 void __attribute__((naked,noinline)) sub_FFC44A3C_my() {
 371  asm volatile(
 372                         "STMFD  SP!, {R4-R6,LR}\n"
 373                         "MOV    R6, #0\n"
 374                         "MOV    R0, R6\n"
 375                         "BL     sub_FFC444FC\n"
 376                         "LDR    R4, =0x17E00\n"
 377                         "MOV    R5, #0\n"
 378                         "LDR    R0, [R4,#0x38]\n"
 379                         "BL     sub_FFC44F5C\n"
 380                         "CMP    R0, #0\n"
 381                         "LDREQ  R0, =0x28D0\n"
 382                         "STREQ  R5, [R0,#0x10]\n"
 383                         "STREQ  R5, [R0,#0x14]\n"
 384                         "STREQ  R5, [R0,#0x18]\n"
 385                         "MOV    R0, R6\n"
 386                         "BL     sub_FFC4453C\n"
 387                         "MOV    R0, R6\n"
 388                         "BL     sub_FFC44878_my\n"              // <--------- changed
 389                         "MOV    R5, R0\n"
 390                         "MOV    R0, R6\n"
 391                         "BL     sub_FFC448E4\n"
 392                         "LDR    R1, [R4,#0x3C]\n"
 393                         "AND    R2, R5, R0\n"
 394                         "CMP    R1, #0\n"
 395                         "MOV    R0, #0\n"
 396                         "MOVEQ  R0, #0x80000001\n"
 397                         "BEQ    loc_FFC44AD0\n"
 398                         "LDR    R3, [R4,#0x2C]\n"
 399                         "CMP    R3, #2\n"
 400                         "MOVEQ  R0, #4\n"
 401                         "CMP    R1, #5\n"
 402                         "ORRNE  R0, R0, #1\n"
 403                         "BICEQ  R0, R0, #1\n"
 404                         "CMP    R2, #0\n"
 405                         "BICEQ  R0, R0, #2\n"
 406                         "ORREQ  R0, R0, #0x80000000\n"
 407                         "BICNE  R0, R0, #0x80000000\n"
 408                         "ORRNE  R0, R0, #2\n"
 409                                 
 410                 "loc_FFC44AD0:\n"               
 411                         "STR    R0, [R4,#0x40]\n"
 412                         "LDMFD  SP!, {R4-R6,PC}\n"
 413  );
 414 }
 415 //JSE
 416 
 417 //JS
 418 void __attribute__((naked,noinline)) sub_FFC44878_my() {
 419  asm volatile(
 420                         "STMFD  SP!, {R4-R6,LR}\n"
 421                         "LDR    R5, =0x28D0\n"
 422                         "MOV    R6, R0\n"
 423                         "LDR    R0, [R5,#0x14]\n"
 424                         "CMP    R0, #0\n"
 425                         "MOVNE  R0, #1\n"
 426                         "LDMNEFD        SP!, {R4-R6,PC}\n"
 427                         "MOV    R0, #0x17\n"
 428                         "MUL    R1, R0, R6\n"
 429                         "LDR    R0, =0x17E00\n"
 430                         "ADD    R4, R0, R1,LSL#2\n"
 431                         "LDR    R0, [R4,#0x38]\n"
 432                         "MOV    R1, R6\n"
 433                         "BL     sub_FFC44608_my\n"              // <---- changed
 434                         "CMP    R0, #0\n"
 435                         "LDMEQFD        SP!, {R4-R6,PC}\n"
 436                         "LDR    R0, [R4,#0x38]\n"
 437                         "MOV    R1, R6\n"
 438                         "BL     sub_FFC44770\n"
 439                         "CMP    R0, #0\n"
 440                         "LDMEQFD        SP!, {R4-R6,PC}\n"
 441                         "MOV    R0, R6\n"
 442                         "BL     sub_FFC44104\n"
 443                         "CMP    R0, #0\n"
 444                         "MOVNE  R1, #1\n"
 445                         "STRNE  R1, [R5,#0x14]\n"
 446                         "LDMFD  SP!, {R4-R6,PC}\n"
 447  );
 448 }
 449 //JSE
 450 
 451 //JS
 452 void __attribute__((naked,noinline)) sub_FFC44608_my() {
 453 
 454  asm volatile(
 455                         "STMFD  SP!, {R4-R8,LR}\n"
 456                         "MOV    R8, R0\n"
 457                         "MOV    R0, #0x17\n"
 458                         "MUL    R1, R0, R1\n"
 459                         "LDR    R0, =0x17E00\n"
 460                         "MOV    R6, #0\n"
 461                         "ADD    R7, R0, R1,LSL#2\n"
 462                         "LDR    R0, [R7,#0x3C]\n"
 463                         "MOV    R5, #0\n"
 464                         "CMP    R0, #6\n"
 465                         "ADDLS  PC, PC, R0,LSL#2\n"
 466                         "B      loc_FFC44754\n"
 467                                 
 468                 "loc_FFC44638:\n"               
 469                         "B      loc_FFC4466C\n"
 470                                 
 471                 "loc_FFC4463C:\n"               
 472                         "B      loc_FFC44654\n"
 473                                 
 474                 "loc_FFC44640:\n"               
 475                         "B      loc_FFC44654\n"
 476                                 
 477                 "loc_FFC44644:\n"               
 478                         "B      loc_FFC44654\n"
 479                                 
 480                 "loc_FFC44648:\n"               
 481                         "B      loc_FFC44654\n"
 482                                 
 483                 "loc_FFC4464C:\n"               
 484                         "B      loc_FFC4474C\n"
 485                                 
 486                 "loc_FFC44650:\n"               
 487                         "B      loc_FFC44654\n"
 488                                 
 489                 "loc_FFC44654:\n"               
 490                                 
 491                         "MOV    R2, #0\n"
 492                         "MOV    R1, #0x200\n"
 493                         "MOV    R0, #2\n"
 494                         "BL     sub_FFC59C10\n"
 495                         "MOVS   R4, R0\n"
 496                         "BNE    loc_FFC44674\n"
 497                                 
 498                 "loc_FFC4466C:\n"               
 499                                 
 500                         "MOV    R0, #0\n"
 501                         "LDMFD  SP!, {R4-R8,PC}\n"
 502                                 
 503                 "loc_FFC44674:\n"               
 504                         "LDR    R12, [R7,#0x4C]\n"
 505                         "MOV    R3, R4\n"
 506                         "MOV    R2, #1\n"
 507                         "MOV    R1, #0\n"
 508                         "MOV    R0, R8\n"
 509 //                      "BLX    R12\n"                  // !! Workaround !!
 510                 "MOV    LR, PC\n"                       // gcc won't compile "BLX       R12" nor "BL    R12".
 511                 "MOV    PC, R12\n"                      // workaround: make your own "BL" and hope we don't need the change to thumb-mode
 512                         
 513                         "CMP    R0, #1\n"
 514                         "BNE    loc_FFC446A0\n"
 515                         "MOV    R0, #2\n"
 516                         "BL     sub_FFC59D5C\n"
 517                         "B      loc_FFC4466C\n"
 518                                 
 519                 "loc_FFC446A0:\n"               
 520                         "MOV    R0, R8\n"
 521                         "BL     sub_FFD02ECC\n"
 522                         
 523                         //insertion of new code for FAT32 autodetection
 524                  "MOV   R1, R4\n"           //  pointer to MBR in R1
 525                  "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 526 
 527           // Start of DataGhost's FAT32 autodetection code
 528           // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 529           // According to the code below, we can use R1, R2, R3 and R12.
 530           // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 531           // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 532           "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 533           "MOV     LR, R4\n"                     // Save old offset for MBR signature
 534           "MOV     R1, #1\n"                     // Note the current partition number
 535           "B    dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 536      "dg_sd_fat32:\n"
 537           "CMP  R1, #4\n"                     // Did we already see the 4th partition?
 538           "BEQ  dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 539           "ADD  R12, R12, #0x10\n"            // Second partition
 540           "ADD  R1, R1, #1\n"                 // Second partition for the loop
 541      "dg_sd_fat32_enter:\n"
 542           "LDRB         R2, [R12, #0x1BE]\n"          // Partition status
 543           "LDRB         R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 544           "CMP  R3, #0xB\n"                   // Is this a FAT32 partition?
 545           "CMPNE        R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 546           "BNE  dg_sd_fat32\n"                // No, it isn't. Loop again.
 547           "CMP  R2, #0x00\n"                  // It is, check the validity of the partition type
 548           "CMPNE        R2, #0x80\n"
 549           "BNE  dg_sd_fat32\n"                // Invalid, go to next partition
 550                                                  // This partition is valid, it's the first one, bingo!
 551           "MOV  R4, R12\n"                    // Move the new MBR offset for the partition detection.
 552           
 553      "dg_sd_fat32_end:\n"
 554           // End of DataGhost's FAT32 autodetection code
 555                         //end insertion
 556 
 557                         "LDRB   R1, [R4,#0x1C9]\n"
 558                         "LDRB   R3, [R4,#0x1C8]\n"
 559                         "LDRB   R12, [R4,#0x1CC]\n"
 560                         "MOV    R1, R1,LSL#24\n"
 561                         "ORR    R1, R1, R3,LSL#16\n"
 562                         "LDRB   R3, [R4,#0x1C7]\n"
 563                         "LDRB   R2, [R4,#0x1BE]\n"
 564 //                      "LDRB   LR, [R4,#0x1FF]\n"              // removed
 565                         "ORR    R1, R1, R3,LSL#8\n"
 566                         "LDRB   R3, [R4,#0x1C6]\n"
 567                         "CMP    R2, #0\n"
 568                         "CMPNE  R2, #0x80\n"
 569                         "ORR    R1, R1, R3\n"
 570                         "LDRB   R3, [R4,#0x1CD]\n"
 571                         "MOV    R3, R3,LSL#24\n"
 572                         "ORR    R3, R3, R12,LSL#16\n"
 573                         "LDRB   R12, [R4,#0x1CB]\n"
 574                         "ORR    R3, R3, R12,LSL#8\n"
 575                         "LDRB   R12, [R4,#0x1CA]\n"
 576                         "ORR    R3, R3, R12\n"
 577 //                      "LDRB   R12, [R4,#0x1FE]\n"                     // removed
 578                          "LDRB    R12, [LR,#0x1FE]\n"           // added, First MBR signature byte (0x55), LR is original offset.
 579                          "LDRB    LR, [LR,#0x1FF]\n"            // added, Last MBR signature byte (0xAA), LR is original offset.
 580                         "MOV    R4, #0\n"
 581                         "BNE    loc_FFC44728\n"
 582                         "CMP    R0, R1\n"
 583                         "BCC    loc_FFC44728\n"
 584                         "ADD    R2, R1, R3\n"
 585                         "CMP    R2, R0\n"
 586                         "CMPLS  R12, #0x55\n"
 587                         "CMPEQ  LR, #0xAA\n"
 588                         "MOVEQ  R6, R1\n"
 589                         "MOVEQ  R5, R3\n"
 590                         "MOVEQ  R4, #1\n"
 591                                 
 592                 "loc_FFC44728:\n"               
 593 
 594                         "MOV    R0, #2\n"
 595                         "BL     sub_FFC59D5C\n"
 596                         "CMP    R4, #0\n"
 597                         "BNE    loc_FFC44760\n"
 598                         "MOV    R6, #0\n"
 599                         "MOV    R0, R8\n"
 600                         "BL     sub_FFD02ECC\n"
 601                         "MOV    R5, R0\n"
 602                         "B      loc_FFC44760\n"
 603                                 
 604                 "loc_FFC4474C:\n"               
 605                                 
 606                         "MOV    R5, #0x40\n"
 607                         "B      loc_FFC44760\n"
 608                                 
 609                 "loc_FFC44754:\n"               
 610                                 
 611                         "LDR    R1, =0x37A\n"
 612                         "LDR    R0, =0xFFC445FC \n"
 613                         "BL     sub_FFC0BD98\n"                 //DebugAssert
 614                                 
 615                 "loc_FFC44760:\n"               
 616                                 
 617                         "STR    R6, [R7,#0x44]!\n"
 618                         "MOV    R0, #1\n"
 619                         "STR    R5, [R7,#4]\n"
 620                         "LDMFD  SP!, {R4-R8,PC}\n"
 621  );
 622 }
 623 //JSE
 624 
 625 //JS
 626 void __attribute__((naked,noinline)) JogDial_task_my() { 
 627  asm volatile(
 628                         "STMFD  SP!, {R3-R11,LR}\n"
 629                         "BL     sub_FFC36774\n"
 630                         "LDR    R11, =0x80000B01\n"
 631                         "LDR    R8, =0xFFE97FE0\n"
 632                         "LDR    R7, =0xC0240000\n"
 633                         "LDR    R6, =0x2494\n"
 634                         "MOV    R9, #1\n"
 635                         "MOV    R10, #0\n"
 636                                 
 637                 "loc_FFC36548:\n"               
 638                         "LDR    R3, =0x1AE\n"
 639                         "LDR    R0, [R6,#0x10]\n"
 640                         "LDR    R2, =0xFFC36754\n"
 641                         "MOV    R1, #0\n"
 642                         "BL     sub_FFC0BC80\n"
 643                         "MOV    R0, #0x28\n"
 644                         "BL     sub_ffc176ac\n"         //eventproc_export_SleepTask
 645 //------------------  inserted code ---------------------
 646 "labelA:\n"
 647                 "LDR     R0, =jogdial_stopped\n"
 648                 "LDR     R0, [R0]\n"
 649                 "CMP     R0, #1\n"
 650                 "BNE    labelB\n"
 651                 "MOV     R0, #40\n"
 652                 "BL     sub_ffc176ac\n"         //eventproc_export_SleepTask
 653                 "B      labelA\n"
 654 "labelB:\n"
 655 // end insertion
 656                         "LDR    R0, [R7,#0x104]\n"
 657                         "MOV    R0, R0,ASR#16\n"
 658                         "STRH   R0, [R6]\n"
 659                         "LDRSH  R2, [R6,#2]\n"
 660                         "SUB    R1, R0, R2\n"
 661                         "CMP    R1, #0\n"
 662                         "BEQ    loc_FFC3660C\n"
 663                         "MOV    R5, R1\n"
 664                         "RSBLT  R5, R5, #0\n"
 665                         "MOVLE  R4, #0\n"
 666                         "MOVGT  R4, #1\n"
 667                         "CMP    R5, #0xFF\n"
 668                         "BLS    loc_FFC365C0\n"
 669                         "CMP    R1, #0\n"
 670                         "RSBLE  R1, R2, #0xFF\n"
 671                         "ADDLE  R1, R1, #0x7F00\n"
 672                         "ADDLE  R0, R1, R0\n"
 673                         "RSBGT  R0, R0, #0xFF\n"
 674                         "ADDGT  R0, R0, #0x7F00\n"
 675                         "ADDGT  R0, R0, R2\n"
 676                         "ADD    R5, R0, #0x8000\n"
 677                         "ADD    R5, R5, #1\n"
 678                         "EOR    R4, R4, #1\n"
 679                                 
 680                 "loc_FFC365C0:\n"               
 681                         "LDR    R0, [R6,#0x18]\n"
 682                         "CMP    R0, #0\n"
 683                         "BEQ    loc_FFC36604\n"
 684                         "LDR    R0, [R6,#0x20]\n"
 685                         "CMP    R0, #0\n"
 686                         "BEQ    loc_FFC365EC\n"
 687                         "LDR    R1, [R8,R4,LSL#2]\n"
 688                         "CMP    R1, R0\n"
 689                         "BEQ    loc_FFC365F4\n"
 690                         "LDR    R0, =0xB01\n"
 691                         "BL     sub_FFC63A78\n"
 692                                 
 693                 "loc_FFC365EC:\n"               
 694                         "MOV    R0, R11\n"
 695                         "BL     sub_FFC63A78\n"
 696                                 
 697                 "loc_FFC365F4:\n"               
 698                         "LDR    R0, [R8,R4,LSL#2]\n"
 699                         "MOV    R1, R5\n"
 700                         "STR    R0, [R6,#0x20]\n"
 701                         "BL     sub_FFC639C0\n"
 702                                 
 703                 "loc_FFC36604:\n"               
 704                         "LDRH   R0, [R6]\n"
 705                         "STRH   R0, [R6,#2]\n"
 706                                 
 707                 "loc_FFC3660C:\n"               
 708                         "STR    R10, [R7,#0x100]\n"
 709                         "STR    R9, [R7,#0x108]\n"
 710                         "LDR    R0, [R6,#0x14]\n"
 711                         "CMP    R0, #0\n"
 712                         "BLNE   sub_ffc176ac\n"                         //eventproc_export_SleepTask
 713                         "B      loc_FFC36548\n"
 714  );
 715 }
 716 //JSE
 717 

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