root/platform/ixus90_sd790/sub/100d/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. boot
  3. sub_FF8101A4_my
  4. sub_FF810FA0_my
  5. uHwSetup_my
  6. taskcreate_Startup_my
  7. task_Startup_my
  8. CreateTask_spytask
  9. init_file_modules_task
  10. sub_FF86DB14_my
  11. sub_FF84F174_my
  12. sub_FF84EFB0_my
  13. sub_FF84ED40_my
  14. jogdial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 void __attribute__((naked,noinline)) jogdial_task_my();
   8 
   9 // Forward declarations
  10 //void CreateTask_PhySw();
  11 void CreateTask_spytask();
  12 
  13 void taskCreateHook(unsigned int *p)
  14 {
  15         p-=16;
  16         if (p[0]==0xFF821ADC)  p[0]=(unsigned int)mykbd_task;
  17         if (p[0]==0xFF842C84)  p[0]=(unsigned int)jogdial_task_my; 
  18         if (p[0]==0xFF85A278)  p[0]=(unsigned int)movie_record_task;
  19         if (p[0]==0xFF85E2b0)  p[0]=(unsigned int)capt_seq_task;
  20         if (p[0]==0xFF8791D0)  p[0]=(unsigned int)init_file_modules_task;
  21         if (p[0]==0xFF8b6A80)  p[0]=(unsigned int)exp_drv_task;
  22         if (p[0]==0xFFA0F030)  p[0]=(int)filewritetask;
  23 }
  24 
  25 void boot();
  26 
  27 void boot() { //#fs
  28     long *canon_data_src = (void*)0xFFB1CDDC;
  29     long *canon_data_dst = (void*)0x1900;
  30     long canon_data_len = 0xF134 - 0x1900; // data_end - data_start
  31     long *canon_bss_start = (void*)0xF134; // just after data
  32     long canon_bss_len = 0xCBC48 - 0xF134; //0xFEBC;
  33 
  34     long i;
  35 
  36     // Code taken from VxWorks CHDK. Changes CPU speed?
  37     asm volatile (
  38         "MRC     p15, 0, R0,c1,c0\n"
  39         "ORR     R0, R0, #0x1000\n"
  40         "ORR     R0, R0, #4\n"
  41         "ORR     R0, R0, #1\n"
  42         "MCR     p15, 0, R0,c1,c0\n"
  43     :::"r0");
  44 
  45     for(i=0;i<canon_data_len/4;i++)
  46         canon_data_dst[i]=canon_data_src[i];
  47 
  48     for(i=0;i<canon_bss_len/4;i++)
  49         canon_bss_start[i]=0;
  50 
  51     // jump to init-sequence that follows the data-copy-routine 
  52     asm volatile ("B  sub_FF8101A4_my\n" );
  53 }; //#fe
  54 
  55 
  56 // init
  57 void __attribute__((naked,noinline)) sub_FF8101A4_my() { //#fs 
  58     //http://chdk.setepontos.com/index.php/topic,4194.0.html
  59     *(int*)0x1930=(int)taskCreateHook;
  60 
  61     // replacement of sub_FF821C08  (sub_FF842634) for correct power-on.
  62     //(short press = playback mode, long press = record mode)
  63     *(int*)(0x2290)= (*(int*)0xC02200F8) & 1 ? 0x100000 : 0x200000;
  64 
  65         asm volatile (
  66 "loc_FF8101A4:\n" //                               ; CODE XREF: ROM:FF810160j
  67         "LDR     R0, =0xFF81021C\n"
  68         "MOV     R1, #0\n"
  69         "LDR     R3, =0xFF810254\n"
  70 
  71 "loc_FF8101B0:\n" //                               ; CODE XREF: ROM:FF8101BCj
  72         "CMP     R0, R3\n"
  73         "LDRCC   R2, [R0],#4\n"
  74         "STRCC   R2, [R1],#4\n"
  75         "BCC     loc_FF8101B0\n"
  76         "LDR     R0, =0xFF810254\n"
  77         "MOV     R1, #0x4B0\n"
  78         "LDR     R3, =0xFF810468\n"
  79 
  80 "loc_FF8101CC:\n" //                               ; CODE XREF: ROM:FF8101D8j
  81         "CMP     R0, R3\n"
  82         "LDRCC   R2, [R0],#4\n"
  83         "STRCC   R2, [R1],#4\n"
  84         "BCC     loc_FF8101CC\n"
  85         "MOV     R0, #0xD2\n"
  86         "MSR     CPSR_cxsf, R0\n"
  87         "MOV     SP, #0x1000\n"
  88         "MOV     R0, #0xD3\n"
  89         "MSR     CPSR_cxsf, R0\n"
  90         "MOV     SP, #0x1000\n"
  91 //        "LDR     R0, loc_FF810210\n" // =0x6C4\n" //loc_FF810210\n"
  92                           "LDR     R0, =0x6C4\n" // +
  93         "LDR     R2, =0xEEEEEEEE\n"
  94         "MOV     R3, #0x1000\n"
  95 
  96 "loc_FF810200:\n" //                               ; CODE XREF: ROM:FF810208j
  97         "CMP     R0, R3\n"
  98         "STRCC   R2, [R0],#4\n"
  99         "BCC     loc_FF810200\n"
 100         "BL      sub_FF810FA0_my\n"
 101         );
 102         // Working
 103 } //#fe
 104 
 105 void __attribute__((naked,noinline)) sub_FF810FA0_my() { //#fs 
 106         asm volatile (
 107         "STR     LR, [SP,#-4]!\n"
 108         "SUB     SP, SP, #0x74\n"
 109         "MOV     R0, SP\n"
 110         "MOV     R1, #0x74\n"
 111         "BL      sub_FFAACA58\n"
 112         "MOV     R0, #0x53000\n"
 113         "STR     R0, [SP, #4]\n"
 114 #if defined(CHDK_NOT_IN_CANON_HEAP)
 115         "LDR     R0, =0xCBC48\n"
 116 #else
 117         "LDR     R0, =new_sa\n"
 118         "LDR     R0, [R0]\n"
 119 #endif
 120         "LDR     R2, =0x279C00\n"
 121         "LDR     R1, =0x272968\n"
 122         "STR     R0, [SP,#0x74-0x6C]\n"
 123         "SUB     R0, R1, R0\n"
 124         "ADD     R3, SP, #0x74-0x68\n"
 125         "STR     R2, [SP,#0x74-0x74]\n"
 126         "STMIA   R3, {R0-R2}\n"
 127         "MOV     R0, #0x22\n"
 128         "STR     R0, [SP,#0x74-0x5C]\n"
 129         "MOV     R0, #0x68\n"
 130         "STR     R0, [SP,#0x74-0x58]\n"
 131         "LDR     R0, =0x19B\n"
 132         "MOV     R1, #0x64\n"
 133         "STRD    R0, [SP,#0x74-0x54]\n"
 134         "MOV     R0, #0x78\n"
 135         "STRD    R0, [SP,#0x74-0x4C]\n"
 136         "MOV     R0, #0\n"
 137         "STR     R0, [SP,#0x74-0x44]\n"
 138         "STR     R0, [SP,#0x74-0x40]\n"
 139         "MOV     R0, #0x10\n"
 140         "STR     R0, [SP,#0x74-0x18]\n"
 141         "MOV     R0, #0x800\n"
 142         "STR     R0, [SP,#0x74-0x14]\n"
 143         "MOV     R0, #0xA0\n"
 144         "STR     R0, [SP,#0x74-0x10]\n"
 145         "MOV     R0, #0x280\n"
 146         "STR     R0, [SP,#0x74-0xC]\n"
 147         //"LDR     R1, =0xFF814DA4\n"
 148         "LDR     R1, =uHwSetup_my\n"
 149         "MOV     R0, SP\n"
 150         "MOV     R2, #0\n"
 151         "BL      sub_FF812D58\n"
 152 
 153         "ADD     SP, SP, #0x74\n"
 154         "LDR     PC, [SP],#4\n"
 155         );
 156         // Working
 157 }; //#fe
 158 
 159 // Extracted method: uHwSetup (FF814DA4)
 160 void __attribute__((naked,noinline)) uHwSetup_my() { //#fs 
 161         asm volatile (
 162         "STMFD   SP!, {R4,LR}\n"
 163         "BL      sub_FF81094C\n"
 164         "BL      sub_FF819664\n"
 165         "CMP     R0, #0\n"
 166         "LDRLT   R0, =0xFF814EB8\n" //    ; "dmSetup"\n"
 167         "BLLT    sub_FF814E98\n"
 168         "BL      sub_FF8149C8\n"
 169         "CMP     R0, #0\n"
 170         "LDRLT   R0, =0xFF814EC0\n" // ; "termDriverInit"\n"
 171         "BLLT    sub_FF814E98\n"
 172         "LDR     R0, =0xFF814ED0\n" //      ; "/_term"\n"
 173         "BL      sub_FF814AB4\n"
 174         "CMP     R0, #0\n"
 175         "LDRLT   R0, =0xFF814ED8\n" // ; "termDeviceCreate"\n"
 176         "BLLT    sub_FF814E98\n"
 177         "LDR     R0, =0xFF814ED0\n" //      ; "/_term"\n"
 178         "BL      sub_FF813564\n"
 179         "CMP     R0, #0\n"
 180         "LDRLT   R0, =0xFF814EEC\n" // ; "stdioSetup"\n"
 181         "BLLT    sub_FF814E98\n"
 182         "BL      sub_FF8191EC\n"
 183         "CMP     R0, #0\n"
 184         "LDRLT   R0, =0xFF814EF8\n" // ; "stdlibSetup"\n"
 185         "BLLT    sub_FF814E98\n"
 186         "BL      sub_FF8114B8\n"
 187         "CMP     R0, #0\n"
 188         "LDRLT   R0, =0xFF814F04\n" // ; "armlib_setup"\n"
 189         "BLLT    sub_FF814E98\n"
 190         "LDMFD   SP!, {R4,LR}\n"
 191         "B       taskcreate_Startup_my\n"
 192         );
 193 }; //#fe
 194 
 195 // Extracted method: taskcreate_Startup (FF81CCBC)
 196 void __attribute__((naked,noinline)) taskcreate_Startup_my() { //#fs 
 197         asm volatile (
 198         "STMFD   SP!, {R3-R5,LR}\n"
 199         "BL      sub_FF821C00\n"
 200         "BL      sub_FF829EF0\n"
 201         "CMP     R0, #0\n"
 202         "BNE     loc_FF81CCFC\n"
 203         "LDR     R4, =0xC0220000\n"
 204         "LDR     R0, [R4,#0xFC]\n"
 205         "TST     R0, #1\n"
 206         "MOVEQ   R0, #0x12C\n"
 207         "BLEQ    _SleepTask\n"
 208         "BL      sub_FF821BFC\n"
 209         "CMP     R0, #0\n"
 210         "BNE     loc_FF81CCFC\n"
 211         "MOV     R0, #0x44\n"
 212         "STR     R0, [R4,#0x4C]\n"
 213 
 214 "loc_FF81CCF8:\n" //                               ; CODE XREF: taskcreate_Startup:loc_FF81CCF8j
 215         "B       loc_FF81CCF8\n"
 216 
 217 "loc_FF81CCFC:\n" //                               ; CODE XREF: taskcreate_Startup+10j
 218 //        "BL      sub_FF821C08\n"  // Removed for correct power-on
 219         "BL      sub_FF821C04\n"
 220         "BL      sub_FF828278\n"
 221         "LDR     R1, =0x2CE000\n"
 222         "MOV     R0, #0\n"
 223         "BL      sub_FF8284C0\n"
 224         "BL      sub_FF82846C\n"
 225         "MOV     R3, #0\n"
 226         "STR     R3, [SP,#0x10-0x10]\n"
 227         "LDR     R3, =task_Startup_my\n" //task_Startup
 228         "MOV     R2, #0\n"
 229         "MOV     R1, #0x19\n"
 230         "LDR     R0, =0xFF81CD44\n"   // ; "Startup"\n"
 231         "BL      _CreateTask\n"
 232         "MOV     R0, #0\n"
 233         //"LDMFD   SP!, {R3-R5,PC}\n"
 234         "LDMFD   SP!, {ip, pc}\n"
 235                 );
 236 }; //#fe
 237 
 238 // Extracted method: task_Startup (FF81CC60)
 239 void __attribute__((naked,noinline)) task_Startup_my() { //#fs 
 240         asm volatile (
 241         "STMFD   SP!, {R4,LR}\n"
 242         "BL      sub_FF81516C\n" // clockSave
 243         "BL      sub_FF822D60\n"
 244         "BL      sub_FF81FE00\n"
 245         //"BL      sub_FF829F30\n"                      // hl??
 246         "BL      sub_FF82A0F8\n"
 247         //"BL      sub_FF829FB8\n" // StartDiskBoot
 248         );
 249 
 250                 CreateTask_spytask();
 251 
 252         asm volatile (
 253         "BL      sub_FF82A2AC\n"
 254         "BL      sub_FF82A148\n" // good question.... equiv of touch_wheel.c ?
 255         "BL      sub_FF8277B8\n"
 256         "BL      sub_FF82A2B0\n"
 257                 );
 258 
 259 //              CreateTask_PhySw();
 260 
 261                 asm volatile (
 262         "BL      sub_FF821B10\n" // taskcreate_PhySw
 263         "BL      sub_FF824CC8\n" // task_ShootSeqTask
 264         "BL      sub_FF82A2C8\n"
 265         //"BL      sub_FF81FB20\n" // nullsub_2
 266         "BL      sub_FF820FCC\n"
 267         "BL      sub_FF829CB8\n" // taskcreate_Bye
 268         "BL      sub_FF821640\n"
 269         "BL      sub_FF820EBC\n" // taskcreate_TempCheck\n"
 270         "BL      sub_FF82AD6C\n"
 271         "BL      sub_FF820E78\n"
 272         //"LDMFD   SP!, {R4,LR}\n"
 273         "BL       sub_FF815070\n"
 274                 "LDMFD   SP!, {R4,PC}\n"
 275         );
 276 }; //#fe
 277 
 278 
 279 void CreateTask_spytask() { //#fs 
 280     _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
 281 }; //#fe
 282 
 283 //void CreateTask_PhySw() { //#fs 
 284 //    _CreateTask("PhySw", 0x18, 0x800, mykbd_task, 0);
 285 //}; //#fe
 286 
 287 
 288 // -----------------
 289 // SDHC-Boot-Support
 290 // -----------------
 291 
 292 // 0xFF8791d0
 293 void __attribute__((naked,noinline)) init_file_modules_task() { //#fs  
 294         asm volatile (
 295         "STMFD   SP!, {R4-R6,LR}\n"
 296         "BL      sub_FF86DAE8\n"
 297         "LDR     R5, =0x5006\n"
 298         "MOVS    R4, R0\n"
 299         "MOVNE   R1, #0\n"
 300         "MOVNE   R0, R5\n"
 301         "BLNE    _PostLogicalEventToUI\n"
 302         "BL      sub_FF86DB14_my\n"
 303         "BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" -flag for spytask
 304         "CMP     R4, #0\n"
 305         "MOVEQ   R0, R5\n"
 306         "LDMEQFD SP!, {R4-R6,LR}\n"
 307         "MOVEQ   R1, #0\n"
 308         "BEQ     _PostLogicalEventToUI\n"
 309         "LDMFD   SP!, {R4-R6,PC}\n"
 310         );
 311 }; //#fe
 312 
 313 void __attribute__((naked,noinline)) sub_FF86DB14_my() { //#fs  
 314         asm volatile (
 315         "STMFD   SP!, {R4,LR}\n"
 316         "BL      sub_FF84F174_my\n"  // continue to SDHC-hook here
 317         "LDR     R4, =0x57D0\n"
 318         "LDR     R0, [R4,#4]\n"
 319         "CMP     R0, #0\n"
 320         "BNE     loc_FF86DB44\n"
 321         "BL      sub_FF881C08\n"
 322         "BL      sub_FF9055FC\n"
 323         "BL      sub_FF881C08\n"
 324         "BL      sub_FF84CB64\n"
 325         "BL      sub_FF881C18\n"
 326         "BL      sub_FF9056C8\n"
 327 
 328 "loc_FF86DB44:\n" //                            ; CODE XREF: sub_FF86DB14+14j
 329         "MOV     R0, #1\n"
 330         "STR     R0, [R4]\n"
 331         "LDMFD   SP!, {R4,PC}\n"
 332         );
 333 }; //#fe
 334 
 335 void __attribute__((naked,noinline)) sub_FF84F174_my() { //#fs  
 336         asm volatile (
 337         "STMFD   SP!, {R4-R6,LR}\n"
 338         "MOV     R6, #0\n"
 339         "MOV     R0, R6\n"
 340         "BL      sub_FF84EC34\n"
 341         "LDR     R4, =0x11890\n"
 342         "MOV     R5, #0\n"
 343         "LDR     R0, [R4,#0x38]\n"
 344         "BL      sub_FF84F668\n"
 345         "CMP     R0, #0\n"
 346         "LDREQ   R0, =0x29D4\n"
 347         "STREQ   R5, [R0,#0x10]\n"
 348         "STREQ   R5, [R0,#0x14]\n"
 349         "STREQ   R5, [R0,#0x18]\n"
 350         "MOV     R0, R6\n"
 351         "BL      sub_FF84EC74\n" //uMounter (u=unknown, just to prevent misunderstandings)
 352         "MOV     R0, R6\n"
 353         "BL      sub_FF84EFB0_my\n" // continue to SDHC-hook here!
 354         "MOV     R5, R0\n"
 355         "MOV     R0, R6\n"
 356         "BL      sub_FF84F01C\n"
 357         "LDR     R1, [R4,#0x3C]\n"
 358         "AND     R2, R5, R0\n"
 359         "CMP     R1, #0\n"
 360         "MOV     R0, #0\n"
 361         "MOVEQ   R0, #0x80000001\n"
 362         "BEQ     loc_FF84F208\n"
 363         "LDR     R3, [R4,#0x2C]\n"
 364         "CMP     R3, #2\n"
 365         "MOVEQ   R0, #4\n"
 366         "CMP     R1, #5\n"
 367         "ORRNE   R0, R0, #1\n"
 368         "BICEQ   R0, R0, #1\n"
 369         "CMP     R2, #0\n"
 370         "BICEQ   R0, R0, #2\n"
 371         "ORREQ   R0, R0, #0x80000000\n"
 372         "BICNE   R0, R0, #0x80000000\n"
 373         "ORRNE   R0, R0, #2\n"
 374 
 375 "loc_FF84F208:\n" //                            ; CODE XREF: sub_FF84F174+64j
 376         "STR     R0, [R4,#0x40]\n"
 377         "LDMFD   SP!, {R4-R6,PC}\n"
 378         );
 379 }; //#fe
 380 
 381 void __attribute__((naked,noinline)) sub_FF84EFB0_my() { //#fs  
 382         asm volatile (
 383         "STMFD   SP!, {R4-R6,LR}\n"
 384         "LDR     R5, =0x29D4\n"
 385         "MOV     R6, R0\n"
 386         "LDR     R0, [R5,#0x14]\n"
 387         "CMP     R0, #0\n"
 388         "MOVNE   R0, #1\n"
 389         "LDMNEFD SP!, {R4-R6,PC}\n"
 390         "MOV     R0, #0x17\n"
 391         "MUL     R1, R0, R6\n"
 392         "LDR     R0, =0x11890\n"
 393         "ADD     R4, R0, R1,LSL#2\n"
 394         "LDR     R0, [R4,#0x38]\n"
 395         "MOV     R1, R6\n"
 396         "BL      sub_FF84ED40_my\n" //continue to SDHC-hook here
 397         "CMP     R0, #0\n"
 398         "LDMEQFD SP!, {R4-R6,PC}\n"
 399         "LDR     R0, [R4,#0x38]\n"
 400         "MOV     R1, R6\n"
 401         "BL      sub_FF84EEA8\n"
 402         "CMP     R0, #0\n"
 403         "LDMEQFD SP!, {R4-R6,PC}\n"
 404         "MOV     R0, R6\n"
 405         "BL      sub_FF84E83C\n"
 406         "CMP     R0, #0\n"
 407         "MOVNE   R1, #1\n"
 408         "STRNE   R1, [R5,#0x14]\n"
 409         "LDMFD   SP!, {R4-R6,PC}\n"
 410         );
 411 }; //#fe
 412 
 413 void __attribute__((naked,noinline)) sub_FF84ED40_my() { //#fs  ; Partition t
 414         asm volatile (
 415         "STMFD   SP!, {R4-R8,LR}\n"
 416         "MOV     R8, R0\n"
 417         "MOV     R0, #0x17\n"
 418         "MUL     R1, R0, R1\n"
 419         "LDR     R0, =0x11890\n"
 420         "MOV     R6, #0\n"
 421         "ADD     R7, R0, R1,LSL#2\n"
 422         "LDR     R0, [R7,#0x3C]\n"
 423         "MOV     R5, #0\n"
 424         "CMP     R0, #6\n"
 425         "ADDLS   PC, PC, R0,LSL#2\n"
 426         "B       loc_FF84EE8C\n"
 427  
 428 "loc_FF84ED70:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 429         "B       loc_FF84EDA4\n"
 430  
 431 "loc_FF84ED74:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 432         "B       loc_FF84ED8C\n"
 433  
 434 "loc_FF84ED78:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 435         "B       loc_FF84ED8C\n"
 436  
 437 "loc_FF84ED7C:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 438         "B       loc_FF84ED8C\n"
 439  
 440 "loc_FF84ED80:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 441         "B       loc_FF84ED8C\n"
 442  
 443 "loc_FF84ED84:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 444         "B       loc_FF84EE84\n"
 445  
 446 "loc_FF84ED88:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 447         "B       loc_FF84ED8C\n"
 448 "loc_FF84ED8C:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 449         "MOV     R2, #0\n"
 450         "MOV     R1, #0x200\n"
 451         "MOV     R0, #3\n"
 452         "BL      sub_FF867C94\n"
 453         "MOVS    R4, R0\n"
 454         "BNE     loc_FF84EDAC\n"
 455 "loc_FF84EDA4:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 456         "MOV     R0, #0\n"
 457         "LDMFD   SP!, {R4-R8,PC}\n"
 458  
 459 "loc_FF84EDAC:\n" //                            ; CODE XREF: sub_FF84ED40+60j
 460         "LDR     R12, [R7,#0x4C]\n"
 461         "MOV     R3, R4\n"
 462         "MOV     R2, #1\n"
 463         "MOV     R1, #0\n"
 464         "MOV     R0, R8\n"
 465         //"BLX     R12 //\n"
 466         "MOV     LR, PC\n"
 467         "MOV     PC, R12\n"
 468         "CMP     R0, #1\n"
 469         "BNE     loc_FF84EDD8\n"
 470         "MOV     R0, #3\n"
 471         "BL      sub_FF867DD4\n"
 472         "B       loc_FF84EDA4\n"
 473  
 474 "loc_FF84EDD8:\n" //                            ; CODE XREF: sub_FF84ED40+88j
 475         "MOV     R0, R8\n"
 476         "BL      sub_FF922E24\n"
 477         
 478                   "MOV   R1, R4\n"           //  pointer to MBR in R1
 479                   "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 480         // Start of DataGhost's FAT32 autodetection code
 481         // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 482         // According to the code below, we can use R1, R2, R3 and R12.
 483         // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 484         // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 485         "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 486         "MOV     LR, R4\n"                     // Save old offset for MBR signature
 487         "MOV     R1, #1\n"                     // Note the current partition number
 488         "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 489    "dg_sd_fat32:\n"
 490         "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 491         "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 492         "ADD     R12, R12, #0x10\n"            // Second partition
 493         "ADD     R1, R1, #1\n"                 // Second partition for the loop
 494    "dg_sd_fat32_enter:\n"
 495         "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 496         "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 497         "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 498                 "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 499         "BNE     dg_sd_fat32\n"                // No, it isn't.
 500         "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 501         "CMPNE   R2, #0x80\n"
 502         "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 503                                                // This partition is valid, it's the first one, bingo!
 504         "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 505         
 506    "dg_sd_fat32_end:\n"
 507         // End of DataGhost's FAT32 autodetection code             
 508         "LDRB    R1, [R4,#0x1C9]\n"
 509         "LDRB    R3, [R4,#0x1C8]\n"
 510         "LDRB    R12, [R4,#0x1CC]\n"
 511         "MOV     R1, R1,LSL#24\n"
 512         "ORR     R1, R1, R3,LSL#16\n"
 513         "LDRB    R3, [R4,#0x1C7]\n"
 514         "LDRB    R2, [R4,#0x1BE]\n"
 515         //"LDRB    LR, [R4,#0x1FF]\n"
 516         "ORR     R1, R1, R3,LSL#8\n"
 517         "LDRB    R3, [R4,#0x1C6]\n"
 518         "CMP     R2, #0\n"
 519         "CMPNE   R2, #0x80\n"
 520         "ORR     R1, R1, R3\n"
 521         "LDRB    R3, [R4,#0x1CD]\n"
 522         "MOV     R3, R3,LSL#24\n"
 523         "ORR     R3, R3, R12,LSL#16\n"
 524         "LDRB    R12, [R4,#0x1CB]\n"
 525         "ORR     R3, R3, R12,LSL#8\n"
 526         "LDRB    R12, [R4,#0x1CA]\n"
 527         "ORR     R3, R3, R12\n"
 528         //"LDRB    R12, [R4,#0x1FE]\n"
 529         "LDRB    R12, [LR,#0x1FE]\n"
 530         "LDRB    LR, [LR,#0x1FF]\n"
 531         "MOV     R4, #0\n"
 532         "BNE     loc_FF84EE60\n"
 533         "CMP     R0, R1\n"
 534         "BCC     loc_FF84EE60\n"
 535         "ADD     R2, R1, R3\n"
 536         "CMP     R2, R0\n"
 537         "CMPLS   R12, #0x55\n"
 538         "CMPEQ   LR, #0xAA\n"
 539         "MOVEQ   R6, R1\n"
 540         "MOVEQ   R5, R3\n"
 541         "MOVEQ   R4, #1\n"
 542 "loc_FF84EE60:\n" //                            ; CODE XREF: sub_FF84ED40+F8j
 543         "MOV     R0, #3\n"
 544         "BL      sub_FF867DD4\n"
 545         "CMP     R4, #0\n"
 546         "BNE     loc_FF84EE98\n"
 547         "MOV     R6, #0\n"
 548         "MOV     R0, R8\n"
 549         "BL      sub_FF922E24\n"
 550         "MOV     R5, R0\n"
 551         "B       loc_FF84EE98\n"
 552  
 553 "loc_FF84EE84:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 554         "MOV     R5, #0x40\n"
 555         "B       loc_FF84EE98\n"
 556  
 557 "loc_FF84EE8C:\n" //                            ; CODE XREF: sub_FF84ED40+28j
 558         "MOV     R1, #0x374\n"
 559         "LDR     R0, =0xFF84ED34\n" // aMounter_c  ; "Mounter.c"\n"
 560         "BL      _DebugAssert\n"
 561 "loc_FF84EE98:\n" //                            ; CODE XREF: sub_FF84ED40+12Cj
 562         "STR     R6, [R7,#0x44]!\n"
 563         "MOV     R0, #1\n"
 564         "STR     R5, [R7,#4]\n"
 565         "LDMFD   SP!, {R4-R8,PC}\n"
 566         );
 567 }; //#fe
 568 // Extracted method: sub_FF842A44 + 240
 569 // Extracted method: sub_FF842C84
 570 void __attribute__((naked,noinline)) jogdial_task_my()
 571 {
 572         asm volatile (
 573                 "STMFD   SP!, {R3-R11,LR}\n"
 574                 "BL      sub_FF842e34\n" // LOCATION: JogDial.c:14
 575                 "LDR     R11, =0x80000B01\n"
 576                 "LDR     R8, =0xffab07cc\n"             // HL
 577                 "LDR     R7, =0xC0240000\n"             // HL
 578                 "LDR     R6, =0x22A0\n"                         // HL
 579                 "MOV     R9, #1\n"
 580                 "MOV     R10, #0\n"
 581                 "loc_FF842CA4:\n"
 582                 "LDR     R3, =0x1A1\n"                  // HL
 583                 "LDR     R0, [R6,#0xC]\n"
 584                 "LDR     R2, =0xFF842EDC\n" // HL?, "JogDial.c"
 585                 "MOV     R1, #0\n"
 586                 "BL      sub_FF81BBD8\n"                        // HL
 587                 //"MOV     R0, #40\n"
 588                 "MOV     R0, #40\n" // +
 589                 "BL      _SleepTask\n" // LOCATION: KerSys.c:0
 590                 //------------------  added code ---------------------
 591                 "labelA:\n"
 592                 "LDR     R0, =jogdial_stopped\n"
 593                 "LDR     R0, [R0]\n"
 594                 "CMP     R0, #1\n"
 595                 "BNE     labelB\n"
 596                 "MOV     R0, #40\n"
 597                 "BL      _SleepTask\n"
 598                 "B       labelA\n"
 599                 "labelB:\n"
 600                 //------------------  original code ------------------
 601                 "LDR     R0, [R7,#0x104]\n"
 602                 "MOV     R0, R0,ASR#16\n"
 603                 "STRH    R0, [R6]\n"
 604                 "LDRSH   R2, [R6,#2]\n"
 605                 "SUB     R1, R0, R2\n"
 606                 "CMP     R1, #0\n"
 607                 "BEQ     loc_FF842D68\n"
 608                 "MOV     R5, R1\n"
 609                 "RSBLT   R5, R5, #0\n"
 610                 "MOVLE   R4, #0\n"
 611                 "MOVGT   R4, #1\n"
 612                 "CMP     R5, #0xFF\n"
 613                 "BLS     loc_FF842D1C\n"
 614                 "CMP     R1, #0\n"
 615                 "RSBLE   R1, R2, #0xFF\n"
 616                 "ADDLE   R1, R1, #0x7F00\n"
 617                 "ADDLE   R0, R1, R0\n"
 618                 "RSBGT   R0, R0, #0xFF\n"
 619                 "ADDGT   R0, R0, #0x7F00\n"
 620                 "ADDGT   R0, R0, R2\n"
 621                 "ADD     R5, R0, #0x8000\n"
 622                 "ADD     R5, R5, #1\n"
 623                 "EOR     R4, R4, #1\n"
 624                 "loc_FF842D1C:\n"
 625                 "LDR     R0, [R6,#0x14]\n"
 626                 "CMP     R0, #0\n"
 627                 "BEQ     loc_FF842D60\n"
 628                 "LDR     R0, [R6,#0x1C]\n"
 629                 "CMP     R0, #0\n"
 630                 "BEQ     loc_FF842D48\n"
 631                 "LDR     R1, [R8,R4,LSL#2]\n"
 632                 "CMP     R1, R0\n"
 633                 "BEQ     loc_FF842D50\n"
 634                 "LDR     R0, =0xB01\n"
 635                 "BL      sub_FF875370\n"
 636                 "loc_FF842D48:\n"
 637                 "MOV     R0, R11\n"
 638                 "BL      sub_FF875370\n"
 639                 "loc_FF842D50:\n"
 640                 "LDR     R0, [R8,R4,LSL#2]\n"
 641                 "MOV     R1, R5\n"
 642                 "STR     R0, [R6,#0x1C]\n"
 643                 "BL      sub_FF8752b8\n"
 644                 "loc_FF842D60:\n"
 645                 "LDRH    R0, [R6]\n"
 646                 "STRH    R0, [R6,#2]\n"
 647                 "loc_FF842D68:\n"
 648                 "STR     R10, [R7,#0x100]\n"
 649                 "STR     R9, [R7,#0x108]\n"
 650                 "LDR     R0, [R6,#0x10]\n"
 651                 "CMP     R0, #0\n"
 652                 "BLNE    _SleepTask\n" // LOCATION: KerSys.c:0
 653                 "B       loc_FF842CA4\n"
 654                 );
 655 }

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