root/platform/sx100is/sub/100c/boot.c

DEFINITIONS

1. CreateTask_spytask
2. taskCreateHook
3. boot
4. sub_FFC001A4_my
5. sub_FFC00FB8_my
6. uHwSetup_my
7. CreateTask_Startup_my
8. task_Startup_my
9. taskcreatePhySw_my
10. init_file_modules_task
11. sub_FFC5C57C_my
12. sub_FFC402A8_my
13. sub_FFC400E4_my
14. sub_FFC3FF7C_my
15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   8 const char * const new_sa = &_end;
  10 void JogDial_task_my(void);
  12 /*----------------------------------------------------------------------
  13     CreateTask_spytask
  14 -----------------------------------------------------------------------*/
  15 void CreateTask_spytask()
  16 {
_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  18 }
  20 void taskCreateHook(int *p) {
p-=16;
  22     if (p[0]==(int)0xffc4e2e0)  p[0]=(int)capt_seq_task;
  23     if (p[0]==(int)0xffc98f18)  p[0]=(int)exp_drv_task;
  24     if (p[0]==(int)0xffc4ae48)  p[0]=(int)movie_record_task;
  25     if (p[0]==(int)0xffdda798)  p[0]=(int)filewritetask;
  26     if (p[0]==(int)0xffc6358c)  p[0]=(int)init_file_modules_task;
  27     if (p[0]==(int)0xffc3802c)  p[0]=(int)JogDial_task_my;
  28 }
  30 void boot()
  31 {
  32     long *canon_data_src = (void*)0xFFEBE450; 
  33     long *canon_data_dst = (void*)0x1900;
  34     long canon_data_len = 0xf6c4 - 0x1900;              // data_end - data_start
  35     long *canon_bss_start = (void*)0xf6c4;              // just after data
  36     long canon_bss_len = 0x9F498 - 0xf6c4;
  39     long i;
  42     // Enable CPU caches and MPU
  43     asm volatile (
  44     "MRC     p15, 0, R0,c1,c0\n"
  45     "ORR     R0, R0, #0x1000\n"
  46     "ORR     R0, R0, #4\n"
  47     "ORR     R0, R0, #1\n"
  48     "MCR     p15, 0, R0,c1,c0\n"
  49     :::"r0");
  51     for(i=0;i<canon_data_len/4;i++)
canon_data_dst[i]=canon_data_src[i];
  54     for(i=0;i<canon_bss_len/4;i++)
canon_bss_start[i]=0;
  57     // jump to init-sequence that follows the data-copy-routine
  58     asm volatile ("B      sub_FFC001A4_my\n");
  59 };
  62 /*************************************************************/
  63 //** sub_FFC001A4_my @ 0xFFC001A4 - 0xFFC0020C, length=27
  64 void __attribute__((naked,noinline)) sub_FFC001A4_my() {
  65     //http://chdk.setepontos.com/index.php/topic,4194.0.html
  66     *(int*)0x1930=(int)taskCreateHook;
  67     *(int*)0x1934=(int)taskCreateHook;
  69     // replacement of sub_FFC377E4 for correct power-on.
  70     //(short press = playback mode, long press = record mode)
  71     *(int*)(0x2574+0x4)= (*(int*)0xC02200B8) & 1 ? 0x100000 : 0x200000;
  73 asm volatile (
  74 "    LDR     R0, =0xFFC0021C \n"
  75 "    MOV     R1, #0 \n"
  76 "    LDR     R3, =0xFFC00254 \n"
  78 "loc_FFC001B0:\n"
  79 "    CMP     R0, R3 \n"
  80 "    LDRCC   R2, [R0], #4 \n"
  81 "    STRCC   R2, [R1], #4 \n"
  82 "    BCC     loc_FFC001B0 \n"
  83 "    LDR     R0, =0xFFC00254 \n"
  84 "    MOV     R1, #0x4B0 \n"
  85 "    LDR     R3, =0xFFC00468 \n"
  87 "loc_FFC001CC:\n"
  88 "    CMP     R0, R3 \n"
  89 "    LDRCC   R2, [R0], #4 \n"
  90 "    STRCC   R2, [R1], #4 \n"
  91 "    BCC     loc_FFC001CC \n"
  92 "    MOV     R0, #0xD2 \n"
  93 "    MSR     CPSR_cxsf, R0 \n"
  94 "    MOV     SP, #0x1000 \n"
  95 "    MOV     R0, #0xD3 \n"
  96 "    MSR     CPSR_cxsf, R0 \n"
  97 "    MOV     SP, #0x1000 \n"
  98 "    LDR     R0, =0x6C4 \n"
  99 "    LDR     R2, =0xEEEEEEEE \n"
 100 "    MOV     R3, #0x1000 \n"
 102 "loc_FFC00200:\n"
 103 "    CMP     R0, R3 \n"
 104 "    STRCC   R2, [R0], #4 \n"
 105 "    BCC     loc_FFC00200 \n"
 106 "    BL      sub_FFC00FB8_my \n"  // --> Patched. Old value = 0xFFC00FB8.
 107 );
 108 }
 110 /*************************************************************/
 111 //** sub_FFC00FB8_my @ 0xFFC00FB8 - 0xFFC01058, length=41
 112 void __attribute__((naked,noinline)) sub_FFC00FB8_my() {
 113 asm volatile (
 114 "    STR     LR, [SP, #-4]! \n"
 115 "    SUB     SP, SP, #0x74 \n"
 116 "    MOV     R0, SP \n"
 117 "    MOV     R1, #0x74 \n"
 118 "    BL      sub_FFE56D68 \n"
 119 "    MOV     R0, #0x53000 \n"
 120 "    STR     R0, [SP, #4] \n"
 122 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 123 "    LDR     R0, =0x9F498 \n"
 124 #else
 125 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 126 "    LDR     R0, [R0]\n"      //
 127 #endif
 129 "    LDR     R2, =0x2ABC00 \n"
 130 "    LDR     R1, =0x2A4968 \n"
 131 "    STR     R0, [SP, #8] \n"
 132 "    SUB     R0, R1, R0 \n"
 133 "    ADD     R3, SP, #0xC \n"
 134 "    STR     R2, [SP] \n"
 135 "    STMIA   R3, {R0-R2} \n"
 136 "    MOV     R0, #0x22 \n"
 137 "    STR     R0, [SP, #0x18] \n"
 138 "    MOV     R0, #0x68 \n"
 139 "    STR     R0, [SP, #0x1C] \n"
 140 "    LDR     R0, =0x19B \n"
 141 "    MOV     R1, #0x64 \n"
 142 "    STRD    R0, [SP, #0x20] \n"
 143 "    MOV     R0, #0x78 \n"
 144 "    STRD    R0, [SP, #0x28] \n"
 145 "    MOV     R0, #0 \n"
 146 "    STR     R0, [SP, #0x30] \n"
 147 "    STR     R0, [SP, #0x34] \n"
 148 "    MOV     R0, #0x10 \n"
 149 "    STR     R0, [SP, #0x5C] \n"
 150 "    MOV     R0, #0x800 \n"
 151 "    STR     R0, [SP, #0x60] \n"
 152 "    MOV     R0, #0xA0 \n"
 153 "    STR     R0, [SP, #0x64] \n"
 154 "    MOV     R0, #0x280 \n"
 155 "    STR     R0, [SP, #0x68] \n"
 156 "    LDR     R1, =uHwSetup_my \n"  // --> Patched. Old value = 0xFFC04DBC.
 157 "    MOV     R0, SP \n"
 158 "    MOV     R2, #0 \n"
 159 "    BL      sub_FFC02D70 \n"
 160 "    ADD     SP, SP, #0x74 \n"
 161 "    LDR     PC, [SP], #4 \n"
 162 );
 163 }
 165 /*************************************************************/
 166 //** uHwSetup_my @ 0xFFC04DBC - 0xFFC04E30, length=30
 167 void __attribute__((naked,noinline)) uHwSetup_my() {
 168 asm volatile (
 169 "    STMFD   SP!, {R4,LR} \n"
 170 "    BL      sub_FFC0095C \n"
 171 "    BL      sub_FFC09A10 \n"
 172 "    CMP     R0, #0 \n"
 173 "    LDRLT   R0, =0xFFC04ED0 /*'dmSetup'*/ \n"
 174 "    BLLT    _err_init_task \n"
 175 "    BL      sub_FFC049E0 \n"
 176 "    CMP     R0, #0 \n"
 177 "    LDRLT   R0, =0xFFC04ED8 /*'termDriverInit'*/ \n"
 178 "    BLLT    _err_init_task \n"
 179 "    LDR     R0, =0xFFC04EE8 /*'/_term'*/ \n"
 180 "    BL      sub_FFC04ACC \n"
 181 "    CMP     R0, #0 \n"
 182 "    LDRLT   R0, =0xFFC04EF0 /*'termDeviceCreate'*/ \n"
 183 "    BLLT    _err_init_task \n"
 184 "    LDR     R0, =0xFFC04EE8 /*'/_term'*/ \n"
 185 "    BL      sub_FFC0357C \n"
 186 "    CMP     R0, #0 \n"
 187 "    LDRLT   R0, =0xFFC04F04 /*'stdioSetup'*/ \n"
 188 "    BLLT    _err_init_task \n"
 189 "    BL      sub_FFC09598 \n"
 190 "    CMP     R0, #0 \n"
 191 "    LDRLT   R0, =0xFFC04F10 /*'stdlibSetup'*/ \n"
 192 "    BLLT    _err_init_task \n"
 193 "    BL      sub_FFC014D0 \n"
 194 "    CMP     R0, #0 \n"
 195 "    LDRLT   R0, =0xFFC04F1C /*'armlib_setup'*/ \n"
 196 "    BLLT    _err_init_task \n"
 197 "    LDMFD   SP!, {R4,LR} \n"
 198 "    B       CreateTask_Startup_my \n"  // --> Patched. Old value = 0xFFC0DCD4.
 199 );
 200 }
 202 /*************************************************************/
 203 //** CreateTask_Startup_my @ 0xFFC0DCD4 - 0xFFC0DD44, length=29
 204 void __attribute__((naked,noinline)) CreateTask_Startup_my() {
 205 asm volatile (
 206 "    STMFD   SP!, {R3,LR} \n"
 207 //"  BL      _sub_FFC12E30 \n"  // --> Nullsub call removed.
 208 "    BL      sub_FFC1BFA4 \n"
 209 "    CMP     R0, #0 \n"
 210 "    LDREQ   R2, =0xC0220000 \n"
 211 "    LDREQ   R0, [R2, #0xB8] \n"
 212 "    LDREQ   R1, [R2, #0xDC] \n"
 213 "    ORREQ   R0, R0, R1 \n"
 214 "    TSTEQ   R0, #1 \n"
 215 "    BNE     loc_FFC0DD08 \n"
 216 "    MOV     R0, #0x44 \n"
 217 "    STR     R0, [R2, #0x4C] \n"
 219 "loc_FFC0DD04:\n"
 220 "    B       loc_FFC0DD04 \n"
 222 "loc_FFC0DD08:\n"
 223 //"  BL      _sub_FFC377E4 \n"  // Removed for correct power-on
 224 //"  BL      _sub_FFC12E34 \n"  // --> Nullsub call removed.
 225 "    BL      sub_FFC19B30 \n"
 226 "    MOV     R1, #0x300000 \n"
 227 "    MOV     R0, #0 \n"
 228 "    BL      sub_FFC19D78 \n"
 229 "    BL      sub_FFC19D24 /*_EnableDispatch*/ \n"
 230 "    MOV     R3, #0 \n"
 231 "    STR     R3, [SP] \n"
 232 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFFC0DC78.
 233 "    MOV     R2, #0 \n"
 234 "    MOV     R1, #0x19 \n"
 235 "    LDR     R0, =0xFFC0DD4C /*'Startup'*/ \n"
 236 "    BL      _CreateTask \n"
 237 "    MOV     R0, #0 \n"
 238 "    LDMFD   SP!, {R12,PC} \n"
 239 );
 240 }
 242 /*************************************************************/
 243 //** task_Startup_my @ 0xFFC0DC78 - 0xFFC0DCD0, length=23
 244 void __attribute__((naked,noinline)) task_Startup_my() {
 245 asm volatile (
 246 "    STMFD   SP!, {R4,LR} \n"
 247 "    BL      sub_FFC051CC \n"
 248 "    BL      sub_FFC13FC8 \n"
 249 "    BL      sub_FFC10EC8 \n"
 250 //"  BL      _sub_FFC37F70 \n"  // --> Nullsub call removed.
 251 "    BL      sub_FFC1C184 \n"
 252 //"  BL      _sub_FFC1C06C \n"  // load DISKBOOT.BIN
 253 "    BL      CreateTask_spytask\n" // added
 254 "    BL      sub_FFC5F968 \n"
 255 "    BL      sub_FFC1C1D4 \n"
 256 "    BL      sub_FFC19074 \n"
 257 "    BL      sub_FFC1C350 \n"
 258 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFFC12DD0. Checks buttons and acts accordingly
 259 "    BL      sub_FFC15CAC \n"
 260 "    BL      sub_FFC1C368 \n"
 261 //"  BL      _sub_FFC10BBC \n"  // --> Nullsub call removed.
 262 "    BL      sub_FFC12160 \n"
 263 "    BL      sub_FFC1BD50 \n"
 264 "    BL      sub_FFC128FC \n"
 265 "    BL      sub_FFC1206C \n"
 266 "    BL      sub_FFC1CDE0 \n"
 267 "    BL      sub_FFC12028 \n"
 268 "    LDMFD   SP!, {R4,LR} \n"
 269 "    B       sub_FFC05088 \n"
 270 );
 271 }
 273 /*************************************************************/
 274 //** taskcreatePhySw_my @ 0xFFC12DD0 - 0xFFC12E08, length=15
 275 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 276 asm volatile (
 277 "    STMFD   SP!, {R3-R5,LR} \n"
 278 "    LDR     R4, =0x1C98 \n"
 279 "    LDR     R0, [R4, #0x10] \n"
 280 "    CMP     R0, #0 \n"
 281 "    BNE     loc_FFC12E04 \n"
 282 "    MOV     R3, #0 \n"
 283 "    STR     R3, [SP] \n"
 284 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFFC12D9C.
 285 "    MOV     R2, #0x2000 \n"  // --> Patched. Old value = 0x800. stack size for new task_PhySw so we don't have to do stack switch
 286 "    MOV     R1, #0x17 \n"
 287 "    LDR     R0, =0xFFC12FC8 /*'PhySw'*/ \n"
 288 "    BL      sub_FFC0BE90 /*_CreateTaskStrictly*/ \n"
 289 "    STR     R0, [R4, #0x10] \n"
 291 "loc_FFC12E04:\n"
 292 "    LDMFD   SP!, {R3-R5,LR} \n"
 293 "    B       _taskcreate_jogDial \n"
 294 );
 295 }
 297 /*************************************************************/
 298 //** init_file_modules_task @ 0xFFC6358C - 0xFFC635C0, length=14
 299 void __attribute__((naked,noinline)) init_file_modules_task() {
 300 asm volatile (
 301 "    STMFD   SP!, {R4-R6,LR} \n"
 302 "    BL      sub_FFC5C550 \n"
 303 "    LDR     R5, =0x5006 \n"
 304 "    MOVS    R4, R0 \n"
 305 "    MOVNE   R1, #0 \n"
 306 "    MOVNE   R0, R5 \n"
 307 "    BLNE    _PostLogicalEventToUI \n"
 308 "    BL      sub_FFC5C57C_my \n"  // --> Patched. Old value = 0xFFC5C57C.
 309 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 310 "    CMP     R4, #0 \n"
 311 "    MOVEQ   R0, R5 \n"
 312 "    LDMEQFD SP!, {R4-R6,LR} \n"
 313 "    MOVEQ   R1, #0 \n"
 314 "    BEQ     _PostLogicalEventToUI \n"
 315 "    LDMFD   SP!, {R4-R6,PC} \n"
 316 );
 317 }
 319 /*************************************************************/
 320 //** sub_FFC5C57C_my @ 0xFFC5C57C - 0xFFC5C5B4, length=15
 321 void __attribute__((naked,noinline)) sub_FFC5C57C_my() {
 322 asm volatile (
 323 "    STMFD   SP!, {R4,LR} \n"
 324 "    BL      sub_FFC402A8_my \n"  // --> Patched. Old value = 0xFFC402A8.
 325 "    LDR     R4, =0x5908 \n"
 326 "    LDR     R0, [R4, #4] \n"
 327 "    CMP     R0, #0 \n"
 328 "    BNE     loc_FFC5C5AC \n"
 329 "    BL      sub_FFC6BB60 \n"
 330 "    BL      sub_FFCE6D24 \n"
 331 "    BL      sub_FFC6BB60 \n"
 332 "    BL      sub_FFCF0804 \n"
 333 "    BL      sub_FFC6BB70 \n"
 334 "    BL      sub_FFCE6DC4 \n"
 336 "loc_FFC5C5AC:\n"
 337 "    MOV     R0, #1 \n"
 338 "    STR     R0, [R4] \n"
 339 "    LDMFD   SP!, {R4,PC} \n"
 340 );
 341 }
 343 /*************************************************************/
 344 //** sub_FFC402A8_my @ 0xFFC402A8 - 0xFFC40340, length=39
 345 void __attribute__((naked,noinline)) sub_FFC402A8_my() {
 346 asm volatile (
 347 "    STMFD   SP!, {R4-R6,LR} \n"
 348 "    MOV     R6, #0 \n"
 349 "    MOV     R0, R6 \n"
 350 "    BL      sub_FFC3FE78 \n"
 351 "    LDR     R4, =0x11DE0 \n"
 352 "    MOV     R5, #0 \n"
 353 "    LDR     R0, [R4, #0x38] \n"
 354 "    BL      sub_FFC40840 \n"
 355 "    CMP     R0, #0 \n"
 356 "    LDREQ   R0, =0x2BB4 \n"
 357 "    STREQ   R5, [R0, #0xC] \n"
 358 "    STREQ   R5, [R0, #0x10] \n"
 359 "    STREQ   R5, [R0, #0x14] \n"
 360 "    MOV     R0, R6 \n"
 361 "    BL      sub_FFC3FEB8 \n"
 362 "    MOV     R0, R6 \n"
 363 "    BL      sub_FFC400E4_my \n"  // --> Patched. Old value = 0xFFC400E4.
 364 "    MOV     R5, R0 \n"
 365 "    MOV     R0, R6 \n"
 366 "    BL      sub_FFC40150 \n"
 367 "    LDR     R1, [R4, #0x3C] \n"
 368 "    AND     R2, R5, R0 \n"
 369 "    CMP     R1, #0 \n"
 370 "    MOV     R0, #0 \n"
 371 "    MOVEQ   R0, #0x80000001 \n"
 372 "    BEQ     loc_FFC4033C \n"
 373 "    LDR     R3, [R4, #0x2C] \n"
 374 "    CMP     R3, #2 \n"
 375 "    MOVEQ   R0, #4 \n"
 376 "    CMP     R1, #5 \n"
 377 "    ORRNE   R0, R0, #1 \n"
 378 "    BICEQ   R0, R0, #1 \n"
 379 "    CMP     R2, #0 \n"
 380 "    BICEQ   R0, R0, #2 \n"
 381 "    ORREQ   R0, R0, #0x80000000 \n"
 382 "    BICNE   R0, R0, #0x80000000 \n"
 383 "    ORRNE   R0, R0, #2 \n"
 385 "loc_FFC4033C:\n"
 386 "    STR     R0, [R4, #0x40] \n"
 387 "    LDMFD   SP!, {R4-R6,PC} \n"
 388 );
 389 }
 391 /*************************************************************/
 392 //** sub_FFC400E4_my @ 0xFFC400E4 - 0xFFC4014C, length=27
 393 void __attribute__((naked,noinline)) sub_FFC400E4_my() {
 394 asm volatile (
 395 "    STMFD   SP!, {R4-R6,LR} \n"
 396 "    LDR     R5, =0x2BB4 \n"
 397 "    MOV     R6, R0 \n"
 398 "    LDR     R0, [R5, #0x10] \n"
 399 "    CMP     R0, #0 \n"
 400 "    MOVNE   R0, #1 \n"
 401 "    LDMNEFD SP!, {R4-R6,PC} \n"
 402 "    MOV     R0, #0x17 \n"
 403 "    MUL     R1, R0, R6 \n"
 404 "    LDR     R0, =0x11DE0 \n"
 405 "    ADD     R4, R0, R1, LSL#2 \n"
 406 "    LDR     R0, [R4, #0x38] \n"
 407 "    MOV     R1, R6 \n"
 408 "    BL      sub_FFC3FF7C_my \n"  // --> Patched. Old value = 0xFFC3FF7C.
 409 "    CMP     R0, #0 \n"
 410 "    LDMEQFD SP!, {R4-R6,PC} \n"
 411 "    LDR     R0, [R4, #0x38] \n"
 412 "    MOV     R1, R6 \n"
 413 "    BL      sub_FFC40958 \n"
 414 "    CMP     R0, #0 \n"
 415 "    LDMEQFD SP!, {R4-R6,PC} \n"
 416 "    MOV     R0, R6 \n"
 417 "    BL      sub_FFC3FA98 \n"
 418 "    CMP     R0, #0 \n"
 419 "    MOVNE   R1, #1 \n"
 420 "    STRNE   R1, [R5, #0x10] \n"
 421 "    LDMFD   SP!, {R4-R6,PC} \n"
 422 );
 423 }
 425 /*************************************************************/
 426 //** sub_FFC3FF7C_my @ 0xFFC3FF7C - 0xFFC400E0, length=90
 427 void __attribute__((naked,noinline)) sub_FFC3FF7C_my() {
 428 asm volatile (
 429 "    STMFD   SP!, {R4-R8,LR} \n"
 430 "    MOV     R8, R0 \n"
 431 "    MOV     R0, #0x17 \n"
 432 "    MUL     R1, R0, R1 \n"
 433 "    LDR     R0, =0x11DE0 \n"
 434 "    MOV     R6, #0 \n"
 435 "    ADD     R7, R0, R1, LSL#2 \n"
 436 "    LDR     R0, [R7, #0x3C] \n"
 437 "    MOV     R5, #0 \n"
 438 "    CMP     R0, #6 \n"
 439 "    ADDLS   PC, PC, R0, LSL#2 \n"
 440 "    B       loc_FFC400C8 \n"
 441 "    B       loc_FFC3FFE0 \n"
 442 "    B       loc_FFC3FFC8 \n"
 443 "    B       loc_FFC3FFC8 \n"
 444 "    B       loc_FFC3FFC8 \n"
 445 "    B       loc_FFC3FFC8 \n"
 446 "    B       loc_FFC400C0 \n"
 447 "    B       loc_FFC3FFC8 \n"
 449 "loc_FFC3FFC8:\n"
 450 "    MOV     R2, #0 \n"
 451 "    MOV     R1, #0x200 \n"
 452 "    MOV     R0, #3 \n"
 453 "    BL      _exmem_ualloc \n"
 454 "    MOVS    R4, R0 \n"
 455 "    BNE     loc_FFC3FFE8 \n"
 457 "loc_FFC3FFE0:\n"
 458 "    MOV     R0, #0 \n"
 459 "    LDMFD   SP!, {R4-R8,PC} \n"
 461 "loc_FFC3FFE8:\n"
 462 "    LDR     R12, [R7, #0x4C] \n"
 463 "    MOV     R3, R4 \n"
 464 "    MOV     R2, #1 \n"
 465 "    MOV     R1, #0 \n"
 466 "    MOV     R0, R8 \n"
 467 "    BLX     R12 \n"
 468 "    CMP     R0, #1 \n"
 469 "    BNE     loc_FFC40014 \n"
 470 "    MOV     R0, #3 \n"
 471 "    BL      _exmem_ufree \n"
 472 "    B       loc_FFC3FFE0 \n"
 474 "loc_FFC40014:\n"
 475 "    MOV     R0, R8 \n"
 476 "    BL      sub_FFCFF8B8 \n"
 478 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 479 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 481 // Start of DataGhost's FAT32 autodetection code
 482 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 483 // According to the code below, we can use R1, R2, R3 and R12.
 484 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 485 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 486 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 487 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 488 "    MOV     R1, #1\n"              // Note the current partition number
 489 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 490 "dg_sd_fat32:\n"
 491 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 492 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 493 "    ADD     R12, R12, #0x10\n"     // Second partition
 494 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 495 "dg_sd_fat32_enter:\n"
 496 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 497 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 498 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 499 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 500 "    CMPNE   R3, #0x7\n"            // exFat?
 501 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 502 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 503 "    CMPNE   R2, #0x80\n"
 504 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 505                                     // This partition is valid, it's the first one, bingo!
 506 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 508 "dg_sd_fat32_end:\n"
 509 // End of DataGhost's FAT32 autodetection code
 511 "    LDRB    R1, [R4, #0x1C9] \n"
 512 "    LDRB    R3, [R4, #0x1C8] \n"
 513 "    LDRB    R12, [R4, #0x1CC] \n"
 514 "    MOV     R1, R1, LSL#24 \n"
 515 "    ORR     R1, R1, R3, LSL#16 \n"
 516 "    LDRB    R3, [R4, #0x1C7] \n"
 517 "    LDRB    R2, [R4, #0x1BE] \n"
 518 //"  LDRB    LR, [R4, #0x1FF] \n"
 519 "    ORR     R1, R1, R3, LSL#8 \n"
 520 "    LDRB    R3, [R4, #0x1C6] \n"
 521 "    CMP     R2, #0 \n"
 522 "    CMPNE   R2, #0x80 \n"
 523 "    ORR     R1, R1, R3 \n"
 524 "    LDRB    R3, [R4, #0x1CD] \n"
 525 "    MOV     R3, R3, LSL#24 \n"
 526 "    ORR     R3, R3, R12, LSL#16 \n"
 527 "    LDRB    R12, [R4, #0x1CB] \n"
 528 "    ORR     R3, R3, R12, LSL#8 \n"
 529 "    LDRB    R12, [R4, #0x1CA] \n"
 530 "    ORR     R3, R3, R12 \n"
 531 //"  LDRB    R12, [R4, #0x1FE] \n"  // Replaced, see below
 532 //mod start
 533 "    LDRB    R12, [LR,#0x1FE]\n"           // New! First MBR signature byte (0x55)
 534 "    LDRB    LR, [LR,#0x1FF]\n"            //      Last MBR signature byte (0xAA)
 535 //mod end
 536 "    MOV     R4, #0 \n"
 537 "    BNE     loc_FFC4009C \n"
 538 "    CMP     R0, R1 \n"
 539 "    BCC     loc_FFC4009C \n"
 540 "    ADD     R2, R1, R3 \n"
 541 "    CMP     R2, R0 \n"
 542 "    CMPLS   R12, #0x55 \n"
 543 "    CMPEQ   LR, #0xAA \n"
 544 "    MOVEQ   R6, R1 \n"
 545 "    MOVEQ   R5, R3 \n"
 546 "    MOVEQ   R4, #1 \n"
 548 "loc_FFC4009C:\n"
 549 "    MOV     R0, #3 \n"
 550 "    BL      _exmem_ufree \n"
 551 "    CMP     R4, #0 \n"
 552 "    BNE     loc_FFC400D4 \n"
 553 "    MOV     R6, #0 \n"
 554 "    MOV     R0, R8 \n"
 555 "    BL      sub_FFCFF8B8 \n"
 556 "    MOV     R5, R0 \n"
 557 "    B       loc_FFC400D4 \n"
 559 "loc_FFC400C0:\n"
 560 "    MOV     R5, #0x40 \n"
 561 "    B       loc_FFC400D4 \n"
 563 "loc_FFC400C8:\n"
 564 "    LDR     R1, =0x365 \n"
 565 "    LDR     R0, =0xFFC3FF70 /*'Mounter.c'*/ \n"
 566 "    BL      _DebugAssert \n"
 568 "loc_FFC400D4:\n"
 569 "    STR     R6, [R7, #0x44]! \n"
 570 "    MOV     R0, #1 \n"
 571 "    STR     R5, [R7, #4] \n"
 572 "    LDMFD   SP!, {R4-R8,PC} \n"
 573 );
 574 }
 576 /*************************************************************/
 577 //** JogDial_task_my @ 0xFFC3802C - 0xFFC38124, length=63
 578 void __attribute__((naked,noinline)) JogDial_task_my() {
 579 asm volatile (
 580 "    STMFD   SP!, {R3-R11,LR} \n"
 581 "    BL      sub_FFC382A8 \n"
 582 "    LDR     R11, =0x80000B01 \n"
 583 "    LDR     R8, =0xFFE5FAA4 \n"
 584 "    LDR     R7, =0xC0240000 \n"
 585 "    LDR     R6, =0x2590 \n"
 586 "    MOV     R9, #1 \n"
 587 "    MOV     R10, #0 \n"
 589 "loc_FFC3804C:\n"
 590 "    LDR     R3, =0x191 \n"
 591 "    LDR     R0, [R6, #0x10] \n"
 592 "    LDR     R2, =0xFFC38278 /*'JogDial.c'*/ \n"
 593 "    MOV     R1, #0 \n"
 594 "    BL      sub_FFC0BF78 /*_TakeSemaphoreStrictly*/ \n"
 595 "    MOV     R0, #0x28 \n"
 596 "    BL      _SleepTask \n"
 597 //------------------  added code ---------------------
 598 "labelA:\n"
 599 "    LDR     R0, =jogdial_stopped\n"
 600 "    LDR     R0, [R0]\n"
 601 "    CMP     R0, #1\n"
 602 "    BNE     labelB\n"
 603 "    MOV     R0, #40\n"
 604 "    BL      _SleepTask\n"
 605 "    B       labelA\n"
 606 "labelB:\n"
 607 //------------------  original code ------------------
 608 "    LDR     R0, [R7, #0x304] \n"
 609 "    MOV     R0, R0, ASR#16 \n"
 610 "    STRH    R0, [R6] \n"
 611 "    LDRSH   R2, [R6, #2] \n"
 612 "    SUB     R1, R0, R2 \n"
 613 "    CMP     R1, #0 \n"
 614 "    BEQ     loc_FFC38110 \n"
 615 "    MOV     R5, R1 \n"
 616 "    RSBLT   R5, R5, #0 \n"
 617 "    MOVLE   R4, #0 \n"
 618 "    MOVGT   R4, #1 \n"
 619 "    CMP     R5, #0xFF \n"
 620 "    BLS     loc_FFC380C4 \n"
 621 "    CMP     R1, #0 \n"
 622 "    RSBLE   R1, R2, #0xFF \n"
 623 "    ADDLE   R1, R1, #0x7F00 \n"
 624 "    ADDLE   R0, R1, R0 \n"
 625 "    RSBGT   R0, R0, #0xFF \n"
 626 "    ADDGT   R0, R0, #0x7F00 \n"
 627 "    ADDGT   R0, R0, R2 \n"
 628 "    ADD     R5, R0, #0x8000 \n"
 629 "    ADD     R5, R5, #1 \n"
 630 "    EOR     R4, R4, #1 \n"
 632 "loc_FFC380C4:\n"
 633 "    LDR     R0, [R6, #0x18] \n"
 634 "    CMP     R0, #0 \n"
 635 "    BEQ     loc_FFC38108 \n"
 636 "    LDR     R0, [R6, #0x20] \n"
 637 "    CMP     R0, #0 \n"
 638 "    BEQ     loc_FFC380F0 \n"
 639 "    LDR     R1, [R8, R4, LSL#2] \n"
 640 "    CMP     R1, R0 \n"
 641 "    BEQ     loc_FFC380F8 \n"
 642 "    LDR     R0, =0xB01 \n"
 643 "    BL      sub_FFC5F408 \n"
 645 "loc_FFC380F0:\n"
 646 "    MOV     R0, R11 \n"
 647 "    BL      sub_FFC5F408 \n"
 649 "loc_FFC380F8:\n"
 650 "    LDR     R0, [R8, R4, LSL#2] \n"
 651 "    MOV     R1, R5 \n"
 652 "    STR     R0, [R6, #0x20] \n"
 653 "    BL      sub_FFC5F364 \n"
 655 "loc_FFC38108:\n"
 656 "    LDRH    R0, [R6] \n"
 657 "    STRH    R0, [R6, #2] \n"
 659 "loc_FFC38110:\n"
 660 "    STR     R10, [R7, #0x300] \n"
 661 "    STR     R9, [R7, #0x308] \n"
 662 "    LDR     R0, [R6, #0x14] \n"
 663 "    CMP     R0, #0 \n"
 664 "    BLNE    _SleepTask \n"
 665 "    B       loc_FFC3804C \n"
 666 );
 667 }