root/platform/ixus110_sd960/sub/101f/boot.c

DEFINITIONS

1. taskHook
2. boot
3. sub_FF8101A0_my
4. sub_FF810FC4_my
5. sub_FF814D38_my
6. taskcreate_Startup_my
7. task_Startup_my
8. taskcreatePhySw_my
9. CreateTask_spytask
10. init_file_modules_task
11. sub_FF86FEBC_my
12. sub_FF853244_my
13. sub_FF852FE4_my
14. sub_FF852D74_my
15. task_JogDial_my
16. task_blinker
17. CreateTask_blinker

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 #include "dryos31.h"
   6 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
   8 const char * const new_sa = &_end;
  10 /* Ours stuff */
  11 extern long wrs_kernel_bss_start;
  12 extern long wrs_kernel_bss_end;
  14 // Forward declarations
  15 void CreateTask_spytask();
  16 void boot();
  17 void capt_seq_task();
  19 extern void task_CaptSeq();
  20 extern void task_InitFileModules();
  21 extern void task_MovieRecord();
  22 extern void task_ExpDrv();
  23 extern void task_RotaryEncoder();
  24 extern void task_FileWrite();
  25 void task_JogDial_my();
  27 void taskHook(context_t **context) { 
task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  30 // physw is done directly to avoid wasting stack space
  31 // if(!_strcmp(tcb->name, "PhySw"))           tcb->entry = (void*)mykbd_task; 
  32  if(tcb->entry == task_CaptSeq)         tcb->entry = (void*)capt_seq_task; 
  33  if(tcb->entry == task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
  34  if(tcb->entry == task_MovieRecord)     tcb->entry = (void*)movie_record_task;
  35  if(tcb->entry == task_ExpDrv)          tcb->entry = (void*)exp_drv_task;
  36  if(tcb->entry == task_RotaryEncoder)   tcb->entry = (void*)task_JogDial_my;
  37  if(tcb->entry == task_FileWrite)       tcb->entry = (void*)filewritetask;
  38 }
  40 #define DEBUG_LED ((unsigned volatile *)0xC0220130) // green?
  41 #define GREEN_LED ((unsigned volatile *)0xC0220134) // red?
  42 //0xc0220018: ixus110 sd power?
  44 void boot() {
  45     asm volatile(
  46       "    LDR     R1, =0xC0410000 \n" 
  47       "    MOV     R0, #0 \n" 
  48       "    STR     R0, [R1] \n" 
  49       "    MOV     R1, #0x78 \n" 
  50       "    MCR     p15, 0, R1, c1, c0 \n" 
  51       "    MOV     R1, #0 \n" 
  52       "    MCR     p15, 0, R1, c7, c10, 4 \n" 
  53       "    MCR     p15, 0, R1, c7, c5 \n" 
  54       "    MCR     p15, 0, R1, c7, c6 \n" 
  55       "    MOV     R0, #0x3D \n" 
  56       "    MCR     p15, 0, R0, c6, c0 \n" 
  57       "    MOV     R0, #0xC000002F \n" 
  58       "    MCR     p15, 0, R0, c6, c1 \n" 
  59       "    MOV     R0, #0x33 \n" 
  60       "    MCR     p15, 0, R0, c6, c2 \n" 
  61       "    MOV     R0, #0x40000033 \n" 
  62       "    MCR     p15, 0, R0, c6, c3 \n" 
  63       "    MOV     R0, #0x80000017 \n" 
  64       "    MCR     p15, 0, R0, c6, c4 \n" 
  65       "    LDR     R0, =0xFF80002D \n" 
  66       "    MCR     p15, 0, R0, c6, c5 \n" 
  67       "    MOV     R0, #0x34 \n" 
  68       "    MCR     p15, 0, R0, c2, c0 \n" 
  69       "    MOV     R0, #0x34 \n" 
  70       "    MCR     p15, 0, R0, c2, c0, 1 \n" 
  71       "    MOV     R0, #0x34 \n" 
  72       "    MCR     p15, 0, R0, c3, c0 \n" 
  73       "    LDR     R0, =0x3333330 \n" 
  74       "    MCR     p15, 0, R0, c5, c0, 2 \n" 
  75       "    LDR     R0, =0x3333330 \n" 
  76       "    MCR     p15, 0, R0, c5, c0, 3 \n" 
  77       "    MRC     p15, 0, R0, c1, c0 \n" 
  78       "    ORR     R0, R0, #0x1000 \n" 
  79       "    ORR     R0, R0, #4 \n" 
  80       "    ORR     R0, R0, #1 \n" 
  81       "    MCR     p15, 0, R0, c1, c0 \n" 
  82       "    MOV     R1, #0x80000006 \n" 
  83       "    MCR     p15, 0, R1, c9, c1 \n" 
  84       "    MOV     R1, #6 \n" 
  85       "    MCR     p15, 0, R1, c9, c1, 1 \n" 
  86       "    MRC     p15, 0, R1, c1, c0 \n" 
  87       "    ORR     R1, R1, #0x50000 \n" 
  88       "    MCR     p15, 0, R1, c1, c0 \n" 
  89       "    LDR     R2, =0xC0200000 \n" 
  90       "    MOV     R1, #1 \n" 
  91       "    STR     R1, [R2, #0x10C] \n" 
  92       "    MOV     R1, #0xFF \n" 
  93       "    STR     R1, [R2, #0xC] \n" 
  94       "    STR     R1, [R2, #0x1C] \n" 
  95       "    STR     R1, [R2, #0x2C] \n" 
  96       "    STR     R1, [R2, #0x3C] \n" 
  97       "    STR     R1, [R2, #0x4C] \n" 
  98       "    STR     R1, [R2, #0x5C] \n" 
  99       "    STR     R1, [R2, #0x6C] \n" 
 100       "    STR     R1, [R2, #0x7C] \n" 
 101       "    STR     R1, [R2, #0x8C] \n" 
 102       "    STR     R1, [R2, #0x9C] \n" 
 103       "    STR     R1, [R2, #0xAC] \n" 
 104       "    STR     R1, [R2, #0xBC] \n" 
 105       "    STR     R1, [R2, #0xCC] \n" 
 106       "    STR     R1, [R2, #0xDC] \n" 
 107       "    STR     R1, [R2, #0xEC] \n" 
 108       "    STR     R1, [R2, #0xFC] \n" 
 109       "    LDR     R1, =0xC0400008 \n" 
 110       "    LDR     R2, =0x430005 \n" 
 111       "    STR     R2, [R1] \n" 
 112       "    MOV     R1, #1 \n" 
 113       "    LDR     R2, =0xC0243100 \n" 
 114       "    STR     R2, [R1] \n" 
 115       "    LDR     R2, =0xC0242010 \n" 
 116       "    LDR     R1, [R2] \n" 
 117       "    ORR     R1, R1, #1 \n" 
 118       "    STR     R1, [R2] \n" 
 119       "    LDR     R0, =0xFFB7E0D4 \n" 
 120       "    LDR     R1, =0x1900 \n" 
 121       "    LDR     R3, =0xD7EC \n" 
 122 "loc_FF81013C:\n"
 123       "    CMP     R1, R3 \n" 
 124       "    LDRCC   R2, [R0], #4 \n" 
 125       "    STRCC   R2, [R1], #4 \n" 
 126       "    BCC     loc_FF81013C \n" 
 127       "    LDR     R1, =0x148428 \n" 
 128       "    MOV     R2, #0 \n" 
 129 "loc_FF810154:\n"
 130       "    CMP     R3, R1 \n" 
 131       "    STRCC   R2, [R3], #4 \n" 
 132       "    BCC     loc_FF810154 \n" 
 133     );
 135     *(int*)0x1934=(int)taskHook;
 137     // Search on 0x12345678 finds function called by sub_FF8439F4, values found there OK ?
 138     *(int*)(0x22CC)= (*(int*)0xC0220080)&1 ? 0x400000 : 0x200000; 
 140     // jump to init-sequence that follows the data-copy-routine 
 141     asm volatile ("B      sub_FF8101A0_my\n");
 142 }
 144 void __attribute__((naked,noinline)) sub_FF8101A0_my() {
 145         asm volatile (
 146 "                LDR     R0, =0xFF810218\n" // exception handler code
 147 "                MOV     R1, #0\n"
 148 "                LDR     R3, =0xFF810250\n"
 149 "loc_FF8101AC:\n"
 150 "                CMP     R0, R3\n"          // load exception vector
 151 "                LDRCC   R2, [R0],#4\n"
 152 "                STRCC   R2, [R1],#4\n"
 153 "                BCC     loc_FF8101AC\n"
 154 "                LDR     R0, =0xFF810250\n"
 155 "                MOV     R1, #0x4B0\n"
 156 "                LDR     R3, =0xFF810464\n"
 157 "loc_FF8101C8:\n"
 158 "                CMP     R0, R3\n"          // copy IRQ handler to ITCM starting at 0x4b0, 532 bytes up to 0x6C4
 159 "                LDRCC   R2, [R0],#4\n"
 160 "                STRCC   R2, [R1],#4\n"
 161 "                BCC     loc_FF8101C8\n"
 162 "                MOV     R0, #0xD2\n"
 163 "                MSR     CPSR_cxsf, R0\n"   // set CPSR mode = IRQ, ints disabled
 164 "                MOV     SP, #0x1000\n"     // irq mode SP
 165 "                MOV     R0, #0xD3\n"
 166 "                MSR     CPSR_cxsf, R0\n"   // set CPSR mode = Super, ints disabled
 167 "                MOV     SP, #0x1000\n"     // super mode SP
 168 "                LDR     R0, =0x6C4\n"
 169 "                LDR     R2, =0xEEEEEEEE\n"
 170 "                MOV     R3, #0x1000\n"
 171 "loc_FF8101FC:\n"
 172 "                CMP     R0, R3\n"          // clear ITCM 0x6C4-end with EEEEEEEE
 173 "                STRCC   R2, [R0],#4\n"
 174 "                BCC     loc_FF8101FC\n"
 175 "                BL      sub_FF810FC4_my\n" //->
 176         );
 177 }
 180 void __attribute__((naked,noinline)) sub_FF810FC4_my(  ) {
 181 asm volatile (
 182       "    STR     LR, [SP, #-4]! \n" 
 183       "    SUB     SP, SP, #0x74 \n" 
 184       "    MOV     R0, SP \n" 
 185       "    MOV     R1, #0x74 \n" 
 186       "    BL      sub_FFAE95E0 \n" 
 187       "    MOV     R0, #0x53000 \n" 
 188       "    STR     R0, [SP, #4] \n" 
 189 #ifdef CHDK_NOT_IN_CANON_HEAP
 190       "    LDR     R0, =0x148428 \n" 
 191 #else
 192       "LDR     R0, =new_sa\n"
 193       "LDR     R0, [R0]\n"
 194 #endif
 195       "    LDR     R2, =0x2F9C00 \n" 
 196       "    LDR     R1, =0x2F24A8 \n" 
 197       "    STR     R0, [SP, #8] \n" 
 198       "    SUB     R0, R1, R0 \n" 
 199       "    ADD     R3, SP, #0xC \n" 
 200       "    STR     R2, [SP] \n" 
 201       "    STMIA   R3, {R0-R2} \n" 
 202       "    MOV     R0, #0x22 \n" 
 203       "    STR     R0, [SP, #0x18] \n" 
 204       "    MOV     R0, #0x68 \n" 
 205       "    STR     R0, [SP, #0x1C] \n" 
 206       "    LDR     R0, =0x19B \n" 
 207       "    LDR     R1, =sub_FF814D38_my \n" 
 208       "LDR     PC, =0xFF811018\n" // jump back to original FW
 209 /*      "    STR     R0, [SP, #0x20] \n" 
 210       "    MOV     R0, #0x96 \n" 
 211       "    STR     R0, [SP, #0x24] \n" 
 212       "    MOV     R0, #0x78 \n" 
 213       "    STR     R0, [SP, #0x28] \n" 
 214       "    MOV     R0, #0x64 \n" 
 215       "    STR     R0, [SP, #0x2C] \n" 
 216       "    MOV     R0, #0 \n" 
 217       "    STR     R0, [SP, #0x30] \n" 
 218       "    STR     R0, [SP, #0x34] \n" 
 219       "    MOV     R0, #0x10 \n" 
 220       "    STR     R0, [SP, #0x5C] \n" 
 221       "    MOV     R0, #0x800 \n" 
 222       "    STR     R0, [SP, #0x60] \n" 
 223       "    MOV     R0, #0xA0 \n" 
 224       "    STR     R0, [SP, #0x64] \n" 
 225       "    MOV     R0, #0x280 \n" 
 226       "    STR     R0, [SP, #0x68] \n" 
 227       "    MOV     R0, SP \n" 
 228       "    MOV     R2, #0 \n" 
 229       "    BL      sub_FF812D68 \n" 
 230       "    ADD     SP, SP, #0x74 \n" 
 231       "    LDR     PC, [SP], #4 \n" */
 232       );
 233 }
 235 void __attribute__((naked,noinline)) sub_FF814D38_my() {
 236     asm volatile (
 237 "                STMFD   SP!, {R4,LR}\n"
 238 "                BL      sub_FF810954\n"
 239 "                BL      sub_FF8190B4\n" // dmSetup
 240 "                CMP     R0, #0\n"
 241 "                LDRLT   R0, =0xFF814E4C\n"    // "dmSetup"
 242 "                BLLT    sub_FF814E2C\n" // err_init_task
 243 "                BL      sub_FF814974\n"
 244 "                CMP     R0, #0\n"
 245 "                LDRLT   R0,=0xFF814E54\n" // "termDriverInit"
 246 "                BLLT    sub_FF814E2C\n" // err_init_task
 247 "                LDR     R0, =0xFF814E64\n"      // "/_term"
 248 "                BL      sub_FF814A5C\n" // termDeviceCreate
 249 "                CMP     R0, #0\n"
 250 "                LDRLT   R0, =0xFF814E6C\n" // "termDeviceCreate"
 251 "                BLLT    sub_FF814E2C\n" // err_init_task
 252 "                LDR     R0, =0xFF814E64\n"      // "/_term"
 253 "                BL      sub_FF813578\n" // stdioSetup
 254 "                CMP     R0, #0\n"
 255 "                LDRLT   R0, =0xFF814E80\n" // "stdioSetup"
 256 "                BLLT    sub_FF814E2C\n" // err_init_task
 257 "                BL      sub_FF818BCC\n"
 258 "                CMP     R0, #0\n"
 259 "                LDRLT   R0, =0xFF814E8C\n" // "stdlibSetup"
 260 "                BLLT    sub_FF814E2C\n" // err_init_task
 261 "                BL      sub_FF8114A8\n"
 262 "                CMP     R0, #0\n"
 263 "                LDRLT   R0, =0xFF814E98\n" // "armlib_setup"
 264 "                BLLT    sub_FF814E2C\n" // err_init_task
 265 "                LDMFD   SP!, {R4,LR}\n"
 266 "                B       taskcreate_Startup_my\n" //sub_FF81C260
 267     );
 268 }
 270 void __attribute__((naked,noinline)) taskcreate_Startup_my() { //sub_FF81C260
 271     asm volatile (
 272       "    STMFD   SP!, {R3,LR} \n" 
 273 //      "    BL      sub_FF821BA4 \n"   //- nullsub
 274       "    BL      sub_FF828D20 \n" 
 275       "    CMP     R0, #0 \n" 
 276       "    BNE     loc_FF81C298 \n" 
 277       "    BL      sub_FF821BA0 \n" 
 278       "    CMP     R0, #0 \n" 
 279       "    BNE     loc_FF81C298 \n" 
 280       "    BL      sub_FF821248 \n" 
 281       "    LDR     R1, =0xC0220000 \n" 
 282       "    MOV     R0, #0x44 \n" 
 283       "    STR     R0, [R1, #0x1C] \n" 
 284       "    BL      sub_FF821438 \n" 
 285 "loc_FF81C294:\n"
 286       "    B       loc_FF81C294 \n" 
 287 "loc_FF81C298:\n"
 288 //      "    BL      sub_FF821BAC \n"   //- for correct power on
 289 //      "    BL      sub_FF821BA8 \n"   //- nullsub
 290       "    BL      sub_FF826FD8 \n" 
 291       "    LDR     R1, =0x34E000 \n" 
 292       "    MOV     R0, #0 \n" 
 293       "    BL      sub_FF827420 \n" 
 294       "    BL      sub_FF8271CC \n" 
 295       "    MOV     R3, #0 \n" 
 296       "    STR     R3, [SP] \n" 
 297       "    LDR     R3, =task_Startup_my\n"  //sub_FF81C1FC
 298       "    MOV     R2, #0 \n" 
 299       "    MOV     R1, #0x19 \n" 
 300       "    LDR     R0, =0xFF81C2E0 \n" 
 301       "    BL      sub_FF81AFAC \n" 
 302       "    MOV     R0, #0 \n" 
 303       "    LDMFD   SP!, {R12,PC} \n" 
 304     );
 305 }
 307 void CreateTask_blinker();
 309 void __attribute__((naked,noinline)) task_Startup_my(  ) {  //sub_FF81C1FC
 310 asm volatile (
 311       "    STMFD   SP!, {R4,LR} \n"
 312       "    BL      sub_FF815394 \n"
 313       "    BL      sub_FF822C88 \n"
 314       "    BL      sub_FF820F04 \n"
 315 //      "    BL      sub_FF828D60 \n"   //- nullsub
 316       "    BL      sub_FF828F44 \n"
 317 //      "    BL      sub_FF828DF4 \n"   //- init sd, start diskboot
 318       "    BL      CreateTask_spytask\n"//+
 319       "    BL      sub_FF8290EC \n"
 320       "    BL      sub_FF81FB90 \n"
 321       "    BL      sub_FF828F74 \n"
 322       "    BL      sub_FF8265D8 \n"
 323       "    BL      sub_FF8290F0 \n"
 324       "    BL      taskcreatePhySw_my\n"// sub_FF821A94
 325       "    LDR PC, =0xff81c230\n"       //+ jump back to ROM
 326 /*      "    BL      sub_FF824AC8 \n"
 327       "    BL      sub_FF829108 \n"
 328       "    BL      sub_FF81EFB0 \n"
 329       "    BL      sub_FF820808 \n"
 330       "    BL      sub_FF828AFC \n"
 331       "    BL      sub_FF820EB4 \n"
 332       "    BL      sub_FF820714 \n"
 333       "    BL      sub_FF81FBC4 \n"
 334       "    BL      sub_FF829BCC \n"
 335       "    BL      sub_FF8206EC \n"
 336       "    LDMFD   SP!, {R4,LR} \n"
 337       "    B       sub_FF8154B4 \n"*/
 338     );
 339 }
 341 void __attribute__((naked,noinline)) taskcreatePhySw_my() {  //sub_FF821A94
 342 asm volatile (
 343       "    STMFD   SP!, {R3-R5,LR} \n"
 344       "    LDR     R4, =0x1C28 \n"
 345       "    LDR     R0, [R4, #0x10] \n"
 346       "    CMP     R0, #0 \n"
 347       "    BNE     loc_FF821AC8 \n"
 348       "    MOV     R3, #0 \n"
 349       "    STR     R3, [SP] \n"
 350       "    LDR     R3, =mykbd_task\n"     // 0xFF821A60
 351 //      "    MOV     R2, #0x800 \n"       //- original stack size
 352       "    MOV     R2, #0x2000 \n"        //+ new stack size
 353       "    MOV     R1, #0x17 \n"
 354       "    LDR     R0, =0xFF821C98 \n"    // "PhySw"
 355       "    BL      sub_FF827220 \n"
 356       "    STR     R0, [R4, #0x10] \n"
 357 "loc_FF821AC8:\n"
 358       "    BL      sub_FF84431C \n"
 359       "    BL      sub_FF86DA80 \n"
 360       "    BL      sub_FF847864 \n"
 361       "    CMP     R0, #0 \n"
 362       "    LDREQ   R1, =0xEC84 \n"
 363       "    LDMEQFD SP!, {R3-R5,LR} \n"
 364       "    BEQ     sub_FF86DA08 \n"
 365       "    LDMFD   SP!, {R3-R5,PC} \n"
 366     );
 367 }
 369 void CreateTask_spytask() {
_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
 371 }
 373 void __attribute__((naked,noinline)) init_file_modules_task() {  //sub_FF87AAC0
 374 asm volatile (
 375       "    STMFD   SP!, {R4-R6,LR} \n"
 376       "    BL      sub_FF86FE90 \n"
 377       "    LDR     R5, =0x5006 \n"
 378       "    MOVS    R4, R0 \n"
 379       "    MOVNE   R1, #0 \n"
 380       "    MOVNE   R0, R5 \n"
 381       "    BLNE    sub_FF874D2C \n"
 382       "    BL      sub_FF86FEBC_my \n"          // ->
 383       "    BL      core_spytask_can_start\n"    // + safe to start spytask
 384       "    CMP     R4, #0 \n"                   // rom:ff87aae0
 385       "    MOVEQ   R0, R5 \n"
 386       "    LDMEQFD SP!, {R4-R6,LR} \n"
 387       "    MOVEQ   R1, #0 \n"
 388       "    BEQ     sub_FF874D2C \n"
 389       "    LDMFD   SP!, {R4-R6,PC} \n"
 390     );
 391 }
 393 void __attribute__((naked,noinline)) sub_FF86FEBC_my(  ) {
 394 asm volatile (
 395       "    STMFD   SP!, {R4,LR} \n"
 396       "    MOV     R0, #3 \n"
 397       "    BL      sub_FF853244_my \n"  //->
 398       "    LDR PC, =0xff86fecc\n"
 399 /*      "    BL      sub_FF8FF418 \n" //nullsub
 400       "    LDR     R4, =0x2D04 \n"  // rom:ff86fecc
 401       "    LDR     R0, [R4, #4] \n"
 402       "    CMP     R0, #0 \n"
 403       "    BNE     loc_FF86FEF4 \n"
 404       "    BL      sub_FF852608 \n"
 405       "    BL      sub_FF8F2828 \n"
 406       "    BL      sub_FF852608 \n"
 407       "    BL      sub_FF84E65C \n"
 408       "    BL      sub_FF852508 \n"
 409       "    BL      sub_FF8F28F4 \n"
 410 "loc_FF86FEF4:\n"
 411       "    MOV     R0, #1 \n"
 412       "    STR     R0, [R4] \n"
 413       "    LDMFD   SP!, {R4,PC} \n"*/
 414       );
 415 }
 418 void __attribute__((naked,noinline)) sub_FF853244_my(  ) {
 419 asm volatile (
 420       "    STMFD   SP!, {R4-R8,LR} \n"
 421       "    MOV     R6, R0 \n"
 422       "    BL      sub_FF8531AC \n"
 423       "    LDR     R1, =0x113DC \n"
 424       "    MOV     R5, R0 \n"
 425       "    ADD     R4, R1, R0, LSL #7 \n"
 426       "    LDR     R0, [R4, #0x70] \n"
 427       "    CMP     R0, #4 \n"
 428       "    LDREQ   R1, =0x6D8 \n"
 429       "    LDREQ   R0, =0xFF852CD0 \n"
 430       "    BLEQ    sub_FF81B284 \n"
 431       "    MOV     R1, R6 \n"
 432       "    MOV     R0, R5 \n"
 433       "    BL      sub_FF852C18 \n"
 434       "    LDR     R0, [R4, #0x38] \n"
 435       "    BL      sub_FF853770 \n"
 436       "    CMP     R0, #0 \n"
 437       "    STREQ   R0, [R4, #0x70] \n"
 438       "    MOV     R0, R5 \n"
 439       "    BL      sub_FF852CF0 \n"
 440       "    MOV     R0, R5 \n"
 441       "    BL      sub_FF852FE4_my \n"  //->
 442       "    LDR PC, =0xff85329c\n"       //+ jump back to ROM
 443 /*      "    MOV     R7, R0 \n"         //rom:ff85329c
 444       "    MOV     R0, R5 \n"
 445       "    BL      sub_FF853048 \n"
 446       "    LDR     R1, [R4, #0x3C] \n"
 447       "    AND     R2, R7, R0 \n"
 448       "    CMP     R1, #0 \n"
 449       "    MOV     R0, #0 \n"
 450       "    MOVEQ   R0, #0x80000001 \n"
 451       "    BEQ     loc_FF8532EC \n"
 452       "    LDR     R3, [R4, #0x2C] \n"
 453       "    CMP     R3, #2 \n"
 454       "    MOVEQ   R0, #4 \n"
 455       "    CMP     R1, #5 \n"
 456       "    ORRNE   R0, R0, #1 \n"
 457       "    BICEQ   R0, R0, #1 \n"
 458       "    CMP     R2, #0 \n"
 459       "    BICEQ   R0, R0, #2 \n"
 460       "    ORREQ   R0, R0, #0x80000000 \n"
 461       "    BICNE   R0, R0, #0x80000000 \n"
 462       "    ORRNE   R0, R0, #2 \n"
 463 "loc_FF8532EC:\n"
 464       "    CMP     R6, #7 \n"
 465       "    STR     R0, [R4, #0x40] \n"
 466       "    LDMNEFD SP!, {R4-R8,PC} \n"
 467       "    MOV     R0, R6 \n"
 468       "    BL      sub_FF8531FC \n"
 469       "    CMP     R0, #0 \n"
 470       "    LDMEQFD SP!, {R4-R8,LR} \n"
 471       "    LDREQ   R0, =0xFF8534E8 \n"
 472       "    BEQ     sub_FF8115A8 \n"
 473       "    LDMFD   SP!, {R4-R8,PC} \n"*/
 474       );
 475 }
 477 void __attribute__((naked,noinline)) sub_FF852FE4_my(  ) {
 478 asm volatile (
 479       "    STMFD   SP!, {R4-R6,LR} \n"
 480       "    MOV     R5, R0 \n"
 481       "    LDR     R0, =0x113DC \n"
 482       "    ADD     R4, R0, R5, LSL #7 \n"
 483       "    LDR     R0, [R4, #0x70] \n"
 484       "    TST     R0, #2 \n"
 485       "    MOVNE   R0, #1 \n"
 486       "    LDMNEFD SP!, {R4-R6,PC} \n"
 487       "    LDR     R0, [R4, #0x38] \n"
 488       "    MOV     R1, R5 \n"
 489       "    BL      sub_FF852D74_my \n"      //->
 490       "    LDR PC, =0xff853010\n"           //+ jump back to ROM
 491 /*      "    CMP     R0, #0 \n"             //rom:ff853010
 492       "    LDMEQFD SP!, {R4-R6,PC} \n"
 493       "    LDR     R0, [R4, #0x38] \n"
 494       "    MOV     R1, R5 \n"
 495       "    BL      sub_FF852EE0 \n"
 496       "    CMP     R0, #0 \n"
 497       "    LDMEQFD SP!, {R4-R6,PC} \n"
 498       "    MOV     R0, R5 \n"
 499       "    BL      sub_FF852800 \n"
 500       "    CMP     R0, #0 \n"
 501       "    LDRNE   R1, [R4, #0x70] \n"
 502       "    ORRNE   R1, R1, #2 \n"
 503       "    STRNE   R1, [R4, #0x70] \n"
 504       "    LDMFD   SP!, {R4-R6,PC} \n"*/
 505     );
 506 }
 509 void __attribute__((naked,noinline)) sub_FF852D74_my(  ) {
 510 asm volatile (
 511       "    STMFD   SP!, {R4-R8,LR} \n"
 512       "    MOV     R8, R0 \n"
 513       "    LDR     R0, =0x113DC \n"
 514       "    MOV     R7, #0 \n"
 515       "    ADD     R5, R0, R1, LSL #7 \n"
 516       "    LDR     R0, [R5, #0x3C] \n"
 517       "    MOV     R6, #0 \n"
 518       "    CMP     R0, #7 \n"
 519       "    ADDLS   PC, PC, R0, LSL #2 \n"
 520       "    B       loc_FF852EC4 \n"
 521       "    B       loc_FF852DD4 \n"
 522       "    B       loc_FF852DBC \n"
 523       "    B       loc_FF852DBC \n"
 524       "    B       loc_FF852DBC \n"
 525       "    B       loc_FF852DBC \n"
 526       "    B       loc_FF852EBC \n"
 527       "    B       loc_FF852DBC \n"
 528       "    B       loc_FF852DBC \n"
 529 "loc_FF852DBC:\n"
 530       "    MOV     R2, #0 \n"
 531       "    MOV     R1, #0x200 \n"
 532       "    MOV     R0, #2 \n"
 533       "    BL      sub_FF869F88 \n"
 534       "    MOVS    R4, R0 \n"
 535       "    BNE     loc_FF852DDC \n"
 536 "loc_FF852DD4:\n"
 537       "    MOV     R0, #0 \n"
 538       "    LDMFD   SP!, {R4-R8,PC} \n"
 539 "loc_FF852DDC:\n"
 540       "    LDR     R12, [R5, #0x4C] \n"
 541       "    MOV     R3, R4 \n"
 542       "    MOV     R2, #1 \n"
 543       "    MOV     R1, #0 \n"
 544       "    MOV     R0, R8 \n"
 545       "    BLX     R12 \n"
 546       "    CMP     R0, #1 \n"
 547       "    BNE     loc_FF852E08 \n"
 548       "    MOV     R0, #2 \n"
 549       "    BL      sub_FF86A0D4 \n"
 550       "    B       loc_FF852DD4 \n"
 551 "loc_FF852E08:\n"
 552       "    LDR     R1, [R5, #0x68] \n"
 553       "    MOV     R0, R8 \n"
 554       "    BLX     R1 \n"
 555        "MOV   R1, R4\n"           //  pointer to MBR in R1
 556        "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 558         // Start of DataGhost's FAT32 autodetection code
 559         // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 560         // According to the code below, we can use R1, R2, R3 and R12.
 561         // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 562         // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 563         "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 564         "MOV     LR, R4\n"                     // Save old offset for MBR signature
 565         "MOV     R1, #1\n"                     // Note the current partition number
 566         "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 567    "dg_sd_fat32:\n"
 568         "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 569         "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 570         "ADD     R12, R12, #0x10\n"            // Second partition
 571         "ADD     R1, R1, #1\n"                 // Second partition for the loop
 572    "dg_sd_fat32_enter:\n"
 573         "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 574         "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 575         "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 576         "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 577         "BNE     dg_sd_fat32\n"                // No, it isn't. Loop again.
 578         "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 579         "CMPNE   R2, #0x80\n"
 580         "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 581                                                // This partition is valid, it's the first one, bingo!
 582         "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 584    "dg_sd_fat32_end:\n"
 585         // End of DataGhost's FAT32 autodetection code
 586       "    LDRB    R1, [R4, #0x1C9] \n"
 587       "    LDRB    R3, [R4, #0x1C8] \n"
 588       "    LDRB    R12, [R4, #0x1CC] \n"
 589       "    MOV     R1, R1, LSL #0x18 \n"
 590       "    ORR     R1, R1, R3, LSL #0x10 \n"
 591       "    LDRB    R3, [R4, #0x1C7] \n"
 592       "    LDRB    R2, [R4, #0x1BE] \n"
 593 //      "    LDRB    LR, [R4, #0x1FF] \n"       //-
 594       "    ORR     R1, R1, R3, LSL #8 \n"
 595       "    LDRB    R3, [R4, #0x1C6] \n"
 596       "    CMP     R2, #0 \n"
 597       "    CMPNE   R2, #0x80 \n"
 598       "    ORR     R1, R1, R3 \n"
 599       "    LDRB    R3, [R4, #0x1CD] \n"
 600       "    MOV     R3, R3, LSL #0x18 \n"
 601       "    ORR     R3, R3, R12, LSL #0x10 \n"
 602       "    LDRB    R12, [R4, #0x1CB] \n"
 603       "    ORR     R3, R3, R12, LSL #8 \n"
 604       "    LDRB    R12, [R4, #0x1CA] \n"
 605       "    ORR     R3, R3, R12 \n"
 606 //      "    LDRB    R12, [R4, #0x1FE] \n"      //-
 607       "    LDRB    R12, [LR,#0x1FE]\n"          //+
 608       "    LDRB    LR, [LR,#0x1FF]\n"           //+
 609       "    MOV     R4, #0 \n"
 610       "    BNE     loc_FF852E94 \n"
 611       "    CMP     R0, R1 \n"
 612       "    BCC     loc_FF852E94 \n"
 613       "    ADD     R2, R1, R3 \n"
 614       "    CMP     R2, R0 \n"
 615       "    CMPLS   R12, #0x55 \n"
 616       "    CMPEQ   LR, #0xAA \n"
 617       "    MOVEQ   R7, R1 \n"
 618       "    MOVEQ   R6, R3 \n"
 619       "    MOVEQ   R4, #1 \n"
 620 "loc_FF852E94:\n"
 621       "    MOV     R0, #2 \n"
 622       "    BL      sub_FF86A0D4 \n"
 623       "    CMP     R4, #0 \n"
 624       "    BNE     loc_FF852ED0 \n"
 625       "    LDR     R1, [R5, #0x68] \n"
 626       "    MOV     R7, #0 \n"
 627       "    MOV     R0, R8 \n"
 628       "    BLX     R1 \n"
 629       "    MOV     R6, R0 \n"
 630       "    B       loc_FF852ED0 \n"
 631 "loc_FF852EBC:\n"
 632       "    MOV     R6, #0x40 \n"
 633       "    B       loc_FF852ED0 \n"
 634 "loc_FF852EC4:\n"
 635       "    LDR     R1, =0x5C9 \n"
 636       "    LDR     R0, =0xFF852CD0 \n"
 637       "    BL      sub_FF81B284 \n"
 638 "loc_FF852ED0:\n"
 639       "    STR     R7, [R5, #0x44]! \n"
 640       "    MOV     R0, #1 \n"
 641       "    STR     R6, [R5, #4] \n"
 642       "    LDMFD   SP!, {R4-R8,PC} \n"
 643       );
 644 }
 647 void __attribute__((naked,noinline)) task_JogDial_my(  ) {
 648 asm volatile (
 649       "    STMFD   SP!, {R3-R11,LR} \n" 
 650       "    BL      sub_FF8443D0 \n" 
 651       "    LDR     R11, =0x80000B01 \n" 
 652       "    LDR     R8, =0xFFAEED08 \n" 
 653       "    LDR     R7, =0xC0240000 \n" 
 654       "    LDR     R6, =0x22DC \n" 
 655       "    MOV     R9, #1 \n" 
 656       "    MOV     R10, #0 \n" 
 657 "loc_FF844240:\n"
 658       "    LDR     R3, =0x1BB \n" 
 659       "    LDR     R0, [R6, #0xC] \n" 
 660       "    LDR     R2, =0xFF844478 \n" 
 661       "    MOV     R1, #0 \n" 
 662       "    BL      sub_FF827308 \n" 
 663       "    MOV     R0, #0x28 \n" 
 664       "    BL      _SleepTask \n" 
 665 //------------------  added code ---------------------
 666 "labelA:\n"
 667                 "LDR     R0, =jogdial_stopped\n"
 668                 "LDR     R0, [R0]\n"
 669                 "CMP     R0, #1\n"
 670                 "BNE     labelB\n"
 671                 "MOV     R0, #40\n"
 672                 "BL      _SleepTask\n"
 673                 "B       labelA\n"
 674 "labelB:\n"
 675 //------------------  original code ------------------ 
 676       "    LDR     R0, [R7, #0x104] \n" 
 677       "    MOV     R0, R0, ASR #0x10 \n" 
 678       "    STRH    R0, [R6] \n" 
 679       "    LDRSH   R2, [R6, #2] \n" 
 680       "    SUB     R1, R0, R2 \n" 
 681       "    CMP     R1, #0 \n" 
 682       "    BEQ     loc_FF844304 \n" 
 683       "    MOV     R5, R1 \n" 
 684       "    RSBLT   R5, R5, #0 \n" 
 685       "    MOVLE   R4, #0 \n" 
 686       "    MOVGT   R4, #1 \n" 
 687       "    CMP     R5, #0xFF \n" 
 688       "    BLS     loc_FF8442B8 \n" 
 689       "    CMP     R1, #0 \n" 
 690       "    RSBLE   R1, R2, #0xFF \n" 
 691       "    ADDLE   R1, R1, #0x7F00 \n" 
 692       "    ADDLE   R0, R1, R0 \n" 
 693       "    RSBGT   R0, R0, #0xFF \n" 
 694       "    ADDGT   R0, R0, #0x7F00 \n" 
 695       "    ADDGT   R0, R0, R2 \n" 
 696       "    ADD     R5, R0, #0x8000 \n" 
 697       "    ADD     R5, R5, #1 \n" 
 698       "    EOR     R4, R4, #1 \n" 
 699 "loc_FF8442B8:\n"
 700       "    LDR     R0, [R6, #0x14] \n" 
 701       "    CMP     R0, #0 \n" 
 702       "    BEQ     loc_FF8442FC \n" 
 703       "    LDR     R0, [R6, #0x1C] \n" 
 704       "    CMP     R0, #0 \n" 
 705       "    BEQ     loc_FF8442E4 \n" 
 706       "    LDR     R1, [R8, R4, LSL #2] \n" 
 707       "    CMP     R1, R0 \n" 
 708       "    BEQ     loc_FF8442EC \n" 
 709       "    LDR     R0, =0xB01 \n" 
 710       "    BL      sub_FF876C58 \n" 
 711 "loc_FF8442E4:\n"
 712       "    MOV     R0, R11 \n" 
 713       "    BL      sub_FF876C58 \n" 
 714 "loc_FF8442EC:\n"
 715       "    LDR     R0, [R8, R4, LSL #2] \n" 
 716       "    MOV     R1, R5 \n" 
 717       "    STR     R0, [R6, #0x1C] \n" 
 718       "    BL      sub_FF876B88 \n" 
 719 "loc_FF8442FC:\n"
 720       "    LDRH    R0, [R6] \n" 
 721       "    STRH    R0, [R6, #2] \n" 
 722 "loc_FF844304:\n"
 723       "    STR     R10, [R7, #0x100] \n" 
 724       "    STR     R9, [R7, #0x108] \n" 
 725       "    LDR     R0, [R6, #0x10] \n" 
 726       "    CMP     R0, #0 \n" 
 727       "    BLNE    _SleepTask \n" 
 728       "    B       loc_FF844240 \n" 
 729     );
 730 }
 732 #if 0
 733 const unsigned ledlist[]={
 734         0xC0220130, // green?
 735         0xC0220134, // red?
 736 };
 737 // shamelessly stolen from s5 for debugging
 738 extern void msleep(int x);
 739 void __attribute__((noinline)) task_blinker() {
 740         int ledstate;
 742         int counter = 0;
 744         int *led = (void*) ledlist[0];
 745                 int i_led = 0;
 747         int *anypointer;       // multi-purpose pointer to poke around in memory
 748         int v1, v2, v3, v4;    // multi-purpose vars
ledstate = 0;   // init: led off
 751         *led = 0x46;      // led on
 753         while (1) {
 755                 if (ledstate == 1) {    // toggle LED
ledstate = 0;
 757                         *led = 0x44;      // LED off
led=(void *)ledlist[(++i_led)%2];
 759                         //core_test(1);
 760                 } else {
ledstate = 1;
 762                         *led = 0x46;      // LED on
 763                         //core_test(0);
 764                 }
 766                 if (counter == 2) {
 767                         //dump_chdk();
 768                         //gui_init();
 769                         //_ExecuteEventProcedure("UIFS_WriteFirmInfoToFile");
 770                         //_UIFS_WriteFirmInfoToFile(0);
 771                 }
 773                 if (counter == 10) {
 774                         //draw_txt_string(2, 2, "test");
 775                 }
msleep(500);
counter++;
 779         }
 780 };
 782 void CreateTask_blinker() {
_CreateTask("Blinker", 0x1, 0x200, task_blinker, 0);
 784 };
 785 #endif