root/platform/ixus115_elph100hs/sub/100c/movie_rec.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. change_video_tables
  2. set_quality
  3. movie_record_task
  4. sub_FF981644_my
  5. sub_FFADEEE0_my

   1 /*
   2  * movie_rec.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "conf.h"
   5 
   6 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
   7 
   8 void  set_quality(int *x){ // -17 highest; +12 lowest
   9  if (conf.video_mode) *x=12-((conf.video_quality-1)*(12+17)/(99-1));
  10 }
  11 
  12 /*************************************************************/
  13 //** movie_record_task @ 0xFF982008 - 0xFF982180, length=95
  14 void __attribute__((naked,noinline)) movie_record_task() {
  15 asm volatile (
  16 "    STMFD   SP!, {R2-R10,LR} \n"
  17 "    LDR     R6, =0xFF980D78 \n"
  18 "    LDR     R7, =0xFF981A60 \n"
  19 "    LDR     R4, =0x6D10 \n"
  20 "    LDR     R9, =0x67F \n"
  21 "    LDR     R10, =0x2710 \n"
  22 "    MOV     R8, #1 \n"
  23 "    MOV     R5, #0 \n"
  24 
  25 "loc_FF982028:\n"
  26 "    LDR     R0, [R4, #0x24] \n"
  27 "    MOV     R2, #0 \n"
  28 "    ADD     R1, SP, #4 \n"
  29 "    BL      sub_FF83B068 /*_ReceiveMessageQueue*/ \n"
  30 "    LDR     R0, [R4, #0x2C] \n"
  31 "    CMP     R0, #0 \n"
  32 "    LDRNE   R0, [R4, #0xC] \n"
  33 "    CMPNE   R0, #2 \n"
  34 "    LDRNE   R0, [R4, #0x44] \n"
  35 "    CMPNE   R0, #6 \n"
  36 "    BNE     loc_FF982164 \n"
  37 "    LDR     R0, [SP, #4] \n"
  38 "    LDR     R1, [R0] \n"
  39 "    SUB     R1, R1, #2 \n"
  40 "    CMP     R1, #0xD \n"
  41 "    ADDCC   PC, PC, R1, LSL#2 \n"
  42 "    B       loc_FF982164 \n"
  43 "    B       loc_FF982104 \n"
  44 "    B       loc_FF982128 \n"
  45 "    B       loc_FF982138 \n"
  46 "    B       loc_FF982140 \n"
  47 "    B       loc_FF982148 \n"
  48 "    B       loc_FF982150 \n"
  49 "    B       loc_FF98210C \n"
  50 "    B       loc_FF982158 \n"
  51 "    B       loc_FF982118 \n"
  52 "    B       loc_FF982164 \n"
  53 "    B       loc_FF982160 \n"
  54 "    B       loc_FF9820D0 \n"
  55 "    B       loc_FF9820A0 \n"
  56 
  57 "loc_FF9820A0:\n"
  58 "    STR     R5, [R4, #0x40] \n"
  59 "    STR     R5, [R4, #0x30] \n"
  60 "    STR     R5, [R4, #0x34] \n"
  61 "    STRH    R5, [R4, #6] \n"
  62 "    STR     R6, [R4, #0xD8] \n"
  63 "    STR     R7, [R4, #0xF0] \n"
  64 "    LDR     R0, [R4, #0xC] \n"
  65 "    ADD     R0, R0, #1 \n"
  66 "    STR     R0, [R4, #0xC] \n"
  67 "    MOV     R0, #6 \n"
  68 "    STR     R0, [R4, #0x44] \n"
  69 "    B       loc_FF9820F0 \n"
  70 
  71 "loc_FF9820D0:\n"
  72 "    STR     R5, [R4, #0x40] \n"
  73 "    STR     R5, [R4, #0x30] \n"
  74 "    STR     R6, [R4, #0xD8] \n"
  75 "    STR     R7, [R4, #0xF0] \n"
  76 "    LDR     R0, [R4, #0xC] \n"
  77 "    ADD     R0, R0, #1 \n"
  78 "    STR     R0, [R4, #0xC] \n"
  79 "    STR     R8, [R4, #0x44] \n"
  80 
  81 "loc_FF9820F0:\n"
  82 "    LDR     R2, =0xFF9803C0 \n"
  83 "    LDR     R1, =0xB2A28 \n"
  84 "    LDR     R0, =0xFF9804D4 \n"
  85 "    BL      sub_FF854B04 \n"
  86 "    B       loc_FF982164 \n"
  87 
  88 "loc_FF982104:\n"
  89 "    BL      unlock_optical_zoom\n"         // +
  90 );
  91 if (conf.ext_video_time == 1)
  92 {
  93 asm volatile (
  94 "    BL      sub_FF981644_my \n"  // --> Patched. Old value = 0xFF981644.
  95 );
  96 }
  97 else
  98 {
  99 asm volatile (
 100 "    BL      sub_FF981644 \n"
 101 );
 102 }
 103 asm volatile (
 104 "    B       loc_FF982164 \n"
 105 
 106 "loc_FF98210C:\n"
 107 "    LDR     R1, [R4, #0xF0] \n"
 108 "    BLX     R1 \n"
 109 //begin patch
 110 "    LDR     R0, =video_compression_rate\n" // +
 111 "    BL      set_quality\n"                 // +
 112 //end patch
 113 "    B       loc_FF982164 \n"
 114 
 115 "loc_FF982118:\n"
 116 "    LDR     R1, [R0, #0x18] \n"
 117 "    LDR     R0, [R0, #4] \n"
 118 "    BL      sub_FFAE0564 \n"
 119 "    B       loc_FF982164 \n"
 120 
 121 "loc_FF982128:\n"
 122 "    LDR     R0, [R4, #0x44] \n"
 123 "    CMP     R0, #5 \n"
 124 "    STRNE   R8, [R4, #0x34] \n"
 125 "    B       loc_FF982164 \n"
 126 
 127 "loc_FF982138:\n"
 128 "    BL      sub_FF980A54 \n"
 129 "    B       loc_FF982164 \n"
 130 
 131 "loc_FF982140:\n"
 132 "    BL      sub_FF980774 \n"
 133 "    B       loc_FF982164 \n"
 134 
 135 "loc_FF982148:\n"
 136 "    BL      sub_FF98052C \n"
 137 "    B       loc_FF982164 \n"
 138 
 139 "loc_FF982150:\n"
 140 "    BL      sub_FF980158 \n"
 141 "    B       loc_FF982164 \n"
 142 
 143 "loc_FF982158:\n"
 144 "    BL      sub_FF9800D8 \n"
 145 "    B       loc_FF982164 \n"
 146 
 147 "loc_FF982160:\n"
 148 "    BL      sub_FF9826B4 \n"
 149 
 150 "loc_FF982164:\n"
 151 "    LDR     R1, [SP, #4] \n"
 152 "    LDR     R3, =0xFF97FE88 /*'MovieRecorder.c'*/ \n"
 153 "    STR     R5, [R1] \n"
 154 "    STR     R9, [SP] \n"
 155 "    LDR     R0, [R4, #0x28] \n"
 156 "    MOV     R2, R10 \n"
 157 "    BL      sub_FF83B9E0 /*_PostMessageQueueStrictly*/ \n"
 158 "    B       loc_FF982028 \n"
 159 );
 160 }
 161 
 162 /*************************************************************/
 163 //** sub_FF981644_my @ 0xFF981644 - 0xFF981924, length=185
 164 void __attribute__((naked,noinline)) sub_FF981644_my() {
 165 asm volatile (
 166 "    STMFD   SP!, {R0-R8,LR} \n"
 167 "    LDR     R6, =0x6D10 \n"
 168 "    MOV     R0, #0 \n"
 169 "    STR     R0, [R6, #0x34] \n"
 170 "    STR     R0, [R6, #0x38] \n"
 171 "    MOV     R0, R6 \n"
 172 "    LDR     R0, [R0, #0x5C] \n"
 173 "    LDRH    R1, [R6, #6] \n"
 174 "    MOV     R3, #0x3E8 \n"
 175 "    MUL     R0, R3, R0 \n"
 176 "    CMP     R1, #0 \n"
 177 "    MOV     R2, #1 \n"
 178 "    BNE     loc_FF981688 \n"
 179 "    LDR     R1, [R6, #0x90] \n"
 180 "    CMP     R1, #0 \n"
 181 "    BNE     loc_FF981698 \n"
 182 "    B       loc_FF981690 \n"
 183 
 184 "loc_FF981688:\n"
 185 "    CMP     R1, #3 \n"
 186 "    BNE     loc_FF981698 \n"
 187 
 188 "loc_FF981690:\n"
 189 "    STR     R2, [R6, #0x48] \n"
 190 "    B       loc_FF9816A4 \n"
 191 
 192 "loc_FF981698:\n"
 193 "    MOV     R1, #0x3E8 \n"
 194 "    BL      sub_FFB94560 /*__divmod_unsigned_int*/ \n"
 195 "    STR     R0, [R6, #0x48] \n"
 196 
 197 "loc_FF9816A4:\n"
 198 "    LDR     R4, =0xB2A5C \n"
 199 "    MOV     R7, #2 \n"
 200 "    LDR     R0, [R4, #8] \n"
 201 "    CMP     R0, #0 \n"
 202 "    BEQ     loc_FF98170C \n"
 203 "    LDR     R0, [R6, #0x58] \n"
 204 "    MOV     R1, #4 \n"
 205 "    CMP     R0, #0x18 \n"
 206 "    BEQ     loc_FF9818A0 \n"
 207 "    BGT     loc_FF9816E8 \n"
 208 "    CMP     R0, #0xA \n"
 209 "    CMPNE   R0, #0xF \n"
 210 "    STREQ   R7, [R4, #0x14] \n"
 211 "    BEQ     loc_FF98170C \n"
 212 "    CMP     R0, #0x14 \n"
 213 "    BNE     loc_FF981700 \n"
 214 "    B       loc_FF9818A0 \n"
 215 
 216 "loc_FF9816E8:\n"
 217 "    CMP     R0, #0x1E \n"
 218 "    BEQ     loc_FF9818A0 \n"
 219 "    CMP     R0, #0x3C \n"
 220 "    MOVEQ   R0, #8 \n"
 221 "    STREQ   R0, [R4, #0x14] \n"
 222 "    BEQ     loc_FF98170C \n"
 223 
 224 "loc_FF981700:\n"
 225 "    LDR     R1, =0x777 \n"
 226 "    LDR     R0, =0xFF97FE88 /*'MovieRecorder.c'*/ \n"
 227 "    BL      _DebugAssert \n"
 228 
 229 "loc_FF98170C:\n"
 230 "    LDR     R2, =0x6D12 \n"
 231 "    LDR     R0, [R6, #0xB8] \n"
 232 "    MOV     R3, #2 \n"
 233 "    MOV     R1, #0xAA \n"
 234 "    BL      sub_FF894C48 \n"
 235 "    LDR     R2, =0x6D14 \n"
 236 "    LDR     R0, [R6, #0xB8] \n"
 237 "    MOV     R3, #2 \n"
 238 "    MOV     R1, #0xA9 \n"
 239 "    BL      sub_FF894C48 \n"
 240 "    LDR     R2, =0x6D60 \n"
 241 "    LDR     R0, [R6, #0xB8] \n"
 242 "    MOV     R3, #4 \n"
 243 "    MOV     R1, #0xA2 \n"
 244 "    BL      sub_FF894C48 \n"
 245 "    LDR     R2, =0x6D64 \n"
 246 "    LDR     R0, [R6, #0xB8] \n"
 247 "    MOV     R3, #4 \n"
 248 "    MOV     R1, #0xA3 \n"
 249 "    BL      sub_FF894C48 \n"
 250 "    LDR     R0, [R6, #0x90] \n"
 251 "    CMP     R0, #0 \n"
 252 "    LDRNE   R2, =0x6E10 \n"
 253 "    MOVNE   R1, #0 \n"
 254 "    MOVNE   R0, #0xD \n"
 255 "    BLNE    _exmem_ualloc \n"
 256 "    LDR     R0, [R6, #0x4C] \n"
 257 "    LDR     R5, =0x6E10 \n"
 258 "    LDR     R8, =0xB2A44 \n"
 259 "    CMP     R0, #2 \n"
 260 "    CMPNE   R0, #3 \n"
 261 "    BNE     loc_FF981808 \n"
 262 "    LDR     R0, [R6, #0x90] \n"
 263 "    CMP     R0, #0 \n"
 264 "    LDRNE   R0, =0x443FC000 \n"
 265 "    STRNE   R0, [R5] \n"
 266 "    BNE     loc_FF981808 \n"
 267 "    LDR     R0, =0x460B8600 \n"
 268 "    LDR     R1, =0x10959E0 \n"
 269 "    STR     R0, [R5] \n"
 270 "    STR     R1, [R5, #4] \n"
 271 "    LDMIA   R8, {R1,R2} \n"
 272 "    STR     R0, [R6, #0xA0] \n"
 273 "    MUL     R1, R2, R1 \n"
 274 "    MOV     R2, #0 \n"
 275 "    MOV     R3, R1, LSL#1 \n"
 276 "    ADD     R1, R0, R3 \n"
 277 "    STR     R3, [R6, #0x9C] \n"
 278 "    STR     R1, [R6, #0xA4] \n"
 279 "    STMEA   SP, {R1-R3} \n"
 280 "    MOV     R3, R2 \n"
 281 "    MOV     R2, #9 \n"
 282 "    MOV     R1, #5 \n"
 283 "    MOV     R0, #0x10 \n"
 284 "    BL      sub_FFA932FC \n"
 285 "    LDR     R1, [R5] \n"
 286 "    LDR     R0, [R6, #0x9C] \n"
 287 "    ADD     R1, R1, R0, LSL#1 \n"
 288 "    STR     R1, [R5] \n"
 289 "    LDR     R1, [R5, #4] \n"
 290 "    RSB     R0, R0, #0 \n"
 291 "    ADD     R0, R1, R0, LSL#1 \n"
 292 "    STR     R0, [R5, #4] \n"
 293 
 294 "loc_FF981808:\n"
 295 "    LDR     R3, =0xFF981610 \n"
 296 "    LDMIA   R5, {R0,R1} \n"
 297 "    STR     R3, [SP] \n"
 298 "    LDR     R3, =0xB2A5C \n"
 299 "    SUB     R2, R3, #0x18 \n"
 300 "    BL      sub_FFADEEE0_my \n"  // --> Patched. Old value = 0xFFADEEE0.
 301 "    LDR     R3, [R6, #0xB8] \n"
 302 "    STR     R3, [SP] \n"
 303 "    LDR     R0, [R6, #0x90] \n"
 304 "    LDRD    R2, [R6, #0xF8] \n"
 305 "    BL      sub_FFADF2F8 \n"
 306 "    LDR     R0, [R6, #0x64] \n"
 307 "    LDR     R3, =0x6D98 \n"
 308 "    AND     R1, R0, #0xFF \n"
 309 "    LDR     R0, [R8] \n"
 310 "    SUB     R2, R3, #4 \n"
 311 "    BL      sub_FFADD05C \n"
 312 "    LDRH    R0, [R6, #6] \n"
 313 "    CMP     R0, #2 \n"
 314 "    LDREQ   R0, =0xFF9812E4 \n"
 315 "    STREQ   R0, [R6, #0xF0] \n"
 316 "    LDR     R0, [R6, #0x90] \n"
 317 "    CMP     R0, #0 \n"
 318 "    LDREQ   R1, =0xFF980F28 \n"
 319 "    STREQ   R1, [R6, #0xF0] \n"
 320 "    LDR     R2, [R6, #0xC] \n"
 321 "    LDR     R1, =0xFFBD6528 \n"
 322 "    CMP     R2, #2 \n"
 323 "    BNE     loc_FF9818A8 \n"
 324 "    LDR     R0, [R6, #0x4C] \n"
 325 "    ADD     R0, R1, R0, LSL#3 \n"
 326 "    LDR     R1, [R8, #0xC] \n"
 327 "    LDR     R0, [R0, R1, LSL#2] \n"
 328 "    BL      sub_FFA99398 \n"
 329 "    LDR     R0, =0xFF980E54 \n"
 330 "    MOV     R1, #0 \n"
 331 "    BL      sub_FFA998AC \n"
 332 "    B       loc_FF9818E4 \n"
 333 
 334 "loc_FF9818A0:\n"
 335 "    STR     R1, [R4, #0x14] \n"
 336 "    B       loc_FF98170C \n"
 337 
 338 "loc_FF9818A8:\n"
 339 "    CMP     R0, #0 \n"
 340 "    BNE     loc_FF9818C4 \n"
 341 "    LDR     R1, [R6, #0x98] \n"
 342 "    MOV     R0, #5 \n"
 343 "    BL      sub_FFA998C0 \n"
 344 "    BL      sub_FFA99950 \n"
 345 "    B       loc_FF9818E4 \n"
 346 
 347 "loc_FF9818C4:\n"
 348 "    LDR     R0, [R6, #0x4C] \n"
 349 "    ADD     R0, R1, R0, LSL#3 \n"
 350 "    LDR     R1, [R8, #0xC] \n"
 351 "    LDR     R0, [R0, R1, LSL#2] \n"
 352 "    BL      sub_FFA97B28 \n"
 353 "    LDR     R0, =0xFF980E54 \n"
 354 "    MOV     R1, #0 \n"
 355 "    BL      sub_FFA98274 \n"
 356 
 357 "loc_FF9818E4:\n"
 358 "    LDR     R0, [R4, #8] \n"
 359 "    CMP     R0, #0 \n"
 360 "    BEQ     loc_FF981918 \n"
 361 "    ADD     R0, SP, #0xC \n"
 362 "    BL      sub_FFAE03E0 \n"
 363 "    LDR     R1, [R4, #0xC] \n"
 364 "    LDR     R0, [SP, #0xC] \n"
 365 "    BL      sub_FF866434 \n"
 366 "    ADD     R0, SP, #0xC \n"
 367 "    BL      sub_FFAE03E0 \n"
 368 "    LDR     R1, [R4, #0xC] \n"
 369 "    LDR     R0, [SP, #0xC] \n"
 370 "    BL      sub_FF866434 \n"
 371 
 372 "loc_FF981918:\n"
 373 "    LDR     R0, =0xFF980E0C \n"
 374 "    STR     R7, [R6, #0x44]! \n"
 375 "    STR     R0, [R6, #0x94] \n"
 376 "    LDMFD   SP!, {R0-R8,PC} \n"
 377 );
 378 }
 379 
 380 /*************************************************************/
 381 //** sub_FFADEEE0_my @ 0xFFADEEE0 - 0xFFADF29C, length=240
 382 void __attribute__((naked,noinline)) sub_FFADEEE0_my() {
 383 asm volatile (
 384 "    STMFD   SP!, {R0-R12,LR} \n"
 385 "    MOV     R9, R0 \n"
 386 "    LDR     R0, [R2, #0x10] \n"
 387 "    LDR     R8, [SP, #0x38] \n"
 388 "    CMP     R0, #0 \n"
 389 "    LDREQ   R1, =0x31E \n"
 390 "    LDREQ   R0, =0xFFADDEBC /*'MovWriter.c'*/ \n"
 391 "    MOV     R5, #0 \n"
 392 "    MOV     R4, R2 \n"
 393 "    MOV     R10, R3 \n"
 394 "    MOV     R7, R5 \n"
 395 "    BLEQ    _DebugAssert \n"
 396 "    LDR     R6, =0xC548 \n"
 397 "    LDR     R0, [R4] \n"
 398 "    MOV     R11, #0x1E \n"
 399 "    STR     R0, [R6, #0xD0] \n"
 400 "    LDR     R0, [R4, #4] \n"
 401 "    STR     R0, [R6, #0xD4] \n"
 402 "    LDR     R0, [R4, #0x10] \n"
 403 "    STR     R0, [R6, #0xE0] \n"
 404 "    LDR     R1, [R4, #8] \n"
 405 "    LDR     R0, =0x7530 \n"
 406 "    CMP     R1, #0xB \n"
 407 "    ADDCC   PC, PC, R1, LSL#2 \n"
 408 "    B       loc_FFADEFCC \n"
 409 "    B       loc_FFADEF80 \n"
 410 "    B       loc_FFADEF70 \n"
 411 "    B       loc_FFADEFA8 \n"
 412 "    B       loc_FFADEFBC \n"
 413 "    B       loc_FFADEFCC \n"
 414 "    B       loc_FFADEFCC \n"
 415 "    B       loc_FFADEFCC \n"
 416 "    B       loc_FFADEFCC \n"
 417 "    B       loc_FFADEFA0 \n"
 418 "    B       loc_FFADEF98 \n"
 419 "    B       loc_FFADEF88 \n"
 420 
 421 "loc_FFADEF70:\n"
 422 "    LDR     R7, =0x5DC0 \n"
 423 "    MOV     R0, #0x18 \n"
 424 "    STR     R7, [R6, #0x12C] \n"
 425 "    B       loc_FFADEFB4 \n"
 426 
 427 "loc_FFADEF80:\n"
 428 "    MOV     R7, R0 \n"
 429 "    B       loc_FFADEF8C \n"
 430 
 431 "loc_FFADEF88:\n"
 432 "    LDR     R7, =0x5DC \n"
 433 
 434 "loc_FFADEF8C:\n"
 435 "    STR     R0, [R6, #0x12C] \n"
 436 "    STR     R11, [R6, #0xD8] \n"
 437 "    B       loc_FFADEFD8 \n"
 438 
 439 "loc_FFADEF98:\n"
 440 "    LDR     R7, =0xBB8 \n"
 441 "    B       loc_FFADEF8C \n"
 442 
 443 "loc_FFADEFA0:\n"
 444 "    LDR     R7, =0x1770 \n"
 445 "    B       loc_FFADEF8C \n"
 446 
 447 "loc_FFADEFA8:\n"
 448 "    LDR     R7, =0x57600000 \n"  // --> Patched. Old value = 0x3A980. 2hrs 240fps
 449 "    STR     R0, [R6, #0x12C] \n"
 450 "    MOV     R0, #0xF0 \n"
 451 
 452 "loc_FFADEFB4:\n"
 453 "    STR     R0, [R6, #0xD8] \n"
 454 "    B       loc_FFADEFD8 \n"
 455 
 456 "loc_FFADEFBC:\n"
 457 "    STR     R0, [R6, #0x12C] \n"
 458 "    LDR     R7, =0x28800000 \n"  // --> Patched. Old value = 0x1D4C0. 2hrs 120fps
 459 "    MOV     R0, #0x78 \n"
 460 "    B       loc_FFADEFB4 \n"
 461 
 462 "loc_FFADEFCC:\n"
 463 "    LDR     R1, =0x34F \n"
 464 "    LDR     R0, =0xFFADDEBC /*'MovWriter.c'*/ \n"
 465 "    BL      _DebugAssert \n"
 466 
 467 "loc_FFADEFD8:\n"
 468 "    LDR     R0, [R6, #0xD8] \n"
 469 "    LDR     R1, =0x1C20 \n"  // --> Patched. Old value = 0xE0F. 2hrs
 470 "    MOV     R0, R0, LSR#1 \n"
 471 "    STR     R0, [R6, #0xDC] \n"
 472 "    LDR     R0, [R10] \n"
 473 "    STR     R0, [R6, #0xE4] \n"
 474 "    LDRH    R0, [R10, #0x10] \n"
 475 "    STR     R0, [R6, #0xE8] \n"
 476 "    LDR     R0, [R10, #4] \n"
 477 "    STRH    R0, [R6, #2] \n"
 478 "    LDR     R0, [R10, #8] \n"
 479 "    STRH    R0, [R6, #4] \n"
 480 "    LDR     R0, [R10, #0x14] \n"
 481 "    STR     R0, [R6, #0xEC] \n"
 482 "    STR     R8, [R6, #0x128] \n"
 483 "    LDR     R0, [R6, #0xD0] \n"
 484 "    CMP     R0, #0x140 \n"
 485 "    MOVEQ   R0, #0x20000 \n"
 486 "    MOVEQ   R5, #1 \n"
 487 "    STREQ   R0, [R6, #0xAC] \n"
 488 "    BEQ     loc_FFADF06C \n"
 489 "    CMP     R0, #0x280 \n"
 490 "    LDREQ   R0, =0x7A760 \n"
 491 "    MOVEQ   R5, #2 \n"
 492 "    STREQ   R0, [R6, #0xAC] \n"
 493 "    BEQ     loc_FFADF06C \n"
 494 "    CMP     R0, #0x500 \n"
 495 "    LDREQ   R0, =0x11DA50 \n"
 496 "    LDR     R1, =0x1C20 \n"  // --> Patched. Old value = 0x257. 2hrs
 497 "    MOVEQ   R5, #4 \n"
 498 "    STREQ   R0, [R6, #0xAC] \n"
 499 "    BEQ     loc_FFADF06C \n"
 500 "    CMP     R0, #0x780 \n"
 501 "    BNE     loc_FFADF074 \n"
 502 "    MOV     R0, #0x200000 \n"
 503 "    MOV     R5, #5 \n"
 504 "    STR     R0, [R6, #0xAC] \n"
 505 
 506 "loc_FFADF06C:\n"
 507 "    STR     R1, [R6, #0x4C] \n"
 508 "    B       loc_FFADF080 \n"
 509 
 510 "loc_FFADF074:\n"
 511 "    LDR     R1, =0x377 \n"
 512 "    LDR     R0, =0xFFADDEBC /*'MovWriter.c'*/ \n"
 513 "    BL      _DebugAssert \n"
 514 
 515 "loc_FFADF080:\n"
 516 "    LDR     R0, [R6, #0x4C] \n"
 517 "    LDR     R1, =0x138D \n"
 518 "    MUL     R0, R7, R0 \n"
 519 "    BL      sub_FFB94560 /*__divmod_unsigned_int*/ \n"
 520 "    ADD     R0, R0, #1 \n"
 521 "    ADD     R0, R0, R0, LSL#2 \n"
 522 "    STR     R0, [R6, #0x48] \n"
 523 "    LDR     R8, [R4, #8] \n"
 524 "    CMP     R8, #2 \n"
 525 "    CMPNE   R8, #3 \n"
 526 "    BNE     loc_FFADF0D8 \n"
 527 "    RSB     R0, R7, R7, LSL#4 \n"
 528 "    LDR     R1, =0x3E9 \n"
 529 "    MOV     R0, R0, LSL#1 \n"
 530 "    STR     R11, [R6, #0x4C] \n"
 531 "    BL      sub_FFB94560 /*__divmod_unsigned_int*/ \n"
 532 "    LDR     R1, [R6, #0xE0] \n"
 533 "    MOV     R7, R1 \n"
 534 "    BL      sub_FFB94560 /*__divmod_unsigned_int*/ \n"
 535 "    ADD     R0, R0, #1 \n"
 536 "    MUL     R0, R7, R0 \n"
 537 "    STR     R0, [R6, #0x48] \n"
 538 
 539 "loc_FFADF0D8:\n"
 540 "    LDR     R0, [R4, #0xC] \n"
 541 "    LDR     R7, [R10, #0xC] \n"
 542 "    MOVS    R1, R0 \n"
 543 "    MOV     R0, R7, LSR#1 \n"
 544 "    STR     R7, [R6, #0x94] \n"
 545 "    STR     R0, [R6, #0x98] \n"
 546 "    ADD     R0, R9, #3 \n"
 547 "    BIC     R0, R0, #3 \n"
 548 "    STR     R0, [R6, #0xF4] \n"
 549 "    LDR     R2, [R6, #0x48] \n"
 550 "    MOVNE   R1, #1 \n"
 551 "    MOV     R2, R2, LSL#2 \n"
 552 "    ADD     R3, R0, R2 \n"
 553 "    STR     R3, [R6, #0xF8] \n"
 554 "    LDRH    R12, [R6, #4] \n"
 555 "    LDR     R0, [SP, #4] \n"
 556 "    ADD     R2, R2, R3 \n"
 557 "    CMP     R12, #0 \n"
 558 "    ADD     R0, R0, R9 \n"
 559 "    BEQ     loc_FFADF258 \n"
 560 "    STR     R2, [R6, #0xFC] \n"
 561 "    LDR     R3, [R6, #0x4C] \n"
 562 "    LDR     R9, =0x1061D0 \n"
 563 "    ADD     R2, R2, R3, LSL#3 \n"
 564 "    ADD     R2, R2, #0x1F \n"
 565 "    BIC     R2, R2, #0x1F \n"
 566 "    STR     R2, [R6, #0x100] \n"
 567 "    LDR     R3, [R6, #0xAC] \n"
 568 "    LDR     R11, =0xC6C8 \n"
 569 "    ADD     R2, R2, R3 \n"
 570 "    ADD     R3, R2, #0x100000 \n"
 571 "    STR     R2, [R6, #0x78] \n"
 572 "    SUB     R0, R0, R3 \n"
 573 "    RSB     R2, R7, #0 \n"
 574 "    ADD     R0, R0, R2, LSL#1 \n"
 575 "    MOV     R0, R0, LSR#15 \n"
 576 "    MOV     R0, R0, LSL#15 \n"
 577 "    STR     R3, [R6, #0x104] \n"
 578 "    ADD     R8, R3, R0 \n"
 579 "    STR     R0, [R6, #0x110] \n"
 580 "    STR     R8, [R6, #0x108] \n"
 581 "    MOV     R2, #0 \n"
 582 "    ADD     R10, R9, #0x10 \n"
 583 "    STR     R8, [R6, #0x10C] \n"
 584 
 585 "loc_FFADF188:\n"
 586 "    MLA     R0, R2, R7, R8 \n"
 587 "    ADD     R12, R9, R2, LSL#3 \n"
 588 "    ADD     R0, R0, #3 \n"
 589 "    BIC     R0, R0, #3 \n"
 590 "    STR     R0, [R11, R2, LSL#2] \n"
 591 "    MOV     R0, #0 \n"
 592 "    ADD     R6, R10, R2, LSL#3 \n"
 593 
 594 "loc_FFADF1A4:\n"
 595 "    STR     R3, [R12, R0, LSL#2] \n"
 596 "    STR     R3, [R6, R0, LSL#2] \n"
 597 "    ADD     R0, R0, #1 \n"
 598 "    CMP     R0, #2 \n"
 599 "    BLT     loc_FFADF1A4 \n"
 600 "    ADD     R2, R2, #1 \n"
 601 "    CMP     R2, #2 \n"
 602 "    BLT     loc_FFADF188 \n"
 603 "    LDRH    R3, [R4, #0x14] \n"
 604 "    LDR     R2, [R4, #8] \n"
 605 "    MOV     R0, R5 \n"
 606 "    BL      sub_FF8DEE14 \n"
 607 "    LDR     R1, =0xC548 \n"
 608 "    LDR     R2, [R1, #0x94] \n"
 609 "    ADD     R0, R0, R2 \n"
 610 "    STR     R0, [R1, #0x8C] \n"
 611 "    LDMFD   SP!, {R0-R12,PC} \n"
 612 
 613 "loc_FFADF258:\n"
 614 "    ADD     R2, R2, #0x1F \n"
 615 "    BIC     R2, R2, #0x1F \n"
 616 "    STR     R2, [R6, #0x100] \n"
 617 "    LDR     R3, [R6, #0xAC] \n"
 618 "    ADD     R2, R2, R3 \n"
 619 "    SUB     R0, R0, R2 \n"
 620 "    MOV     R0, R0, LSR#15 \n"
 621 "    MOV     R0, R0, LSL#15 \n"
 622 "    STR     R2, [R6, #0x104] \n"
 623 "    STR     R0, [R6, #0x110] \n"
 624 "    ADD     R0, R0, R2 \n"
 625 "    STR     R0, [R6, #0x108] \n"
 626 "    LDRH    R3, [R4, #0x14] \n"
 627 "    MOV     R2, R8 \n"
 628 "    MOV     R0, R5 \n"
 629 "    BL      sub_FF8DEE14 \n"
 630 "    STR     R0, [R6, #0x8C] \n"
 631 "    LDMFD   SP!, {R0-R12,PC} \n"
 632 );
 633 }

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