This source file includes following definitions.
- my_restart
- cache_func_my
1 #include "../generic/check_compat.c"
2
3 extern long *blob_chdk_core;
4 extern long blob_chdk_core_size;
5
6 void __attribute__((noreturn)) my_restart()
7 {
8 check_compat();
9
10 long *dst = (long*)MEMISOSTART;
11 const long *src = blob_chdk_core;
12 long length = (blob_chdk_core_size + 3) >> 2;
13
14 core_copy(src, dst, length);
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40 asm volatile (
41 "mov r1, %1\n"
42 "mov r0, %0\n"
43
44
45 "bl cache_func_my\n"
46
47 "mov r0, %0\n"
48 "add r0, r0, #1\n"
49 "bx r0\n"
50 : : "r"(MEMISOSTART), "r"(((blob_chdk_core_size+3)>>2)<<2) : "memory","r0","r1","r2","r3","r4"
51 );
52 while(1);
53 }
54
55 void __attribute__((naked,noinline)) cache_func_my() {
56 asm volatile (
57 " cmp.w r1, #0x4000\n"
58 " bhs loc_fc0db260\n"
59 " dsb sy\n"
60 " add r1, r0\n"
61 " bic r0, r0, #0x1f\n"
62 "loc_fc0db24e:\n"
63 " mcr p15, #0, r0, c7, c10, #1\n"
64 " add.w r0, r0, #0x20\n"
65 " cmp r0, r1\n"
66 " blo loc_fc0db24e\n"
67 " dsb sy\n"
68 " bx lr\n"
69 "loc_fc0db260:\n"
70 " dsb sy\n"
71 " mov.w r1, #0\n"
72 "loc_fc0db268:\n"
73 " mov.w r0, #0\n"
74 "loc_fc0db26c:\n"
75 " orr.w r2, r1, r0\n"
76 " mcr p15, #0, r2, c7, c10, #2\n"
77 " add.w r0, r0, #0x20\n"
78 " cmp.w r0, #0x1000\n"
79 " bne loc_fc0db26c\n"
80 " add.w r1, r1, #0x40000000\n"
81 " cmp r1, #0\n"
82 " bne loc_fc0db268\n"
83 " dsb sy\n"
84 " bx lr\n"
85 ".ltorg\n"
86 );
87 }