root/loader/sx700hs/main.c

DEFINITIONS

1. my_restart
2. clean_data_cache_line_my

   1 #include "../generic/check_compat.c"
   3 extern long *blob_chdk_core;
   4 extern long blob_chdk_core_size;
   6 void __attribute__((noreturn)) my_restart()
   7 {
check_compat();
  10     long *dst = (long*)MEMISOSTART;
  11     const long *src = blob_chdk_core;
  12     long length = (blob_chdk_core_size + 3) >> 2;
core_copy(src, dst, length);
  16 /*
  17     // light up green LED
  18     *(volatile int*)0xd20b0994 = 0x4d0002;
  19     // blinker
  20     while(1) {
  21         int i;
  22         *(volatile int*)0xd20b0994 = 0x4d0002;
  23         for(i=0;i<1000000;i++) {
  24             asm volatile(
  25             "nop\n"
  26             );
  27         }
  28         *(volatile int*)0xd20b0994 = 0x4c0003;
  29         for(i=0;i<1000000;i++) {
  30             asm volatile(
  31             "nop\n"
  32             );
  33         }
  34     }
  35 */
  37     // on G7X allows boot on short press without fiddling variables in startup code
  38     // does not appear to have any effect on sx710
  39      *(volatile unsigned *)(0x4ffc)=0x12345678;
  41     asm volatile ( 
  42     "mov     r1, %1\n"
  43     "mov     r0, %0\n"
  44 //    "ldr     r2, =0xfc119423\n" // function called in startup after ROM->RAM code copy, sx700 100e.
  45 //    "blx     r2\n"
  46     // 100d/100e addresses different, copied inline
  47     "blx     clean_data_cache_line_my\n"
  49     // start execution at MEMISOSTART in thumb mode
  50     "mov     r0, %0\n"
  51     "add     r0, r0, #1\n"
  52     "bx      r0\n"
  53     : : "r"(MEMISOSTART), "r"(((blob_chdk_core_size+3)>>2)<<2) : "memory","r0","r1","r2","r3","r4"
  54     );
  55     while(1);
  56 }
  58 void __attribute__((naked,noinline)) clean_data_cache_line_my() {
  59     asm volatile (
  60 "    cmp.w   r1, #0x4000\n"
  61 "    bhs     loc_fc119444\n"
  62 "    dsb     sy\n"
  63 "    add     r1, r0\n"
  64 "    bic     r0, r0, #0x1f\n"
  65 "loc_fc119432:\n"
  66 "    mcr     p15, #0, r0, c7, c10, #1\n"
  67 "    add.w   r0, r0, #0x20\n"
  68 "    cmp     r0, r1\n"
  69 "    blo     loc_fc119432\n"
  70 "    dsb     sy\n"
  71 "    bx      lr\n"
  72 "loc_fc119444:\n"
  73 "    dsb     sy\n"
  74 "    mov.w   r1, #0\n"
  75 "loc_fc11944c:\n"
  76 "    mov.w   r0, #0\n"
  77 "loc_fc119450:\n"
  78 "    orr.w   r2, r1, r0\n"
  79 "    mcr     p15, #0, r2, c7, c10, #2\n"
  80 "    add.w   r0, r0, #0x20\n"
  81 "    cmp.w   r0, #0x1000\n"
  82 "    bne     loc_fc119450\n"
  83 "    add.w   r1, r1, #0x40000000\n"
  84 "    cmp     r1, #0\n"
  85 "    bne     loc_fc11944c\n"
  86 "    dsb     sy\n"
  87 "    bx      lr\n"
  88 ".ltorg\n"
  89     );
  90 }