1 // IXUS120-SD940 fw 1.00e
2
3 #include "conf.h"
4
5 /*----------------------------------------------------------------------
6 change_video_tables()
7 -----------------------------------------------------------------------*/
8 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
9
10 /*----------------------------------------------------------------------
11 set_quality()
12 -----------------------------------------------------------------------*/
13 // from sx10, not sure if the values are right, seems to work
14 void set_quality(int *x){ // -17 highest; +12 lowest
15 if (conf.video_mode)
16 *x=12-((conf.video_quality-1)*(12+17)/(99-1));
17 }
18
19 /*----------------------------------------------------------------------
20 movie_record_task()
21 -----------------------------------------------------------------------*/
22 void __attribute__((naked,noinline)) movie_record_task() {
23 asm volatile (
24 " STMFD SP!, {R2-R8,LR} \n"
25 " LDR R7, =0x2710 \n"
26 " LDR R4, =0x6228 \n"
27 " MOV R6, #0 \n"
28 " MOV R5, #1 \n"
29 "loc_FF93D640:\n"
30 " LDR R0, [R4, #0x18] \n"
31 " MOV R2, #0 \n"
32 " ADD R1, SP, #4 \n"
33 " BL sub_FF837DC8 \n"
34 " LDR R0, [R4, #0x20] \n"
35 " CMP R0, #0 \n"
36 " BNE loc_FF93D710 \n"
37 " LDR R0, [SP, #4] \n"
38 " LDR R1, [R0] \n"
39 " SUB R1, R1, #2 \n"
40 " CMP R1, #9 \n"
41 " ADDLS PC, PC, R1, LSL #2 \n"
42 " B loc_FF93D710 \n"
43
44 " B loc_FF93D6C4 \n"
45
46 " B loc_FF93D6E4 \n"
47
48 " B loc_FF93D6F4 \n"
49
50 " B loc_FF93D6FC \n"
51
52 " B loc_FF93D6CC \n"
53
54 " B loc_FF93D704 \n"
55
56 " B loc_FF93D6D4 \n"
57
58 " B loc_FF93D710 \n"
59
60 " B loc_FF93D70C \n"
61
62 " B loc_FF93D69C \n"
63
64 "loc_FF93D69C:\n"
65 " LDR R0, =0xFF93D340 \n"
66 " STR R6, [R4, #0x34] \n"
67 " STR R0, [R4, #0x9C] \n"
68 " LDR R2, =0xFF93C874 \n"
69 " LDR R1, =0x67F58 \n"
70 " LDR R0, =0xFF93C958 \n"
71 " STR R6, [R4, #0x24] \n"
72 " BL sub_FF8D9F0C \n"
73 " STR R5, [R4, #0x38] \n"
74 " B loc_FF93D710 \n"
75
76 "loc_FF93D6C4:\n"
77 " BL unlock_optical_zoom \n" // patched
78 " BL sub_FF93D448 \n"
79 " B loc_FF93D710 \n"
80
81 "loc_FF93D6CC:\n"
82 //" BL sub_FF93CFC0 \n"
83 " BL sub_FF93CFC0_my \n" // patched
84 " B loc_FF93D710 \n"
85
86 "loc_FF93D6D4:\n"
87 " LDR R1, [R0, #0x18] \n"
88 " LDR R0, [R0, #4] \n"
89 " BL sub_FFA63AEC \n"
90 " B loc_FF93D710 \n"
91
92 "loc_FF93D6E4:\n"
93 " LDR R0, [R4, #0x38] \n"
94 " CMP R0, #5 \n"
95 " STRNE R5, [R4, #0x28] \n"
96 " B loc_FF93D710 \n"
97
98 "loc_FF93D6F4:\n"
99 " BL sub_FF93CCC0 \n"
100 " B loc_FF93D710 \n"
101
102 "loc_FF93D6FC:\n"
103 " BL sub_FF93C9A4 \n"
104 " B loc_FF93D710 \n"
105
106 "loc_FF93D704:\n"
107 " BL sub_FF93C800 \n"
108 " B loc_FF93D710 \n"
109
110 "loc_FF93D70C:\n"
111 " BL sub_FF93D87C \n"
112
113 "loc_FF93D710:\n"
114 " LDR R1, [SP, #4] \n"
115 " MOV R3, #0x460 \n"
116 " STR R6, [R1] \n"
117 " STR R3, [SP] \n"
118 " LDR R0, [R4, #0x1C] \n"
119 " LDR R3, =0xFF93C660 \n"
120 " MOV R2, R7 \n"
121 " BL sub_FF83871C \n"
122 " B loc_FF93D640 \n"
123 );
124 }
125
126
127 /*----------------------------------------------------------------------
128 sub_FF93CFC0_my()
129 -----------------------------------------------------------------------*/
130 void __attribute__((naked,noinline)) sub_FF93CFC0_my() {
131 asm volatile (
132 " STMFD SP!, {R4-R8,LR} \n"
133 " SUB SP, SP, #0x40 \n"
134 " MOV R7, #0 \n"
135 " LDR R6, =0x6228 \n"
136 " MOV R4, R0 \n"
137 " STR R7, [SP, #0x30] \n"
138 " STR R7, [SP, #0x28] \n"
139 " LDR R0, [R6, #0x38] \n"
140 " MOV R8, #4 \n"
141 " CMP R0, #3 \n"
142 " STREQ R8, [R6, #0x38] \n"
143 " LDR R0, [R6, #0x9C] \n"
144 " BLX R0 \n"
145 " LDR R0, [R6, #0x38] \n"
146 " CMP R0, #4 \n"
147 " BNE loc_FF93D130 \n"
148 " ADD R3, SP, #0x28 \n"
149 " ADD R2, SP, #0x2C \n"
150 " ADD R1, SP, #0x30 \n"
151 " ADD R0, SP, #0x34 \n"
152 " BL sub_FFA63B88 \n"
153 " CMP R0, #0 \n"
154 " MOV R5, #1 \n"
155 " BNE loc_FF93D03C \n"
156 " LDR R1, [R6, #0x28] \n"
157 " CMP R1, #1 \n"
158 " BNE loc_FF93D138 \n"
159 " LDR R1, [R6, #0x4C] \n"
160 " LDR R2, [R6, #0x3C] \n"
161 " CMP R1, R2 \n"
162 " BCC loc_FF93D138 \n"
163 "loc_FF93D03C:\n"
164 " CMP R0, #0x80000001 \n"
165 " STREQ R8, [R6, #0x50] \n"
166 " BEQ loc_FF93D074 \n"
167 " CMP R0, #0x80000003 \n"
168 " STREQ R5, [R6, #0x50] \n"
169 " BEQ loc_FF93D074 \n"
170 " CMP R0, #0x80000005 \n"
171 " MOVEQ R0, #2 \n"
172 " BEQ loc_FF93D070 \n"
173 " CMP R0, #0x80000007 \n"
174 " STRNE R7, [R6, #0x50] \n"
175 " BNE loc_FF93D074 \n"
176 " MOV R0, #3 \n"
177 "loc_FF93D070:\n"
178 " STR R0, [R6, #0x50] \n"
179 "loc_FF93D074:\n"
180 " LDR R0, =0x67F8C \n"
181 " LDR R0, [R0, #8] \n"
182 " CMP R0, #0 \n"
183 " BEQ loc_FF93D08C \n"
184 " BL sub_FF85A840 \n"
185 " B loc_FF93D090 \n"
186 "loc_FF93D08C:\n"
187 " BL sub_FF93C800 \n"
188 "loc_FF93D090:\n"
189 " LDR R0, [R4, #0x1C] \n"
190 " ADD R4, SP, #0x18 \n"
191 " ADD R3, SP, #0x38 \n"
192 " MVN R2, #1 \n"
193 " MOV R1, #0 \n"
194 " STMIA R4, {R0-R3} \n"
195 " LDR R2, [R6, #0x64] \n"
196 " LDR R3, [R6, #0x68] \n"
197 " ADD R1, SP, #0x3C \n"
198 " ADD R4, SP, #8 \n"
199 " MOV R0, #0 \n"
200 " STMIA R4, {R0-R3} \n"
201 " MOV R3, #0 \n"
202 " MOV R2, #0x40 \n"
203 " STRD R2, [SP] \n"
204 " LDR R3, =0x67FA4 \n"
205 " MOV R2, #0 \n"
206 " MOV R1, #0 \n"
207 " BL sub_FFA28010 \n"
208 " LDR R0, [R6, #0x10] \n"
209 " MOV R1, #0x3E8 \n"
210 " BL sub_FF8381E4 \n"
211 " CMP R0, #9 \n"
212 " BNE loc_FF93D100 \n"
213 "loc_FF93D0F0:\n"
214 " BL sub_FFA6405C \n"
215 " MOV R0, #1 \n"
216 " STR R5, [R6, #0x38] \n"
217 " B loc_FF93D260 \n"
218 "loc_FF93D100:\n"
219 " LDR R0, [SP, #0x38] \n"
220 " CMP R0, #0 \n"
221 " BEQ loc_FF93D11C \n"
222 "loc_FF93D10C:\n"
223 " BL sub_FFA6405C \n"
224 " MOV R0, #1 \n"
225 " STR R5, [R6, #0x38] \n"
226 " B loc_FF93D28C \n"
227 "loc_FF93D11C:\n"
228 " MOV R0, #1 \n"
229 " BL sub_FFA280B8 \n"
230 " BL sub_FFA280F4 \n"
231 " MOV R0, #5 \n"
232 " STR R0, [R6, #0x38] \n"
233 "loc_FF93D130:\n"
234 " ADD SP, SP, #0x40 \n"
235 " LDMFD SP!, {R4-R8,PC} \n"
236 "loc_FF93D138:\n"
237 " LDR R12, [SP, #0x30] \n"
238 " CMP R12, #0 \n"
239 " BEQ loc_FF93D2E8 \n"
240 " STR R5, [R6, #0x2C] \n"
241 " LDR R0, [R6, #0x4C] \n"
242 " LDR R8, [R4, #0xC] \n"
243 " CMP R0, #0 \n"
244 " LDRNE LR, [SP, #0x34] \n"
245 " BNE loc_FF93D1E4 \n"
246 " LDR R0, [R4, #0x1C] \n"
247 " LDR R1, [R4, #0x20] \n"
248 " ADD R3, SP, #0x38 \n"
249 " MVN R2, #0 \n"
250 " ADD LR, SP, #0x18 \n"
251 " STMIA LR, {R0-R3} \n"
252 " LDR R0, [SP, #0x28] \n"
253 " LDR R2, [R6, #0x64] \n"
254 " LDR R3, [R6, #0x68] \n"
255 " ADD R1, SP, #0x3C \n"
256 " ADD LR, SP, #8 \n"
257 " STMIA LR, {R0-R3} \n"
258 " LDR R3, [SP, #0x2C] \n"
259 " STR R12, [SP] \n"
260 " STR R3, [SP, #4] \n"
261 " LDMIB R4, {R0,R1} \n"
262 " LDR R3, [SP, #0x34] \n"
263 " MOV R2, R8 \n"
264 " BL sub_FFA28010 \n"
265 " LDR R0, [R6, #0x10] \n"
266 " MOV R1, #0x3E8 \n"
267 " BL sub_FF8381E4 \n"
268 " CMP R0, #9 \n"
269 " BEQ loc_FF93D0F0 \n"
270 " LDR R0, [SP, #0x38] \n"
271 " CMP R0, #0 \n"
272 " BNE loc_FF93D10C \n"
273 " MOV R0, #1 \n"
274 " BL sub_FFA280B8 \n"
275 " LDR R0, [SP, #0x3C] \n"
276 " LDR R1, [SP, #0x34] \n"
277 " ADD LR, R1, R0 \n"
278 " LDR R1, [SP, #0x30] \n"
279 " SUB R12, R1, R0 \n"
280 "loc_FF93D1E4:\n"
281 " LDR R2, [R6, #0x48] \n"
282 " LDR R0, [R4, #0x1C] \n"
283 " LDR R1, [R4, #0x20] \n"
284 " ADD R3, SP, #0x38 \n"
285 " STR R0, [SP, #0x18] \n"
286 " STR R1, [SP, #0x1C] \n"
287 " STR R3, [SP, #0x24] \n"
288 " STR R2, [SP, #0x20] \n"
289 " LDR R2, [R6, #0x64] \n"
290 " LDR R3, [R6, #0x68] \n"
291 " LDR R0, [SP, #0x28] \n"
292 " STR R3, [SP, #0x14] \n"
293 " LDR R3, [SP, #0x2C] \n"
294 " ADD R1, SP, #0x3C \n"
295 " STR R2, [SP, #0x10] \n"
296 " STR R3, [SP, #4] \n"
297 " STR R1, [SP, #0xC] \n"
298 " STR R12, [SP] \n"
299 " STR R0, [SP, #8] \n"
300 " LDMIB R4, {R0,R1} \n"
301 " MOV R3, LR \n"
302 " MOV R2, R8 \n"
303 " BL sub_FFA28010 \n"
304 " LDR R0, [R6, #0x10] \n"
305 " MOV R1, #0x3E8 \n"
306 " BL sub_FF8381E4 \n"
307 " CMP R0, #9 \n"
308 " BNE loc_FF93D274 \n"
309 " BL sub_FFA6405C \n"
310 " MOV R0, #0 \n"
311 " STR R5, [R6, #0x38] \n"
312 "loc_FF93D260:\n"
313 " BL sub_FFA280B8 \n"
314 " MOV R0, #0xC \n"
315 " BL sub_FF87F3CC \n"
316 " MOV R0, #0x90000 \n"
317 " B loc_FF93D29C \n"
318 "loc_FF93D274:\n"
319 " LDR R0, [SP, #0x38] \n"
320 " CMP R0, #0 \n"
321 " BEQ loc_FF93D2B0 \n"
322 " BL sub_FFA6405C \n"
323 " MOV R0, #0 \n"
324 " STR R5, [R6, #0x38] \n"
325
326 "loc_FF93D28C:\n"
327 " BL sub_FFA280B8 \n"
328 " MOV R0, #0xC \n"
329 " BL sub_FF87F3CC \n"
330 " MOV R0, #0xA0000 \n"
331
332 "loc_FF93D29C:\n"
333 " BL sub_FF88ACFC \n"
334 " LDR R1, [R6, #0x8C]! \n"
335 " LDR R0, [R6, #0xC] \n"
336 " BLX R1 \n"
337 " B loc_FF93D130 \n"
338 "loc_FF93D2B0:\n"
339 " MOV R0, #0 \n"
340 " BL sub_FFA280B8 \n"
341 " LDR R0, [SP, #0x34] \n"
342 " LDR R1, [SP, #0x3C] \n"
343 " BL sub_FFA63DB4 \n"
344 " LDR R0, [R6, #0x48] \n"
345 " LDR R3, =0x6290 \n"
346 " ADD R1, R0, #1 \n"
347 " STR R1, [R6, #0x48] \n"
348 " STR R3, [SP] \n"
349 " LDR R0, [SP, #0x3C] \n"
350 " SUB R3, R3, #4 \n"
351 " MOV R2, #0xF \n"
352 " BL sub_FFA61F38 \n"
353
354 " LDR R0, =0x6290-4 \n" // patched
355 " BL set_quality \n"
356
357 "loc_FF93D2E8:\n"
358 " LDR R0, [R6, #0x4C] \n"
359 " ADD R0, R0, #1 \n"
360 " STR R0, [R6, #0x4C] \n"
361 " LDR R1, [R6, #0x74] \n"
362 " MUL R0, R1, R0 \n"
363 " LDR R1, [R6, #0x70] \n"
364 " BL sub_FFB09290 \n"
365 " MOV R4, R0 \n"
366 " BL sub_FFA64094 \n"
367 " LDR R1, [R6, #0x6C] \n"
368 " CMP R1, R4 \n"
369 " BNE loc_FF93D324 \n"
370 " LDR R0, [R6, #0x30] \n"
371 " CMP R0, #1 \n"
372 " BNE loc_FF93D338 \n"
373 "loc_FF93D324:\n"
374 " LDR R1, [R6, #0x80] \n"
375 " MOV R0, R4 \n"
376 " BLX R1 \n"
377 " STR R4, [R6, #0x6C] \n"
378 " STR R7, [R6, #0x30] \n"
379 "loc_FF93D338:\n"
380 " STR R7, [R6, #0x2C] \n"
381 " B loc_FF93D130 \n"
382 );
383 }