This source file includes following definitions.
- boot
- h_usrInit
- h_usrKernelInit
- h_usrRoot
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4
5 const char * const new_sa = &_end;
6
7
8 extern long wrs_kernel_bss_start;
9 extern long wrs_kernel_bss_end;
10 extern void createHook (void *pNewTcb);
11 extern void deleteHook (void *pTcb);
12
13
14 void boot();
15
16
17 void __attribute__((naked,noinline)) h_usrInit();
18 void __attribute__((naked,noinline)) h_usrKernelInit();
19 void __attribute__((naked,noinline)) h_usrRoot();
20
21
22 void boot()
23 {
24 long *canon_data_src = (void*)0xFFEDE3C0;
25 long *canon_data_dst = (void*)0x1900;
26 long canon_data_len = 0xB8D0;
27 long *canon_bss_start = (void*)0xD1D0;
28 long canon_bss_len = 0x91C70 - 0xD1D0;
29 long i;
30
31 asm volatile (
32 "MRC p15, 0, R0,c1,c0\n"
33 "ORR R0, R0, #0x1000\n"
34 "ORR R0, R0, #4\n"
35 "ORR R0, R0, #1\n"
36 "MCR p15, 0, R0,c1,c0\n"
37 :::"r0");
38
39 for(i=0;i<canon_data_len/4;i++)
40 canon_data_dst[i]=canon_data_src[i];
41
42 for(i=0;i<canon_bss_len/4;i++)
43 canon_bss_start[i]=0;
44
45 asm volatile (
46 "MRC p15, 0, R0,c1,c0\n"
47 "ORR R0, R0, #0x1000\n"
48 "BIC R0, R0, #4\n"
49 "ORR R0, R0, #1\n"
50 "MCR p15, 0, R0,c1,c0\n"
51 :::"r0");
52
53 h_usrInit();
54 }
55
56
57 void h_usrInit()
58 {
59
60 asm volatile (
61 "STR LR, [SP,#-4]!\n"
62 "BL sub_FFC01968\n"
63 "MOV R0, #2\n"
64 "MOV R1, R0\n"
65 "BL sub_FFEC4EF8\n"
66 "BL sub_FFEB7BC0\n"
67 "BL sub_FFC011C4\n"
68 "BL sub_FFC01728\n"
69 "LDR LR, [SP],#4\n"
70
71 "B h_usrKernelInit\n"
72 );
73 }
74
75 void h_usrKernelInit()
76 {
77 asm volatile (
78 "STMFD SP!, {R4,LR}\n"
79 "SUB SP, SP, #8\n"
80 "BL sub_FFEC53F8\n"
81 "BL sub_FFED81E0\n"
82 "LDR R3, =0xC1E8\n"
83 "LDR R2, =0x8E7C0\n"
84 "LDR R1, [R3]\n"
85 "LDR R0, =0x91630\n"
86 "MOV R3, #0x100\n"
87 "BL sub_FFED12F0\n"
88 "LDR R3, =0xC1A8\n"
89 "LDR R0, =0xC9F0\n"
90 "LDR R1, [R3]\n"
91 "BL sub_FFED12F0\n"
92 "LDR R3, =0xC264\n"
93 "LDR R0, =0x91604\n"
94 "LDR R1, [R3]\n"
95 "BL sub_FFED12F0\n"
96 "BL sub_FFEDC59C\n"
97 "BL sub_FFC012B0\n"
98 "MOV R4, #0\n"
99 "MOV R3, R0\n"
100 "MOV R12, #0x800\n"
101 "LDR R0, =h_usrRoot\n"
102 "MOV R1, #0x4000\n"
103 );
104
105 asm volatile (
106 "LDR R2, =new_sa\n"
107 "LDR R2, [R2]\n"
108 );
109 asm volatile (
110 "STR R12, [SP]\n"
111 "STR R4, [SP,#4]\n"
112 "BL sub_FFED5420\n"
113 "ADD SP, SP, #8\n"
114 "LDMFD SP!, {R4,PC}\n"
115 );
116 }
117
118
119 void h_usrRoot()
120 {
121 asm volatile (
122 "STMFD SP!, {R4,R5,LR}\n"
123 "MOV R5, R0\n"
124 "MOV R4, R1\n"
125 "BL sub_FFC019D0\n"
126 "MOV R1, R4\n"
127 "MOV R0, R5\n"
128 "BL sub_FFECA08C\n"
129 "MOV R1, R4\n"
130 "MOV R0, R5\n"
131 "BL sub_FFECAB04\n"
132
133 "BL sub_FFC01704\n"
134 "BL sub_FFC01A0C\n"
135 "BL sub_FFC019F0\n"
136 "BL sub_FFC01A38\n"
137 "BL sub_FFC019C4\n"
138 );
139
140 _taskCreateHookAdd(createHook);
141 _taskDeleteHookAdd(deleteHook);
142
143 drv_self_hide();
144
145 asm volatile (
146 "LDMFD SP!, {R4,R5,LR}\n"
147 "B sub_FFC0136C\n"
148 );
149 }
150
151
152
153
154