root/platform/a550/sub/100c/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. boot
  2. h_usrInit
  3. h_usrKernelInit
  4. h_usrRoot

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 /* Ours stuff */
   8 extern long wrs_kernel_bss_start;
   9 extern long wrs_kernel_bss_end;
  10 extern void createHook (void *pNewTcb);
  11 extern void deleteHook (void *pTcb);
  12 
  13 
  14 void boot();
  15 
  16 /* "relocated" functions */
  17 void __attribute__((naked,noinline)) h_usrInit();
  18 void __attribute__((naked,noinline)) h_usrKernelInit();
  19 void __attribute__((naked,noinline)) h_usrRoot();
  20 
  21 
  22 
  23 void boot()
  24 {
  25     long *canon_data_src = (void*)0xFFEEB4D0;
  26     long *canon_data_dst = (void*)0x1900;
  27     long canon_data_len = 0xB540;
  28     long *canon_bss_start = (void*)0xCE40; // just after data
  29     long canon_bss_len = 0x9F2B0 - 0xCE40;
  30     long i;
  31 
  32     asm volatile (
  33         "MRC     p15, 0, R0,c1,c0\n"
  34         "ORR     R0, R0, #0x1000\n"
  35         "ORR     R0, R0, #4\n"
  36         "ORR     R0, R0, #1\n"
  37         "MCR     p15, 0, R0,c1,c0\n"
  38     :::"r0");
  39 
  40     for(i=0;i<canon_data_len/4;i++)
  41         canon_data_dst[i]=canon_data_src[i];
  42 
  43     for(i=0;i<canon_bss_len/4;i++)
  44         canon_bss_start[i]=0;
  45 
  46     asm volatile (
  47         "MRC     p15, 0, R0,c1,c0\n"
  48         "ORR     R0, R0, #0x1000\n"
  49         "BIC     R0, R0, #4\n"
  50         "ORR     R0, R0, #1\n"
  51         "MCR     p15, 0, R0,c1,c0\n"
  52     :::"r0");
  53 
  54     h_usrInit();
  55 }
  56 
  57 
  58 void h_usrInit()
  59 {
  60     asm volatile (
  61                 "STR     LR, [SP,#-4]!\n"
  62                 "BL      sub_FFC01968\n"
  63                 "MOV     R0, #2\n"
  64                 "MOV     R1, R0\n"
  65                 "BL      sub_FFCC1CEC\n"                //unknown_libname_201
  66                 "BL      sub_FFCB6DB8\n"                //excVecInit
  67                 "BL      sub_FFC011C4\n"
  68                 "BL      sub_FFC01728\n"
  69                 "LDR     LR, [SP],#4\n"
  70                 "B       h_usrKernelInit\n"
  71     );
  72 }
  73 
  74 void  h_usrKernelInit()
  75 {
  76     asm volatile (
  77                 "STMFD   SP!, {R4,LR}\n"
  78                 "SUB     SP, SP, #8\n"
  79                 "BL      sub_FFCC21EC\n"                //classLibInit
  80                 "BL      sub_FFCD2318\n"                //taskLibInit
  81                 "LDR     R3, =0x4E60\n"
  82                 "LDR     R2, =0x9C4C0\n"
  83                 "LDR     R1, [R3]\n"
  84                 "LDR     R0, =0x9D010\n"
  85                 "MOV     R3, #0x100\n"
  86                 "BL      sub_FFCCDF08\n"                //qInit
  87                 "LDR     R3, =0x4E20\n"
  88                 "LDR     R0, =0x51C0\n"
  89                 "LDR     R1, [R3]\n"
  90                 "BL      sub_FFCCDF08\n"                //qInit
  91                 "LDR     R3, =0x4EDC\n"
  92                 "LDR     R0, =0x9CFE4\n"
  93                 "LDR     R1, [R3]\n"
  94                 "BL      sub_FFCCDF08\n"                //qInit
  95                 "BL      sub_FFCD66D4\n"                //workQInit
  96                 "BL      sub_FFC012B0\n"
  97                 "MOV     R4, #0\n"
  98                 "MOV     R3, R0\n"
  99                 "MOV     R12, #0x800\n"
 100                 "LDR     R0, =h_usrRoot\n"
 101                 "MOV     R1, #0x4000\n"
 102                    );    
 103 //      "LDR     R2, =0xCF2B0\n"        // 0x9F2B0 + 0x30000
 104           asm volatile (
 105         "LDR     R2, =new_sa\n"
 106         "LDR     R2, [R2]\n"
 107             );
 108             asm volatile (
 109                 "STR     R12, [SP]\n"
 110                 "STR     R4, [SP,#4]\n"
 111                 "BL      sub_FFCCF558\n" //kernelInit
 112                 "ADD     SP, SP, #8\n"
 113                 "LDMFD   SP!, {R4,PC}\n"
 114     );
 115 }
 116 
 117 
 118 void  h_usrRoot()
 119 {
 120     asm volatile (
 121                 "STMFD   SP!, {R4,R5,LR}\n"
 122                 "MOV     R5, R0\n"
 123                 "MOV     R4, R1\n"
 124                 "BL      sub_FFC019D0\n"
 125                 "MOV     R1, R4\n"
 126                 "MOV     R0, R5\n"
 127                 "BL      sub_FFCC6CA4\n"                //memInit
 128                 "MOV     R1, R4\n"
 129                 "MOV     R0, R5\n"
 130                 "BL      sub_FFCC771C\n"                //memPartLibInit
 131                 //"BL      sub_FFC017E8\n"              //nullsub_1
 132                 "BL      sub_FFC01704\n"
 133                 "BL      sub_FFC01A0C\n"
 134                 "BL      sub_FFC019F0\n"
 135                 "BL      sub_FFC01A38\n"
 136                 "BL      sub_FFC019C4\n"
 137     );
 138 
 139     _taskCreateHookAdd(createHook);
 140     _taskDeleteHookAdd(deleteHook);
 141 
 142     drv_self_hide();
 143 
 144     asm volatile (
 145                 "LDMFD   SP!, {R4,R5,LR}\n"
 146                 "B       sub_FFC0136C\n"                //IsEmptyWriteCache_2
 147     );
 148 }
 149 

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