1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4
5 const char * const new_sa = &_end;
6
7
8 // Forward declarations
9 void CreateTask_PhySw();
10 void CreateTask_spytask();
11 extern volatile int jogdial_stopped;
12 void JogDial_task_my(void);
13
14
15 /*---------------------------------------------------------------------
16 Memory Map:
17 00001900 MEMBASEADDR start of data - used for initialized vars
18 00010FE3 end of inited data
19 00010FE4 start of bss - used for zeroed/uninited vars
20 00016E2F end of bss
21 0016EE30 MEMISOSTART start of CHDK code / data / bss
22 001B0000 end of CHDK data (approx)
23 001B0001 start of DRYOS heap (approx)
24 0037FFFF end of heap (?)
25
26 41269150 raw buffer 0
27 46000000 raw buffer 1
28
29 C0xxxxxx I/O
30
31 FF810000 ROMBASEADDR start of rom
32 FFFFFFFF end of rom
33 ----------------------------------------------------------------------*/
34
35
36 /*----------------------------------------------------------------------
37 taskCreateHook()
38 -----------------------------------------------------------------------*/
39 void taskCreateHook(int *p)
40 {
41 p-=17;
42
43 if (p[0] == (int)0xFF88322C)
44 p[0] = (int) capt_seq_task;
45
46 if (p[0] == (int)0xFF98642C)
47
48
49
50
51
52
53
54
55
56
57
58
59
60 p[0] = (int) movie_record_task;
61
62 if (p[0] == (int)0xFF8A0AA0)
63 p[0] = (int) init_file_modules_task;
64
65 if (p[0] == (int)0xFF8CF1A8)
66
67
68
69
70
71 p[0] = (int) exp_drv_task;
72
73 if (p[0] == (int)0xFF865894)
74 p[0] = (int) JogDial_task_my;
75 }
76
77
78
79
80 /*----------------------------------------------------------------------
81 boot()
82
83 Main entry point for the CHDK code
84 -----------------------------------------------------------------------*/
85 void __attribute__((naked,noinline)) boot()
86 {
87 asm volatile (
88
89 /* // LED Test
90 "LDR R1, =0xC0220134\n" // Orange LED
91 "MOV R0, #0x46\n"
92 "STR R0, [R1]\n"
93 "LDR R1, =0xC0223030\n" // AF LED
94 "MOV R0, #0x46\n"
95 "STR R0, [R1]\n"
96 "LDR R0, =0x100000 \n"
97 "loop1: \n"
98 "nop\n"
99 "SUBS R0,R0,#1 \n"
100 "BNE loop1 \n"
101 // End LED Test
102 */
103 " LDR R1, =0xC0410000 \n"
104 " MOV R0, #0 \n"
105 " STR R0, [R1] \n"
106 " MOV R1, #0x78 \n"
107 " MCR p15, 0, R1, c1, c0 \n"
108 " MOV R1, #0 \n"
109 " MCR p15, 0, R1, c7, c10, 4 \n"
110 " MCR p15, 0, R1, c7, c5 \n"
111 " MCR p15, 0, R1, c7, c6 \n"
112 " MOV R0, #0x3D \n"
113 " MCR p15, 0, R0, c6, c0 \n"
114 " MOV R0, #0xC000002F \n"
115 " MCR p15, 0, R0, c6, c1 \n"
116 " MOV R0, #0x35 \n"
117 " MCR p15, 0, R0, c6, c2 \n"
118 " MOV R0, #0x40000035 \n"
119 " MCR p15, 0, R0, c6, c3 \n"
120 " MOV R0, #0x80000017 \n"
121 " MCR p15, 0, R0, c6, c4 \n"
122 " LDR R0, =0xFF80002D \n"
123 " MCR p15, 0, R0, c6, c5 \n"
124 " MOV R0, #0x34 \n"
125 " MCR p15, 0, R0, c2, c0 \n"
126 " MOV R0, #0x34 \n"
127 " MCR p15, 0, R0, c2, c0, 1 \n"
128 " MOV R0, #0x34 \n"
129 " MCR p15, 0, R0, c3, c0 \n"
130 " LDR R0, =0x3333330 \n"
131 " MCR p15, 0, R0, c5, c0, 2 \n"
132 " LDR R0, =0x3333330 \n"
133 " MCR p15, 0, R0, c5, c0, 3 \n"
134 " MRC p15, 0, R0, c1, c0 \n"
135 " ORR R0, R0, #0x1000 \n"
136 " ORR R0, R0, #4 \n"
137 " ORR R0, R0, #1 \n"
138 " MCR p15, 0, R0, c1, c0 \n"
139 " MOV R1, #0x80000006 \n"
140 " MCR p15, 0, R1, c9, c1 \n"
141 " MOV R1, #6 \n"
142 " MCR p15, 0, R1, c9, c1, 1 \n"
143 " MRC p15, 0, R1, c1, c0 \n"
144 " ORR R1, R1, #0x50000 \n"
145 " MCR p15, 0, R1, c1, c0 \n"
146 " LDR R2, =0xC0200000 \n"
147 " MOV R1, #1 \n"
148 " STR R1, [R2, #0x10C] \n"
149 " MOV R1, #0xFF \n"
150 " STR R1, [R2, #0xC] \n"
151 " STR R1, [R2, #0x1C] \n"
152 " STR R1, [R2, #0x2C] \n"
153 " STR R1, [R2, #0x3C] \n"
154 " STR R1, [R2, #0x4C] \n"
155 " STR R1, [R2, #0x5C] \n"
156 " STR R1, [R2, #0x6C] \n"
157 " STR R1, [R2, #0x7C] \n"
158 " STR R1, [R2, #0x8C] \n"
159 " STR R1, [R2, #0x9C] \n"
160 " STR R1, [R2, #0xAC] \n"
161 " STR R1, [R2, #0xBC] \n"
162 " STR R1, [R2, #0xCC] \n"
163 " STR R1, [R2, #0xDC] \n"
164 " STR R1, [R2, #0xEC] \n"
165 " STR R1, [R2, #0xFC] \n"
166 " LDR R1, =0xC0400008 \n"
167 " LDR R2, =0x430005 \n"
168 " STR R2, [R1] \n"
169 " MOV R1, #1 \n"
170 " LDR R2, =0xC0243100 \n"
171 " STR R2, [R1] \n"
172 " LDR R2, =0xC0242010 \n"
173 " LDR R1, [R2] \n"
174 " ORR R1, R1, #1 \n"
175 " STR R1, [R2] \n"
176 " LDR R0, =0xFFC9A254 \n"
177
178 " LDR R1, =0x1900 \n"
179 " LDR R3, =0x10FE4 \n"
180 "loc_FF81013C:\n"
181 " CMP R1, R3 \n"
182 " LDRCC R2, [R0], #4 \n"
183 " STRCC R2, [R1], #4 \n"
184 " BCC loc_FF81013C \n"
185 " LDR R1, =0x16EE30 \n"
186 " MOV R2, #0 \n"
187 "loc_FF810154:\n"
188 " CMP R3, R1 \n"
189 " STRCC R2, [R3], #4 \n"
190 " BCC loc_FF810154 \n"
191 //" B sub_FF810354 \n"
192 " B sub_FF810354_my \n"
193 );
194 };
195
196
197 /*----------------------------------------------------------------------
198 sub_FF810354_my 0xFF810354
199 -----------------------------------------------------------------------*/
200 void __attribute__((naked,noinline)) sub_FF810354_my()
201 {
202 *(int*)0x1938 = (int)taskCreateHook;
203 *(int*)0x193C = (int)taskCreateHook;
204
205
206 // s95 @FF864D68
207 // fix for correct power-on
208 // must also comment out function in taskcreate_Startup_my
209
210 if ((*(int*) 0xC0220128) & 1) // look at play switch
211 *(int*)(0x25E8) = 0x200000; // start in play mode
212 else
213 *(int*)(0x25E8) = 0x100000; // start in rec mode
214
215
216
217 asm volatile (
218 " LDR R0, =0xFF8103CC \n"
219 " MOV R1, #0 \n"
220 " LDR R3, =0xFF810404 \n"
221 "loc_FF810360:\n"
222 " CMP R0, R3 \n"
223 " LDRCC R2, [R0], #4 \n"
224 " STRCC R2, [R1], #4 \n"
225 " BCC loc_FF810360 \n"
226 " LDR R0, =0xFF810404 \n"
227 " MOV R1, #0x4B0 \n"
228 " LDR R3, =0xFF810618 \n"
229 "loc_FF81037C:\n"
230 " CMP R0, R3 \n"
231 " LDRCC R2, [R0], #4 \n"
232 " STRCC R2, [R1], #4 \n"
233 " BCC loc_FF81037C \n"
234 " MOV R0, #0xD2 \n"
235 " MSR CPSR_cxsf, R0 \n"
236 " MOV SP, #0x1000 \n"
237 " MOV R0, #0xD3 \n"
238 " MSR CPSR_cxsf, R0 \n"
239 " MOV SP, #0x1000 \n"
240 " LDR R0, =0x6C4 \n"
241 " LDR R2, =0xEEEEEEEE \n"
242 " MOV R3, #0x1000 \n"
243 "loc_FF8103B0:\n"
244 " CMP R0, R3 \n"
245 " STRCC R2, [R0], #4 \n"
246 " BCC loc_FF8103B0 \n"
247 //" BL sub_FF811198 \n"
248 " BL sub_FF811198_my \n" // patched
249 );
250 }
251
252 /*----------------------------------------------------------------------
253 ** sub_FF811198_my @ 0xFF811198
254 -----------------------------------------------------------------------*/
255
256
257
258 void __attribute__((naked,noinline)) sub_FF811198_my( ) {
259 asm volatile (
260 " STR LR, [SP, #-4]! \n"
261 " SUB SP, SP, #0x74 \n"
262 " MOV R0, SP \n"
263 " MOV R1, #0x74 \n"
264 " BL sub_FFB9F348 \n"
265
266 " MOV R0, #0x53000 \n"
267 " STR R0, [SP, #4] \n"
268 //" LDR R0, =0x16EE30 \n"
269 " LDR R0, =new_sa \n" // patched
270 " LDR R0, [R0] \n"
271
272 " LDR R1, =0x379C00 \n"
273 " STR R0, [SP, #8] \n"
274 " RSB R0, R0, #0x1F80 \n"
275 " ADD R0, R0, #0x370000 \n"
276 " STR R0, [SP, #0xC] \n"
277 " LDR R0, =0x371F80 \n"
278 " STR R1, [SP] \n"
279 " STRD R0, [SP, #0x10] \n"
280 " MOV R0, #0x22 \n"
281 " STR R0, [SP, #0x18] \n"
282 " MOV R0, #0x68 \n"
283 " STR R0, [SP, #0x1C] \n"
284 " LDR R0, =0x19B \n"
285 //" LDR R1, =sub_FF815EE0 \n"
286 " LDR R1, =sub_FF815EE0_my \n" // patched
287
288 " STR R0, [SP, #0x20] \n"
289 " MOV R0, #0x96 \n"
290 " STR R0, [SP, #0x24] \n"
291 " STR R0, [SP, #0x28] \n"
292 " MOV R0, #0x64 \n"
293 " STR R0, [SP, #0x2C] \n"
294 " MOV R0, #0 \n"
295 " STR R0, [SP, #0x30] \n"
296 " STR R0, [SP, #0x34] \n"
297 " MOV R0, #0x10 \n"
298 " STR R0, [SP, #0x5C] \n"
299 " MOV R0, #0x800 \n"
300 " STR R0, [SP, #0x60] \n"
301 " MOV R0, #0xA0 \n"
302 " STR R0, [SP, #0x64] \n"
303 " MOV R0, #0x280 \n"
304 " STR R0, [SP, #0x68] \n"
305 " MOV R0, SP \n"
306 " MOV R2, #0 \n"
307 " BL sub_FF8134B8 \n"
308 " ADD SP, SP, #0x74 \n"
309 " LDR PC, [SP], #4 \n"
310 );
311 }
312
313
314 /*----------------------------------------------------------------------
315 sub_FF815EE0_my 0xFF815EE0
316 -----------------------------------------------------------------------*/
317
318 void __attribute__((naked,noinline)) sub_FF815EE0_my()
319 {
320 asm volatile (
321 " STMFD SP!, {R4,LR} \n"
322 " BL sub_FF810B20 \n"
323 " BL sub_FF81A33C \n"
324 " CMP R0, #0 \n"
325 " LDRLT R0, =0xFF815FF4 \n"
326 " BLLT sub_FF815FD4 \n"
327 " BL sub_FF815B1C \n"
328 " CMP R0, #0 \n"
329 " LDRLT R0, =0xFF815FFC \n"
330 " BLLT sub_FF815FD4 \n"
331 " LDR R0, =0xFF81600C \n"
332 " BL sub_FF815C04 \n"
333 " CMP R0, #0 \n"
334 " LDRLT R0, =0xFF816014 \n"
335 " BLLT sub_FF815FD4 \n"
336 " LDR R0, =0xFF81600C \n"
337 " BL sub_FF813CA4 \n"
338 " CMP R0, #0 \n"
339 " LDRLT R0, =0xFF816028 \n"
340 " BLLT sub_FF815FD4 \n"
341 " BL sub_FF819CC4 \n"
342 " CMP R0, #0 \n"
343 " LDRLT R0, =0xFF816034 \n"
344 " BLLT sub_FF815FD4 \n"
345 " BL sub_FF81167C \n"
346 " CMP R0, #0 \n"
347 " LDRLT R0, =0xFF816040 \n"
348 " BLLT sub_FF815FD4 \n"
349 " LDMFD SP!, {R4,LR} \n"
350 //" B sub_FF81FB54 \n"
351 " B taskcreate_Startup_my \n"
352 " MOV R0, #0 \n"
353 " LDMFD SP!, {R3-R5,PC} \n"
354 );
355 }
356
357
358 /*----------------------------------------------------------------------
359 taskcreate_Startup_my 0xFF81FB54
360 -----------------------------------------------------------------------*/
361
362 void __attribute__((naked,noinline)) taskcreate_Startup_my()
363 {
364 asm volatile (
365 " STMFD SP!, {R3-R5,LR} \n"
366 " BL sub_FF8346CC \n"
367 " BL sub_FF83C6B0 \n"
368 " CMP R0, #0 \n"
369 " BNE loc_FF81FBA8 \n"
370 " BL sub_FF8360B8 \n"
371 " CMP R0, #0 \n"
372 " BEQ loc_FF81FBA8 \n"
373 " LDR R4, =0xC0220000 \n"
374 " LDR R0, [R4, #0x12C] \n"
375 " TST R0, #1 \n"
376 " MOVEQ R0, #0x12C \n"
377 " BLEQ sub_FF83AA4C \n"
378 " BL sub_FF8346C8 \n"
379 " CMP R0, #0 \n"
380 " BNE loc_FF81FBA8 \n"
381 " BL sub_FF833D5C \n"
382 " MOV R0, #0x44 \n"
383 " STR R0, [R4, #0x1C] \n"
384 " BL sub_FF833F4C \n"
385 "loc_FF81FBA4:\n"
386 " B loc_FF81FBA4 \n"
387 "loc_FF81FBA8:\n"
388 // we must remove this for power-on mode handling in sub_FF810354_my to work
389 //" BL sub_FF8346D4 \n"
390 " BL sub_FF8346D0 \n"
391 " BL sub_FF83A8C4 \n"
392 " LDR R1, =0x3CE000 \n"
393 " MOV R0, #0 \n"
394 " BL sub_FF83AD0C \n"
395 " BL sub_FF83AAB8 \n"
396 " MOV R3, #0 \n"
397 " STR R3, [SP] \n"
398 //" LDR R3, =0xFF81FAF0 \n"
399 " LDR R3, =task_Startup_my \n" // patched
400
401 " MOV R2, #0 \n"
402 " MOV R1, #0x19 \n"
403 " LDR R0, =0xFF81FBF0 \n"
404 " BL sub_FF81E8A0 \n"
405 " MOV R0, #0 \n"
406 " LDMFD SP!, {R3-R5,PC} \n"
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436 );
437 }
438
439
440 /*----------------------------------------------------------------------
441 task_Startup_my 0xFF81FAF0
442 -----------------------------------------------------------------------*/
443
444 void __attribute__((naked,noinline)) task_Startup_my()
445 {
446 asm volatile (
447 " STMFD SP!, {R4,LR} \n"
448 " BL sub_FF816594 \n"
449 " BL sub_FF835830 \n"
450 " BL sub_FF8339B4 \n"
451 " BL sub_FF83C6F4 \n"
452 " BL sub_FF83C8E0 \n"
453 //" BL sub_FF83C788 \n"
454 " BL sub_FF83CA88 \n"
455 " BL sub_FF832484 \n"
456 " BL sub_FF83C910 \n"
457 " BL sub_FF83A068 \n"
458 " BL sub_FF83CA8C \n"
459 //" BL sub_FF8345B0 \n"
460 );
461
462 CreateTask_PhySw(); // our keyboard task
463 CreateTask_spytask(); // chdk initialization
464
465 asm volatile (
466 " BL sub_FF837D14 \n"
467 " BL sub_FF83CAA4 \n"
468 " BL sub_FF831888 \n"
469 " BL sub_FF833318 \n"
470 " BL sub_FF83C478 \n"
471 " BL sub_FF833968 \n"
472 " BL sub_FF8332B4 \n"
473 " BL sub_FF8324B8 \n"
474 " BL sub_FF83D670 \n"
475 " BL sub_FF833278 \n"
476 " LDMFD SP!, {R4,LR} \n"
477 " B sub_FF8166B4 \n"
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519 );
520 }
521
522
523 /*----------------------------------------------------------------------
524 spytask
525 -----------------------------------------------------------------------*/
526 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
527 {
528 (void)ua; (void)ub; (void)uc; (void)ud; (void)ue; (void)uf;
529 core_spytask();
530 }
531
532
533 /*----------------------------------------------------------------------
534 CreateTask_spytask
535 -----------------------------------------------------------------------*/
536 void CreateTask_spytask()
537 {
538 _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
539 }
540
541
542
543 /*----------------------------------------------------------------------
544 CreateTask_PhySw 0xFF8345A8
545 -----------------------------------------------------------------------*/
546 void __attribute__((naked,noinline)) CreateTask_PhySw()
547 {
548 asm volatile (
549
550
551 " STMFD SP!, {R3-R5,LR} \n"
552 " LDR R4, =0x1C30 \n"
553 " LDR R0, [R4, #0x10] \n"
554 " CMP R0, #0 \n"
555 " BNE loc_FF8345E4 \n"
556 " MOV R3, #0 \n"
557 " STR R3, [SP] \n"
558 //" LDR R3, =sub_FF83457C \n"
559 " LDR R3, =mykbd_task \n" // PhySw Task patch
560 " MOV R2, #0x2000 \n" // larger stack
561
562
563 " MOV R1, #0x17 \n"
564 " LDR R0, =0xFF8347DC \n"
565 " BL sub_FF83AB0C \n"
566 " STR R0, [R4, #0x10] \n"
567 "loc_FF8345E4:\n"
568 " BL sub_FF865BC0 \n"
569 " BL sub_FF894834 \n"
570 " BL sub_FF836030 \n"
571 " CMP R0, #0 \n"
572 " LDREQ R1, =0x34CC0 \n"
573 " LDMEQFD SP!, {R3-R5,LR} \n"
574 " BEQ sub_FF8947BC \n"
575 " LDMFD SP!, {R3-R5,PC} \n"
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594 );
595 }
596
597
598 /*----------------------------------------------------------------------
599 init_file_modules_task() 0xFF8A0AA0
600 -----------------------------------------------------------------------*/
601
602 void __attribute__((naked,noinline)) init_file_modules_task()
603 {
604 asm volatile (
605 " STMFD SP!, {R4-R6,LR} \n"
606 " BL sub_FF896CE0 \n"
607 " LDR R5, =0x5006 \n"
608 " MOVS R4, R0 \n"
609 " MOVNE R1, #0 \n"
610 " MOVNE R0, R5 \n"
611 " BLNE sub_FF89AAD4 \n"
612 //" BL sub_FF896D0C \n"
613 " BL sub_FF896D0C_my \n" // patched
614 " BL core_spytask_can_start\n" // added
615 " CMP R4, #0 \n"
616 " MOVEQ R0, R5 \n"
617 " LDMEQFD SP!, {R4-R6,LR} \n"
618 " MOVEQ R1, #0 \n"
619 " BEQ sub_FF89AAD4 \n"
620 " LDMFD SP!, {R4-R6,PC} \n"
621 );
622 }
623
624
625 /*----------------------------------------------------------------------
626 sub_FF896D0C_my()
627 -----------------------------------------------------------------------*/
628
629 void __attribute__((naked,noinline)) sub_FF896D0C_my()
630 {
631 asm volatile (
632 " STMFD SP!, {R4,LR} \n"
633 " MOV R0, #3 \n"
634 //" BL sub_FF876598 \n"
635 " BL sub_FF876598_my \n" // patched
636 " BL sub_FF96A8E8 \n"
637 " LDR R4, =0x3244 \n"
638 " LDR R0, [R4, #4] \n"
639 " CMP R0, #0 \n"
640 " BNE loc_FF896D44 \n"
641 " BL sub_FF8757DC \n"
642 " BL sub_FF95D878 \n"
643 " BL sub_FF8757DC \n"
644 " BL sub_FF871B80 \n"
645 " BL sub_FF8756DC \n"
646 " BL sub_FF95D914 \n"
647 "loc_FF896D44:\n"
648 " MOV R0, #1 \n"
649 " STR R0, [R4] \n"
650 " LDMFD SP!, {R4,PC} \n"
651 );
652 }
653
654
655 /*----------------------------------------------------------------------
656 sub_FF876598_my()
657 -----------------------------------------------------------------------*/
658
659 void __attribute__((naked,noinline)) sub_FF876598_my()
660 {
661 asm volatile (
662 " STMFD SP!, {R4-R8,LR} \n"
663 " MOV R8, R0 \n"
664 " BL sub_FF876518 \n"
665 " LDR R1, =0x3B0A8 \n"
666 " MOV R6, R0 \n"
667 " ADD R4, R1, R0, LSL #7 \n"
668 " LDR R0, [R4, #0x6C] \n"
669 " CMP R0, #4 \n"
670 " LDREQ R1, =0x83F \n"
671 " LDREQ R0, =0xFF876058 \n"
672 " BLEQ sub_FF81EB78 \n"
673 " MOV R1, R8 \n"
674 " MOV R0, R6 \n"
675 " BL sub_FF875DCC \n"
676 " LDR R0, [R4, #0x38] \n"
677 " BL sub_FF876C3C \n"
678 " CMP R0, #0 \n"
679 " STREQ R0, [R4, #0x6C] \n"
680 " MOV R0, R6 \n"
681 " BL sub_FF875E5C \n"
682 " MOV R0, R6 \n"
683 //" BL sub_FF8761C0 \n"
684 " BL sub_FF8761C0_my \n" // patched
685
686 " MOV R5, R0 \n"
687 " MOV R0, R6 \n"
688 " BL sub_FF8763F0 \n"
689 " LDR R6, [R4, #0x3C] \n"
690 " AND R7, R5, R0 \n"
691 " CMP R6, #0 \n"
692 " LDR R1, [R4, #0x38] \n"
693 " MOVEQ R0, #0x80000001 \n"
694 " MOV R5, #0 \n"
695 " BEQ loc_FF876648 \n"
696 " MOV R0, R1 \n"
697 " BL sub_FF875944 \n"
698 " CMP R0, #0 \n"
699 " MOVNE R5, #4 \n"
700 " CMP R6, #5 \n"
701 " ORRNE R0, R5, #1 \n"
702 " BICEQ R0, R5, #1 \n"
703 " CMP R7, #0 \n"
704 " BICEQ R0, R0, #2 \n"
705 " ORREQ R0, R0, #0x80000000 \n"
706 " BICNE R0, R0, #0x80000000 \n"
707 " ORRNE R0, R0, #2 \n"
708 "loc_FF876648:\n"
709 " CMP R8, #7 \n"
710 " STR R0, [R4, #0x40] \n"
711 " LDMNEFD SP!, {R4-R8,PC} \n"
712 " MOV R0, R8 \n"
713 " BL sub_FF876568 \n"
714 " CMP R0, #0 \n"
715 " LDMEQFD SP!, {R4-R8,LR} \n"
716 " LDREQ R0, =0xFF876694 \n"
717 " BEQ sub_FF81177C \n"
718 " LDMFD SP!, {R4-R8,PC} \n"
719 );
720 }
721
722
723 /*----------------------------------------------------------------------
724 sub_FF8761C0_my()
725 -----------------------------------------------------------------------*/
726
727 void __attribute__((naked,noinline)) sub_FF8761C0_my()
728 {
729 asm volatile (
730 " STMFD SP!, {R4-R6,LR} \n"
731 " MOV R5, R0 \n"
732 " LDR R0, =0x3B0A8 \n"
733 " ADD R4, R0, R5, LSL #7 \n"
734 " LDR R0, [R4, #0x6C] \n"
735 " TST R0, #2 \n"
736 " MOVNE R0, #1 \n"
737 " LDMNEFD SP!, {R4-R6,PC} \n"
738 " LDR R0, [R4, #0x38] \n"
739 " MOV R1, R5 \n"
740 //" BL sub_FF875EE0 \n"
741 " BL sub_FF875EE0_my \n" // patched
742
743 " CMP R0, #0 \n"
744 " LDRNE R0, [R4, #0x38] \n"
745 " MOVNE R1, R5 \n"
746 " BLNE sub_FF87607C \n"
747 " LDR R2, =0x3B128 \n"
748 " ADD R1, R5, R5, LSL #4 \n"
749 " LDR R1, [R2, R1, LSL #2] \n"
750 " CMP R1, #4 \n"
751 " BEQ loc_FF876220 \n"
752 " CMP R0, #0 \n"
753 " LDMEQFD SP!, {R4-R6,PC} \n"
754 " MOV R0, R5 \n"
755 " BL sub_FF8759D4 \n"
756 "loc_FF876220:\n"
757 " CMP R0, #0 \n"
758 " LDRNE R1, [R4, #0x6C] \n"
759 " ORRNE R1, R1, #2 \n"
760 " STRNE R1, [R4, #0x6C] \n"
761 " LDMFD SP!, {R4-R6,PC} \n"
762 );
763 }
764
765
766 /*----------------------------------------------------------------------
767 sub_FF875EE0_my()
768 -----------------------------------------------------------------------*/
769
770 void __attribute__((naked,noinline)) sub_FF875EE0_my()
771 {
772 asm volatile (
773 " STMFD SP!, {R4-R10,LR} \n"
774 " MOV R9, R0 \n"
775 " LDR R0, =0x3B0A8 \n"
776 " MOV R8, #0 \n"
777 " ADD R5, R0, R1, LSL #7 \n"
778 " LDR R0, [R5, #0x3C] \n"
779 " MOV R7, #0 \n"
780 " CMP R0, #7 \n"
781 " MOV R6, #0 \n"
782 " ADDLS PC, PC, R0, LSL #2 \n"
783 " B loc_FF876038 \n"
784 " B loc_FF875F44 \n"
785 " B loc_FF875F2C \n"
786 " B loc_FF875F2C \n"
787 " B loc_FF875F2C \n"
788 " B loc_FF875F2C \n"
789 " B loc_FF876030 \n"
790 " B loc_FF875F2C \n"
791 " B loc_FF875F2C \n"
792 "loc_FF875F2C:\n"
793 " MOV R2, #0 \n"
794 " MOV R1, #0x200 \n"
795 " MOV R0, #2 \n"
796 " BL sub_FF890D90 \n"
797 " MOVS R4, R0 \n"
798 " BNE loc_FF875F4C \n"
799 "loc_FF875F44:\n"
800 " MOV R0, #0 \n"
801 " LDMFD SP!, {R4-R10,PC} \n"
802 "loc_FF875F4C:\n"
803 " LDR R12, [R5, #0x50] \n"
804 " MOV R3, R4 \n"
805 " MOV R2, #1 \n"
806 " MOV R1, #0 \n"
807 " MOV R0, R9 \n"
808 " BLX R12 \n"
809 " CMP R0, #1 \n"
810 " BNE loc_FF875F78 \n"
811 " MOV R0, #2 \n"
812 " BL sub_FF890EE0 \n"
813 " B loc_FF875F44 \n"
814 "loc_FF875F78:\n"
815 " LDR R1, [R5, #0x64] \n"
816 " MOV R0, R9 \n"
817 " BLX R1 \n"
818 //------------------ begin added code ---------------
819 "MOV R1, R4\n" // pointer to MBR in R1
820 "BL mbr_read_dryos\n" // total sectors count in R0 before and after call
821
822 // Start of DataGhost's FAT32 autodetection code
823 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
824 // According to the code below, we can use R1, R2, R3 and R12.
825 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
826 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
827 "MOV R12, R4\n" // Copy the MBR start address so we have something to work with
828 "MOV LR, R4\n" // Save old offset for MBR signature
829 "MOV R1, #1\n" // Note the current partition number
830 "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
831 "dg_sd_fat32:\n"
832 "CMP R1, #4\n" // Did we already see the 4th partition?
833 "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
834 "ADD R12, R12, #0x10\n" // Second partition
835 "ADD R1, R1, #1\n" // Second partition for the loop
836 "dg_sd_fat32_enter:\n"
837 "LDRB R2, [R12, #0x1BE]\n" // Partition status
838 "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
839 "CMP R3, #0xB\n" // Is this a FAT32 partition?
840 "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
841 "BNE dg_sd_fat32\n" // No, it isn't.
842 "CMP R2, #0x00\n" // It is, check the validity of the partition type
843 "CMPNE R2, #0x80\n"
844 "BNE dg_sd_fat32\n" // Invalid, go to next partition
845 // This partition is valid, it's the first one, bingo!
846 "MOV R4, R12\n" // Move the new MBR offset for the partition detection.
847
848 "dg_sd_fat32_end:\n"
849 // End of DataGhost's FAT32 autodetection code
850 //------------------ end added code ---------------
851 " LDRB R1, [R4, #0x1C9] \n"
852 " LDRB R3, [R4, #0x1C8] \n"
853 " LDRB R12, [R4, #0x1CC] \n"
854 " MOV R1, R1, LSL #0x18 \n"
855 " ORR R1, R1, R3, LSL #0x10 \n"
856 " LDRB R3, [R4, #0x1C7] \n"
857 " LDRB R2, [R4, #0x1BE] \n"
858 //" LDRB LR, [R4, #0x1FF] \n" // replaced, see below
859
860 " ORR R1, R1, R3, LSL #8 \n"
861 " LDRB R3, [R4, #0x1C6] \n"
862 " CMP R2, #0 \n"
863 " CMPNE R2, #0x80 \n"
864 " ORR R1, R1, R3 \n"
865 " LDRB R3, [R4, #0x1CD] \n"
866 " MOV R3, R3, LSL #0x18 \n"
867 " ORR R3, R3, R12, LSL #0x10 \n"
868 " LDRB R12, [R4, #0x1CB] \n"
869 " ORR R3, R3, R12, LSL #8 \n"
870 " LDRB R12, [R4, #0x1CA] \n"
871 " ORR R3, R3, R12 \n"
872 //" LDRB R12, [R4, #0x1FE] \n"
873 " LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55)
874 " LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA)
875 " BNE loc_FF876004 \n"
876 " CMP R0, R1 \n"
877 " BCC loc_FF876004 \n"
878 " ADD R2, R1, R3 \n"
879 " CMP R2, R0 \n"
880 " CMPLS R12, #0x55 \n"
881 " CMPEQ LR, #0xAA \n"
882 " MOVEQ R7, R1 \n"
883 " MOVEQ R6, R3 \n"
884 " MOVEQ R4, #1 \n"
885 " BEQ loc_FF876008 \n"
886 "loc_FF876004:\n"
887 " MOV R4, R8 \n"
888 "loc_FF876008:\n"
889 " MOV R0, #2 \n"
890 " BL sub_FF890EE0 \n"
891 " CMP R4, #0 \n"
892 " BNE loc_FF876044 \n"
893 " LDR R1, [R5, #0x64] \n"
894 " MOV R7, #0 \n"
895 " MOV R0, R9 \n"
896 " BLX R1 \n"
897 " MOV R6, R0 \n"
898 " B loc_FF876044 \n"
899 "loc_FF876030:\n"
900 " MOV R6, #0x40 \n"
901 " B loc_FF876044 \n"
902 "loc_FF876038:\n"
903 " LDR R1, =0x597 \n"
904 " LDR R0, =0xFF876058 \n"
905 " BL sub_FF81EB78 \n"
906 "loc_FF876044:\n"
907 " STR R7, [R5, #0x44]! \n"
908 " STMIB R5, {R6,R8} \n"
909 " MOV R0, #1 \n"
910 " LDMFD SP!, {R4-R10,PC} \n"
911 );
912 }
913
914
915 /*----------------------------------------------------------------------
916 JogDial_task_my() 0xFF865894
917
918 Patched jog dial task
919 -----------------------------------------------------------------------*/
920 void __attribute__((naked,noinline)) JogDial_task_my()
921 {
922 asm volatile (
923 " STMFD SP!, {R4-R11,LR} \n"
924 " SUB SP, SP, #0x24 \n"
925 " BL sub_FF865C2C \n"
926 " LDR R1, =0x25FC \n"
927 " LDR R6, =0xFFBA548C \n"
928
929 " MOV R0, #0 \n"
930 " ADD R3, SP, #0x18 \n"
931 " ADD R12, SP, #0x1C \n"
932 " ADD R10, SP, #8 \n"
933 " MOV R2, #0 \n"
934 " ADD R9, SP, #0x10 \n"
935 "loc_FF8658C0:\n"
936 " ADD R12, SP, #0x1C \n"
937 " ADD LR, R12, R0, LSL #1 \n"
938 " MOV R2, #0 \n"
939 " ADD R3, SP, #0x18 \n"
940 " STRH R2, [LR] \n"
941 " ADD LR, R3, R0, LSL #1 \n"
942 " STRH R2, [LR] \n"
943 " STR R2, [R9, R0, LSL #2] \n"
944 " STR R2, [R10, R0, LSL #2] \n"
945 " ADD R0, R0, #1 \n"
946 " CMP R0, #2 \n"
947 " BLT loc_FF8658C0 \n"
948 "loc_FF8658F0:\n"
949 " LDR R0, =0x25FC \n"
950 " MOV R2, #0 \n"
951 " LDR R0, [R0, #8] \n"
952 " MOV R1, SP \n"
953 " BL sub_FF83A2F8 \n"
954 " CMP R0, #0 \n"
955 " LDRNE R1, =0x262 \n"
956 " LDRNE R0, =0xFF865B50 \n"
957 " BLNE sub_FF81EB78 \n"
958 //------------------ begin added code ---------------
959 "labelA:\n"
960 "LDR R0, =jogdial_stopped\n"
961 "LDR R0, [R0]\n"
962 "CMP R0, #1\n"
963 "BNE labelB\n" // continue on if jogdial_stopped = 0
964 "MOV R0, #40\n"
965 "BL _SleepTask\n" // jogdial_stopped=1 -- give time back to OS and suspend jogdial task
966 "B labelA\n"
967 "labelB:\n"
968 //------------------ end added code -----------------
969 " LDR R0, [SP] \n"
970 " AND R4, R0, #0xFF \n"
971 " AND R0, R0, #0xFF00 \n"
972 " CMP R0, #0x100 \n"
973 " BEQ loc_FF865960 \n"
974 " CMP R0, #0x200 \n"
975 " BEQ loc_FF865998 \n"
976 " CMP R0, #0x300 \n"
977 " BEQ loc_FF865B90 \n"
978 " CMP R0, #0x400 \n"
979 " BNE loc_FF8658F0 \n"
980 " CMP R4, #0 \n"
981 " LDRNE R1, =0x2ED \n"
982 " LDRNE R0, =0xFF865B50 \n"
983 " BLNE sub_FF81EB78 \n"
984 " RSB R0, R4, R4, LSL #3 \n"
985 " LDR R0, [R6, R0, LSL #2] \n"
986 "loc_FF865958:\n"
987 " BL sub_FF865C10 \n"
988 " B loc_FF8658F0 \n"
989 "loc_FF865960:\n"
990 " LDR R7, =0x260C \n"
991 " LDR R0, [R7, R4, LSL #2] \n"
992 " BL sub_FF83B290 \n"
993 " LDR R2, =0xFF8657E0 \n"
994 " ADD R1, R2, #0 \n"
995 " ORR R3, R4, #0x200 \n"
996 " MOV R0, #0x28 \n"
997 " BL sub_FF83B1AC \n"
998 " TST R0, #1 \n"
999 " CMPNE R0, #0x15 \n"
1000 " STR R0, [R10, R4, LSL #2] \n"
1001 " BEQ loc_FF8658F0 \n"
1002 " MOV R1, #0x274 \n"
1003 " B loc_FF865B3C \n"
1004 "loc_FF865998:\n"
1005 " RSB R5, R4, R4, LSL #3 \n"
1006 " LDR R0, [R6, R5, LSL #2] \n"
1007 " LDR R1, =0xC0240104 \n"
1008 " LDR R0, [R1, R0, LSL #8] \n"
1009 " MOV R2, R0, ASR #0x10 \n"
1010 " ADD R0, SP, #0x1C \n"
1011 " ADD R0, R0, R4, LSL #1 \n"
1012 " STR R0, [SP, #0x20] \n"
1013 " STRH R2, [R0] \n"
1014 " ADD R0, SP, #0x18 \n"
1015 " ADD R11, R0, R4, LSL #1 \n"
1016 " LDRSH R3, [R11] \n"
1017 " SUB R0, R2, R3 \n"
1018 " CMP R0, #0 \n"
1019 " BNE loc_FF865A18 \n"
1020 " LDR R0, [R9, R4, LSL #2] \n"
1021 " CMP R0, #0 \n"
1022 " BEQ loc_FF865AF8 \n"
1023 " LDR R7, =0x260C \n"
1024 " LDR R0, [R7, R4, LSL #2] \n"
1025 " BL sub_FF83B290 \n"
1026 " LDR R2, =0xFF8657EC \n"
1027 " ADD R1, R2, #0 \n"
1028 " ORR R3, R4, #0x300 \n"
1029 " MOV R0, #0x1F4 \n"
1030 " BL sub_FF83B1AC \n"
1031 " TST R0, #1 \n"
1032 " CMPNE R0, #0x15 \n"
1033 " STR R0, [R7, R4, LSL #2] \n"
1034 " BEQ loc_FF865AF8 \n"
1035 " LDR R1, =0x28D \n"
1036 " B loc_FF865AF0 \n"
1037 "loc_FF865A18:\n"
1038 " MOV R1, R0 \n"
1039 " RSBLT R0, R0, #0 \n"
1040 " MOVLE R7, #0 \n"
1041 " MOVGT R7, #1 \n"
1042 " CMP R0, #0xFF \n"
1043 " BLS loc_FF865A58 \n"
1044 " CMP R1, #0 \n"
1045 " RSBLE R0, R3, #0xFF \n"
1046 " ADDLE R0, R0, #0x7F00 \n"
1047 " ADDLE R0, R0, R2 \n"
1048 " RSBGT R0, R2, #0xFF \n"
1049 " ADDGT R0, R0, #0x7F00 \n"
1050 " ADDGT R0, R0, R3 \n"
1051 " ADD R0, R0, #0x8000 \n"
1052 " ADD R0, R0, #1 \n"
1053 " EOR R7, R7, #1 \n"
1054 "loc_FF865A58:\n"
1055 " STR R0, [SP, #4] \n"
1056 " LDR R0, [R9, R4, LSL #2] \n"
1057 " CMP R0, #0 \n"
1058 " ADDEQ R0, R6, R5, LSL #2 \n"
1059 " LDREQ R0, [R0, #8] \n"
1060 " BEQ loc_FF865A90 \n"
1061 " ADD R8, R6, R5, LSL #2 \n"
1062 " ADD R1, R8, R7, LSL #2 \n"
1063 " LDR R1, [R1, #0x10] \n"
1064 " CMP R1, R0 \n"
1065 " BEQ loc_FF865A94 \n"
1066 " LDR R0, [R8, #0xC] \n"
1067 " BL sub_FF89CCA4 \n"
1068 " LDR R0, [R8, #8] \n"
1069 "loc_FF865A90:\n"
1070 " BL sub_FF89CCA4 \n"
1071 "loc_FF865A94:\n"
1072 " ADD R0, R6, R5, LSL #2 \n"
1073 " ADD R7, R0, R7, LSL #2 \n"
1074 " LDR R0, [R7, #0x10] \n"
1075 " LDR R1, [SP, #4] \n"
1076 " BL sub_FF89CBCC \n"
1077 " LDR R0, [R7, #0x10] \n"
1078 " LDR R7, =0x260C \n"
1079 " STR R0, [R9, R4, LSL #2] \n"
1080 " LDR R0, [SP, #0x20] \n"
1081 " LDRH R0, [R0] \n"
1082 " STRH R0, [R11] \n"
1083 " LDR R0, [R7, R4, LSL #2] \n"
1084 " BL sub_FF83B290 \n"
1085 " LDR R2, =0xFF8657EC \n"
1086 " ADD R1, R2, #0 \n"
1087 " ORR R3, R4, #0x300 \n"
1088 " MOV R0, #0x1F4 \n"
1089 " BL sub_FF83B1AC \n"
1090 " TST R0, #1 \n"
1091 " CMPNE R0, #0x15 \n"
1092 " STR R0, [R7, R4, LSL #2] \n"
1093 " BEQ loc_FF865AF8 \n"
1094 " LDR R1, =0x2CF \n"
1095 "loc_FF865AF0:\n"
1096 " LDR R0, =0xFF865B50 \n"
1097 " BL sub_FF81EB78 \n"
1098 "loc_FF865AF8:\n"
1099 " ADD R0, R6, R5, LSL #2 \n"
1100 " LDR R0, [R0, #0x18] \n"
1101 " CMP R0, #1 \n"
1102 " BNE loc_FF865B88 \n"
1103 " LDR R0, =0x25FC \n"
1104 " LDR R0, [R0, #0xC] \n"
1105 " CMP R0, #0 \n"
1106 " BEQ loc_FF865B88 \n"
1107 " LDR R2, =0xFF8657E0 \n"
1108 " ADD R1, R2, #0 \n"
1109 " ORR R3, R4, #0x400 \n"
1110 " BL sub_FF83B1AC \n"
1111 " TST R0, #1 \n"
1112 " CMPNE R0, #0x15 \n"
1113 " STR R0, [R10, R4, LSL #2] \n"
1114 " BEQ loc_FF8658F0 \n"
1115 " LDR R1, =0x2D6 \n"
1116 "loc_FF865B3C:\n"
1117 " LDR R0, =0xFF865B50 \n"
1118 " BL sub_FF81EB78 \n"
1119 " B loc_FF8658F0 \n"
1120 " NOP \n"
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137 "loc_FF865B88:\n"
1138 " LDR R0, [R6, R5, LSL #2] \n"
1139 " B loc_FF865958 \n"
1140 "loc_FF865B90:\n"
1141 " LDR R0, [R9, R4, LSL #2] \n"
1142 " CMP R0, #0 \n"
1143 " MOVEQ R1, #0x2E0 \n"
1144 " LDREQ R0, =0xFF865B50 \n"
1145 " BLEQ sub_FF81EB78 \n"
1146 " RSB R0, R4, R4, LSL #3 \n"
1147 " ADD R0, R6, R0, LSL #2 \n"
1148 " LDR R0, [R0, #0xC] \n"
1149 " BL sub_FF89CCA4 \n"
1150 " MOV R2, #0 \n"
1151 " STR R2, [R9, R4, LSL #2] \n"
1152 " B loc_FF8658F0 \n"
1153
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1160
1161
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1165
1166
1167
1168
1169
1170
1171 );
1172 };
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