This source file includes following definitions.
- change_video_tables
- movie_record_task
- sub_FFD0C488_my
- sub_FFDF703C_my
1
2
3
4 #include "conf.h"
5
6 int *video_quality = &conf.video_quality;
7 int *video_mode = &conf.video_mode;
8
9 long def_table[24]={0x2000, 0x38D, 0x788, 0x5800, 0x9C5, 0x14B8, 0x10000, 0x1C6A, 0x3C45, 0x8000, 0xE35, 0x1E23,
10 0x1CCD, -0x2E1, -0x579, 0x4F33, -0x7EB, -0xF0C, 0xE666, -0x170A, -0x2BC6, 0x7333, -0xB85, -0x15E3};
11
12 long table[24];
13
14 void change_video_tables(int a, int b){
15 int i;
16 for (i=0;i<24;i++) table[i]=(def_table[i]*a)/b;
17 }
18
19 long CompressionRateTable[]={0x60, 0x5D, 0x5A, 0x57, 0x54, 0x51, 0x4D, 0x48, 0x42, 0x3B, 0x32, 0x29, 0x22, 0x1D, 0x17, 0x14, 0x10, 0xE, 0xB, 9, 7, 6, 5, 4, 3, 2, 1};
20
21
22
23 void __attribute__((naked,noinline)) movie_record_task() {
24 asm volatile (
25 " STMFD SP!, {R2-R8,LR} \n"
26 " LDR R8, =0x346 \n"
27 " LDR R7, =0x2710 \n"
28 " LDR R4, =0x5468 \n"
29 " MOV R6, #0 \n"
30 " MOV R5, #1 \n"
31
32 "loc_FFD0C994:\n"
33 " LDR R0, [R4, #0x18] \n"
34 " MOV R2, #0 \n"
35 " ADD R1, SP, #4 \n"
36 " BL sub_FFC28AA0 /*_ReceiveMessageQueue*/ \n"
37 " LDR R0, [R4, #0x20] \n"
38 " CMP R0, #0 \n"
39 " BNE loc_FFD0CA64 \n"
40 " LDR R0, [SP, #4] \n"
41 " LDR R1, [R0] \n"
42 " SUB R1, R1, #2 \n"
43 " CMP R1, #9 \n"
44 " ADDLS PC, PC, R1, LSL#2 \n"
45 " B loc_FFD0CA64 \n"
46 " B loc_FFD0CA18 \n"
47 " B loc_FFD0CA38 \n"
48 " B loc_FFD0CA48 \n"
49 " B loc_FFD0CA50 \n"
50 " B loc_FFD0CA20 \n"
51 " B loc_FFD0CA58 \n"
52 " B loc_FFD0CA28 \n"
53 " B loc_FFD0CA64 \n"
54 " B loc_FFD0CA60 \n"
55 " B loc_FFD0C9F0 \n"
56
57 "loc_FFD0C9F0:\n"
58 " LDR R0, =0xFFD0C688 \n"
59 " STR R6, [R4, #0x34] \n"
60 " STR R0, [R4, #0xA8] \n"
61 " LDR R0, =0xFFD0C118 \n"
62 " LDR R2, =0xFFD0C034 \n"
63 " LDR R1, =0x6EB90 \n"
64 " STR R6, [R4, #0x24] \n"
65 " BL sub_FFCB6618 \n"
66 " STR R5, [R4, #0x38] \n"
67 " B loc_FFD0CA64 \n"
68
69 "loc_FFD0CA18:\n"
70 " BL unlock_optical_zoom\n"
71 " BL sub_FFD0C780 \n"
72 " B loc_FFD0CA64 \n"
73
74 "loc_FFD0CA20:\n"
75 " BL sub_FFD0C488_my \n"
76 " B loc_FFD0CA64 \n"
77
78 "loc_FFD0CA28:\n"
79 " LDR R1, [R0, #0x10] \n"
80 " LDR R0, [R0, #4] \n"
81 " BL sub_FFDF8CF0 \n"
82 " B loc_FFD0CA64 \n"
83
84 "loc_FFD0CA38:\n"
85 " LDR R0, [R4, #0x38] \n"
86 " CMP R0, #5 \n"
87 " STRNE R5, [R4, #0x28] \n"
88 " B loc_FFD0CA64 \n"
89
90 "loc_FFD0CA48:\n"
91 " BL sub_FFD0C2A0 \n"
92 " B loc_FFD0CA64 \n"
93
94 "loc_FFD0CA50:\n"
95 " BL sub_FFD0C164 \n"
96 " B loc_FFD0CA64 \n"
97
98 "loc_FFD0CA58:\n"
99 " BL sub_FFD0BFC0 \n"
100 " B loc_FFD0CA64 \n"
101
102 "loc_FFD0CA60:\n"
103 " BL sub_FFD0CBCC \n"
104
105 "loc_FFD0CA64:\n"
106 " LDR R1, [SP, #4] \n"
107 " LDR R3, =0xFFD0BE50 /*'MovieRecorder.c'*/ \n"
108 " STR R6, [R1] \n"
109 " STR R8, [SP] \n"
110 " LDR R0, [R4, #0x1C] \n"
111 " MOV R2, R7 \n"
112 " BL sub_FFC0F5C0 /*_PostMessageQueueStrictly*/ \n"
113 " B loc_FFD0C994 \n"
114 );
115 }
116
117
118
119 void __attribute__((naked,noinline)) sub_FFD0C488_my() {
120 asm volatile (
121 " STMFD SP!, {R4-R8,LR} \n"
122 " SUB SP, SP, #0x40 \n"
123 " MOV R6, #0 \n"
124 " LDR R5, =0x5468 \n"
125 " MOV R4, R0 \n"
126 " STR R6, [SP, #0x30] \n"
127 " STR R6, [SP, #0x28] \n"
128 " LDR R0, [R5, #0x38] \n"
129 " MOV R8, #4 \n"
130 " CMP R0, #3 \n"
131 " STREQ R8, [R5, #0x38] \n"
132 " LDR R0, [R5, #0xA8] \n"
133 " BLX R0 \n"
134 " LDR R0, [R5, #0x38] \n"
135 " CMP R0, #4 \n"
136 " BNE loc_FFD0C560 \n"
137 " ADD R3, SP, #0x28 \n"
138 " ADD R2, SP, #0x2C \n"
139 " ADD R1, SP, #0x30 \n"
140 " ADD R0, SP, #0x34 \n"
141 " BL sub_FFDF8E84 \n"
142 " CMP R0, #0 \n"
143 " MOV R7, #1 \n"
144 " BNE loc_FFD0C504 \n"
145 " LDR R1, [R5, #0x28] \n"
146 " CMP R1, #1 \n"
147 " BNE loc_FFD0C568 \n"
148 " LDR R1, [R5, #0x60] \n"
149 " LDR R2, [R5, #0x3C] \n"
150 " CMP R1, R2 \n"
151 " BCC loc_FFD0C568 \n"
152
153 "loc_FFD0C504:\n"
154 " CMP R0, #0x80000001 \n"
155 " STREQ R8, [R5, #0x64] \n"
156 " BEQ loc_FFD0C53C \n"
157 " CMP R0, #0x80000003 \n"
158 " STREQ R7, [R5, #0x64] \n"
159 " BEQ loc_FFD0C53C \n"
160 " CMP R0, #0x80000005 \n"
161 " MOVEQ R0, #2 \n"
162 " BEQ loc_FFD0C538 \n"
163 " CMP R0, #0x80000007 \n"
164 " STRNE R6, [R5, #0x64] \n"
165 " BNE loc_FFD0C53C \n"
166 " MOV R0, #3 \n"
167
168 "loc_FFD0C538:\n"
169 " STR R0, [R5, #0x64] \n"
170
171 "loc_FFD0C53C:\n"
172 " LDR R0, =0x6EBC0 \n"
173 " LDR R0, [R0, #8] \n"
174 " CMP R0, #0 \n"
175 " BEQ loc_FFD0C554 \n"
176 " BL sub_FFC445C4 \n"
177 " B loc_FFD0C558 \n"
178
179 "loc_FFD0C554:\n"
180 " BL sub_FFD0BFC0 \n"
181
182 "loc_FFD0C558:\n"
183 " MOV R0, #5 \n"
184 " STR R0, [R5, #0x38] \n"
185
186 "loc_FFD0C560:\n"
187 " ADD SP, SP, #0x40 \n"
188 " LDMFD SP!, {R4-R8,PC} \n"
189
190 "loc_FFD0C568:\n"
191 " LDR LR, [SP, #0x30] \n"
192 " CMP LR, #0 \n"
193 " BEQ loc_FFD0C630 \n"
194 " STR R7, [R5, #0x2C] \n"
195 " LDR R0, [R5, #0x7C] \n"
196 " LDR R1, [R4, #0x14] \n"
197 " LDR R2, [R4, #0x18] \n"
198 " LDR R12, [R4, #0xC] \n"
199 " ADD R3, SP, #0x38 \n"
200 " ADD R8, SP, #0x14 \n"
201 " STMIA R8, {R0-R3} \n"
202 " LDR R3, [R5, #0x68] \n"
203 " ADD R2, SP, #0x3C \n"
204 " ADD R8, SP, #8 \n"
205 " LDRD R0, [SP, #0x28] \n"
206 " STMIA R8, {R0,R2,R3} \n"
207 " STR R1, [SP, #4] \n"
208 " STR LR, [SP] \n"
209 " LDMIB R4, {R0,R1} \n"
210 " LDR R3, [SP, #0x34] \n"
211 " MOV R2, R12 \n"
212 " BL sub_FFDCE504 \n"
213 " LDR R0, [R5, #0x10] \n"
214 " LDR R1, [R5, #0x58] \n"
215 " BL _TakeSemaphore \n"
216 " CMP R0, #9 \n"
217 " BNE loc_FFD0C5E4 \n"
218 " BL sub_FFDF9470 \n"
219 " MOV R0, #0x90000 \n"
220 " STR R7, [R5, #0x38] \n"
221 " B loc_FFD0C5FC \n"
222
223 "loc_FFD0C5E4:\n"
224 " LDR R0, [SP, #0x38] \n"
225 " CMP R0, #0 \n"
226 " BEQ loc_FFD0C604 \n"
227 " BL sub_FFDF9470 \n"
228 " MOV R0, #0xA0000 \n"
229 " STR R7, [R5, #0x38] \n"
230
231 "loc_FFD0C5FC:\n"
232 " BL sub_FFC6D0E0 /*_HardwareDefect_FW*/ \n"
233 " B loc_FFD0C560 \n"
234
235 "loc_FFD0C604:\n"
236 " BL sub_FFDCE5C8 \n"
237 " LDR R0, [SP, #0x34] \n"
238 " LDR R1, [SP, #0x3C] \n"
239 " BL sub_FFDF9218 \n"
240 " LDR R0, [R5, #0x5C] \n"
241 " LDR R1, =0x54E4 \n"
242 " ADD R0, R0, #1 \n"
243 " STR R0, [R5, #0x5C] \n"
244 " LDR R0, [SP, #0x3C] \n"
245 " MOV R2, #0 \n"
246 " BL sub_FFDF703C_my \n"
247
248 "loc_FFD0C630:\n"
249 " LDR R0, [R5, #0x60] \n"
250 " ADD R0, R0, #1 \n"
251 " STR R0, [R5, #0x60] \n"
252 " LDR R1, [R5, #0x4C] \n"
253 " MUL R0, R1, R0 \n"
254 " LDR R1, [R5, #0x48] \n"
255 " BL sub_FFE8291C /*__divmod_unsigned_int*/ \n"
256 " MOV R4, R0 \n"
257 " BL sub_FFDF94A8 \n"
258 " LDR R1, [R5, #0x80] \n"
259 " CMP R1, R4 \n"
260 " BNE loc_FFD0C66C \n"
261 " LDR R0, [R5, #0x30] \n"
262 " CMP R0, #1 \n"
263 " BNE loc_FFD0C680 \n"
264
265 "loc_FFD0C66C:\n"
266 " LDR R1, [R5, #0x8C] \n"
267 " MOV R0, R4 \n"
268 " BLX R1 \n"
269 " STR R4, [R5, #0x80] \n"
270 " STR R6, [R5, #0x30] \n"
271
272 "loc_FFD0C680:\n"
273 " STR R6, [R5, #0x2C] \n"
274 " B loc_FFD0C560 \n"
275 " BX LR \n"
276 );
277 }
278
279
280
281 void __attribute__((naked,noinline)) sub_FFDF703C_my() {
282 asm volatile (
283 " STMFD SP!, {R4-R8,LR} \n"
284 " LDR R4, =0x8940 \n"
285 " LDR LR, [R4] \n"
286 " LDR R2, [R4, #8] \n"
287 " CMP LR, #0 \n"
288 " LDRNE R3, [R4, #0xC] \n"
289 " MOV R5, R2 \n"
290 " CMPNE R3, #1 \n"
291 " MOVEQ R2, #0 \n"
292 " STREQ R0, [R4] \n"
293 " STREQ R2, [R4, #0xC] \n"
294 " BEQ loc_FFDF7108 \n"
295 " LDR R3, [R4, #4] \n"
296
297 " LDR R7, =table\n"
298 " ADD R12, R3, R3, LSL#1 \n"
299 " LDR R3, [R7, R12, LSL#2] \n"
300 " ADD R6, R7, #0x30 \n"
301 " LDR R8, [R6, R12, LSL#2] \n"
302 " SUB R3, LR, R3 \n"
303 " CMP R3, #0 \n"
304 " SUB LR, LR, R8 \n"
305 " BLE loc_FFDF70C4 \n"
306 " ADD R12, R7, R12, LSL#2 \n"
307 " LDR LR, [R12, #4] \n"
308 " CMP LR, R3 \n"
309 " ADDGE R2, R2, #1 \n"
310 " BGE loc_FFDF70B8 \n"
311 " LDR R12, [R12, #8] \n"
312 " CMP R12, R3 \n"
313 " ADDLT R2, R2, #3 \n"
314 " ADDGE R2, R2, #2 \n"
315
316 "loc_FFDF70B8:\n"
317 " CMP R2, #0x1A \n"
318 " MOVGE R2, #0x19 \n"
319 " B loc_FFDF70F8 \n"
320
321 "loc_FFDF70C4:\n"
322 " CMP LR, #0 \n"
323 " BGE loc_FFDF70F8 \n"
324 " ADD R3, R6, R12, LSL#2 \n"
325 " LDR R12, [R3, #4] \n"
326 " CMP R12, LR \n"
327 " SUBLE R2, R2, #1 \n"
328 " BLE loc_FFDF70F0 \n"
329 " LDR R3, [R3, #8] \n"
330 " CMP R3, LR \n"
331 " SUBGT R2, R2, #3 \n"
332 " SUBLE R2, R2, #2 \n"
333
334 "loc_FFDF70F0:\n"
335 " CMP R2, #0 \n"
336 " MOVLT R2, #0 \n"
337
338 "loc_FFDF70F8:\n"
339 " CMP R2, R5 \n"
340 " STRNE R2, [R4, #8] \n"
341 " MOVNE R2, #1 \n"
342 " STRNE R2, [R4, #0xC] \n"
343
344 "loc_FFDF7108:\n"
345
346 " LDR R2, =CompressionRateTable\n"
347 " LDR R3, [R4, #8] \n"
348 " LDR R2, [R2, R3, LSL#2] \n"
349
350 " LDR R3, =video_mode\n"
351 " LDR R3, [R3]\n"
352 " LDR R3, [R3]\n"
353 " CMP R3, #1\n"
354 " LDREQ R3, =video_quality\n"
355 " LDREQ R3, [R3]\n"
356 " LDREQ R2, [R3]\n"
357
358 " STR R2, [R1] \n"
359 " STR R0, [R4] \n"
360 " BL mute_on_zoom\n"
361 " LDMFD SP!, {R4-R8,PC} \n"
362 );
363 }