root/platform/a2000/sub/100c/movie_rec.c

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DEFINITIONS

This source file includes following definitions.
  1. change_video_tables
  2. movie_record_task
  3. sub_FFC476B0_my
  4. sub_FFD05EA4_my

   1 #include "conf.h"
   2 
   3 #include "lolevel.h"
   4 #include "platform.h"
   5 #include "core.h"
   6 
   7 int *video_quality = &conf.video_quality;
   8 int *video_mode    = &conf.video_mode;
   9 
  10 long def_table[24]={0x2000, 0x38D, 0x788, 0x5800, 0x9C5, 0x14B8, 0x10000, 0x1C6A, 0x3C45, 0x8000, 0xE35, 0x1E23,
  11            0x1CCD, -0x2E1, -0x579, 0x4F33, -0x7EB, -0xF0C, 0xE666, -0x170A, -0x2BC6, 0x7333, -0xB85, -0x15E3};
  12 long table[24];
  13 
  14 void change_video_tables(int a, int b){
  15  int i;
  16  for (i=0;i<24;i++) table[i]=(def_table[i]*a)/b; 
  17 }
  18 
  19 long CompressionRateTable[]={0x60, 0x5D, 0x5A, 0x57, 0x54, 0x51, 0x4D, 0x48, 0x42, 0x3B, 0x32, 0x29, 0x22, 0x1D, 0x17, 0x14, 0x10, 0xE, 0xB, 9, 7, 6, 5, 4, 3, 2, 1};
  20 
  21 void __attribute((naked,noinline)) movie_record_task() {
  22      asm volatile (
  23 "                 STMFD   SP!, {R2-R8,LR}\n"
  24 "                 LDR     R8, =0x332\n"
  25 "                 LDR     R7, =0x2710\n"
  26 "                 LDR     R4, =0x5048\n"
  27 "                 MOV     R6, #0\n"
  28 "                 MOV     R5, #1\n"
  29 " loc_FFC47BCC:\n"
  30 "                 LDR     R0, [R4,#0x18]\n"
  31 "                 MOV     R2, #0\n"
  32 "                 ADD     R1, SP, #0x20-0x1C\n"
  33 "                 BL      sub_FFC1693C\n"               // _sub_FFC1693C__KerQueue_c__0
  34 "                 LDR     R0, [R4,#0x20]\n"
  35 "                 CMP     R0, #0\n"
  36 "                 BNE     loc_FFC47C9C\n"
  37 "                 LDR     R0, [SP,#0x20-0x1C]\n"
  38 "                 LDR     R1, [R0]\n"
  39 "                 SUB     R1, R1, #2\n"
  40 "                 CMP     R1, #9\n"
  41 "                 ADDLS   PC, PC, R1,LSL#2\n"
  42 "                 B       loc_FFC47C9C\n"
  43 " loc_FFC47C00:\n"
  44 "                 B       loc_FFC47C50\n"
  45 " loc_FFC47C04:\n"
  46 "                 B       loc_FFC47C70\n"
  47 " loc_FFC47C08:\n"
  48 "                 B       loc_FFC47C80\n"
  49 " loc_FFC47C0C:\n"
  50 "                 B       loc_FFC47C88\n"
  51 " loc_FFC47C10:\n"
  52 "                 B       loc_FFC47C58\n"
  53 " loc_FFC47C14:\n"
  54 "                 B       loc_FFC47C90\n"
  55 " loc_FFC47C18:\n"
  56 "                 B       loc_FFC47C60\n"
  57 " loc_FFC47C1C:\n"
  58 "                 B       loc_FFC47C9C\n"
  59 " loc_FFC47C20:\n"
  60 "                 B       loc_FFC47C98\n"
  61 " loc_FFC47C24:\n"
  62 "                 B       loc_FFC47C28\n"
  63 " loc_FFC47C28:\n"
  64 "                 STR     R6, [R4,#0x34]\n"
  65 "                 LDR     R0, =0xFFC478B0\n"            // nullsub_256
  66 "                 LDR     R2, =0xFFC47248\n"
  67 "                 LDR     R1, =0x18938\n"
  68 "                 STR     R0, [R4,#0xA0]\n"
  69 "                 LDR     R0, =0xFFC4732C\n"
  70 "                 STR     R6, [R4,#0x24]\n"
  71 "                 BL      sub_FFCA1A64\n"
  72 "                 STR     R5, [R4,#0x38]\n"
  73 "                 B       loc_FFC47C9C\n"
  74 " loc_FFC47C50:\n"
  75 "                 BL      unlock_optical_zoom\n"  // --> Inserted code
  76 "                 BL      sub_FFC479A8\n"               // _sub_FFC479A8__MovieRecorder_c__964
  77 "                 B       loc_FFC47C9C\n"
  78 " loc_FFC47C58:\n"
  79 "                 BL      sub_FFC476B0_my\n" // --> Chnaged
  80 "                 B       loc_FFC47C9C\n"
  81 " loc_FFC47C60:\n"
  82 "                 LDR     R1, [R0,#0x10]\n"
  83 "                 LDR     R0, [R0,#4]\n"
  84 "                 BL      sub_FFD07B14\n"               // _sub_FFD07B14__AviWriter_c__0 
  85 "                 B       loc_FFC47C9C\n"
  86 " loc_FFC47C70:\n"
  87 "                 LDR     R0, [R4,#0x38]\n"
  88 "                 CMP     R0, #5\n"
  89 "                 STRNE   R5, [R4,#0x28]\n"
  90 "                 B       loc_FFC47C9C\n"
  91 " loc_FFC47C80:\n"
  92 "                 BL      sub_FFC474BC\n"               // _sub_FFC474BC__MovieRecorder_c__1000
  93 "                 B       loc_FFC47C9C\n"
  94 " loc_FFC47C88:\n"
  95 "                 BL      sub_FFC47378\n"
  96 "                 B       loc_FFC47C9C\n"
  97 " loc_FFC47C90:\n"
  98 "                 BL      sub_FFC471D4\n"               // _sub_FFC471D4__MovieRecorder_c__100
  99 "                 B       loc_FFC47C9C\n"
 100 " loc_FFC47C98:\n"
 101 "                 BL      sub_FFC47E04\n"               // _sub_FFC47E04__MovieRecorder_c__100
 102 " loc_FFC47C9C:\n"
 103 "                 LDR     R1, [SP,#0x20-0x1C]\n"
 104 "                 LDR     R3, =0xFFC47034\n"            // "MovieRecorder.c"
 105 "                 STR     R6, [R1]\n"
 106 "                 STR     R8, [SP,#0x20-0x20]\n"
 107 "                 LDR     R0, [R4,#0x1C]\n"
 108 "                 MOV     R2, R7\n"
 109 "                 BL      sub_FFC0BCD8\n"
 110 "                 B       loc_FFC47BCC\n"
 111 );
 112 }
 113 
 114 void __attribute((naked,noinline)) sub_FFC476B0_my() {
 115      asm volatile (
 116 "                 STMFD   SP!, {R4-R8,LR}\n"
 117 "                 SUB     SP, SP, #0x40\n"
 118 "                 MOV     R6, #0\n"
 119 "                 LDR     R5, =0x5048\n"
 120 "                 MOV     R4, R0\n"
 121 "                 STR     R6, [SP,#0x58-0x28]\n"
 122 "                 STR     R6, [SP,#0x58-0x30]\n"
 123 "                 LDR     R0, [R5,#0x38]\n"
 124 "                 MOV     R8, #4\n"
 125 "                 CMP     R0, #3\n"
 126 "                 STREQ   R8, [R5,#0x38]\n"
 127 "                 LDR     R0, [R5,#0xA0]\n"
 128 
 129 //"                                                             BLX             R0\n"                   // !! Workaround !!
 130 "                                                                       MOV             LR, PC\n"                       // gcc won't compile "BLX       R0" nor "BL     R0".
 131 "                                                                       MOV             PC, R0\n"                       // workaround: make your own "BL" and hope we don't need the change to thumb-mode
 132 
 133 "                 LDR     R0, [R5,#0x38]\n"
 134 "                 CMP     R0, #4\n"
 135 "                 BNE     loc_FFC47788\n"
 136 "                 ADD     R3, SP, #0x58-0x30\n"
 137 "                 ADD     R2, SP, #0x58-0x30+4\n"
 138 "                 ADD     R1, SP, #0x58-0x28\n"
 139 "                 ADD     R0, SP, #0x58-0x24\n"
 140 "                 BL      sub_FFD07CA8\n"
 141 "                 CMP     R0, #0\n"
 142 "                 MOV     R7, #1\n"
 143 "                 BNE     loc_FFC4772C\n"
 144 "                 LDR     R1, [R5,#0x28]\n"
 145 "                 CMP     R1, #1\n"
 146 "                 BNE     loc_FFC47790\n"
 147 "                 LDR     R1, [R5,#0x50]\n"
 148 "                 LDR     R2, [R5,#0x3C]\n"
 149 "                 CMP     R1, R2\n"
 150 "                 BCC     loc_FFC47790\n"
 151 " loc_FFC4772C:\n"
 152 "                 CMP     R0, #0x80000001\n"
 153 "                 STREQ   R8, [R5,#0x54]\n"
 154 "                 BEQ     loc_FFC47764\n"
 155 "                 CMP     R0, #0x80000003\n"
 156 "                 STREQ   R7, [R5,#0x54]\n"
 157 "                 BEQ     loc_FFC47764\n"
 158 "                 CMP     R0, #0x80000005\n"
 159 "                 MOVEQ   R0, #2\n"
 160 "                 BEQ     loc_FFC47760\n"
 161 "                 CMP     R0, #0x80000007\n"
 162 "                 STRNE   R6, [R5,#0x54]\n"
 163 "                 BNE     loc_FFC47764\n"
 164 "                 MOV     R0, #3\n"
 165 " loc_FFC47760:\n"
 166 "                 STR     R0, [R5,#0x54]\n"
 167 " loc_FFC47764:\n"
 168 "                 LDR     R0, =0x18968\n"
 169 "                 LDR     R0, [R0,#8]\n"
 170 "                 CMP     R0, #0\n"
 171 "                 BEQ     loc_FFC4777C\n"
 172 "                 BL      sub_FFC323F8\n"
 173 "                 B       loc_FFC47780\n"
 174 " loc_FFC4777C:\n"
 175 "                 BL      sub_FFC471D4\n"               // _sub_FFC471D4__MovieRecorder_c__100
 176 " loc_FFC47780:\n"
 177 "                 MOV     R0, #5\n"
 178 "                 STR     R0, [R5,#0x38]\n"
 179 " loc_FFC47788:\n"
 180 "                 ADD     SP, SP, #0x40\n"
 181 "                 LDMFD   SP!, {R4-R8,PC}\n"
 182 " loc_FFC47790:\n"
 183 "                 LDR     LR, [SP,#0x58-0x28]\n"
 184 "                 CMP     LR, #0\n"
 185 "                 BEQ     loc_FFC47858\n"
 186 "                 STR     R7, [R5,#0x2C]\n"
 187 "                 LDR     R0, [R5,#0x6C]\n"
 188 "                 LDR     R1, [R4,#0x14]\n"
 189 "                 LDR     R2, [R4,#0x18]\n"
 190 "                 LDR     R12, [R4,#0xC]\n"
 191 "                 ADD     R3, SP, #0x58-0x20\n"
 192 "                 ADD     R8, SP, #0x58-0x44\n"
 193 "                 STMIA   R8, {R0-R3}\n"
 194 "                 LDR     R3, [R5,#0x58]\n"
 195 "                 ADD     R2, SP, #0x58-0x1C\n"
 196 "                 ADD     R8, SP, #0x58-0x50\n"
 197 //"               LDRD    R0, [SP,#0x58-0x30]\n"        // Workaround, selected processor does not support `ldrd R0,[SP,#0x58-0x30]'
 198 "                                                                       .long   0xE1CD02D8\n"                                           // binary representation of instruction above
 199 "                 STMIA   R8, {R0,R2,R3}\n"
 200 "                 STR     R1, [SP,#0x58-0x54]\n"
 201 "                 STR     LR, [SP,#0x58-0x58]\n"
 202 "                 LDMIB   R4, {R0,R1}\n"
 203 "                 LDR     R3, [SP,#0x58-0x24]\n"
 204 "                 MOV     R2, R12\n"
 205 "                 BL      sub_FFCCDF08\n"
 206 "                 LDR     R0, [R5,#0x10]\n"
 207 "                 MOV     R1, #0x3E8\n"
 208 "                 BL      sub_FFC0B74C\n"               // eventproc_export_TakeSemaphore
 209 "                 CMP     R0, #9\n"
 210 "                 BNE     loc_FFC4780C\n"
 211 "                 BL      sub_FFD08284\n"
 212 "                 MOV     R0, #0x90000\n"
 213 "                 STR     R7, [R5,#0x38]\n"
 214 "                 B       loc_FFC47824\n"
 215 " loc_FFC4780C:\n"
 216 "                 LDR     R0, [SP,#0x58-0x20]\n"
 217 "                 CMP     R0, #0\n"
 218 "                 BEQ     loc_FFC4782C\n"
 219 "                 BL      sub_FFD08284\n"
 220 "                 MOV     R0, #0xA0000\n"
 221 "                 STR     R7, [R5,#0x38]\n"
 222 " loc_FFC47824:\n"
 223 "                 BL      sub_FFC5CC4C\n"               // eventproc_export_HardwareDefect
 224 "                 B       loc_FFC47788\n"
 225 " loc_FFC4782C:\n"
 226 "                 BL      sub_FFCCDFCC\n"
 227 "                 LDR     R0, [SP,#0x58-0x24]\n"
 228 "                 LDR     R1, [SP,#0x58-0x1C]\n"
 229 "                 BL      sub_FFD0802C\n"               // _sub_FFD0802C__AviWriter_c__0
 230 "                 LDR     R0, [R5,#0x4C]\n"
 231 "                 LDR     R1, =0x50B4\n"
 232 "                 ADD     R0, R0, #1\n"
 233 "                 STR     R0, [R5,#0x4C]\n"
 234 "                 LDR     R0, [SP,#0x58-0x1C]\n"
 235 "                 MOV     R2, #0\n"
 236 "                 BL      sub_FFD05EA4_my\n"    // --> Changed
 237 " loc_FFC47858:\n"
 238 "                 LDR     R0, [R5,#0x50]\n"
 239 "                 ADD     R0, R0, #1\n"
 240 "                 STR     R0, [R5,#0x50]\n"
 241 "                 LDR     R1, [R5,#0x78]\n"
 242 "                 MUL     R0, R1, R0\n"
 243 "                 LDR     R1, [R5,#0x74]\n"
 244 "                 BL      sub_FFE73C80\n"
 245 "                 MOV     R4, R0\n"
 246 "                 BL      sub_FFD082BC\n"
 247 "                 LDR     R1, [R5,#0x70]\n"
 248 "                 CMP     R1, R4\n"
 249 "                 BNE     loc_FFC47894\n"
 250 "                 LDR     R0, [R5,#0x30]\n"
 251 "                 CMP     R0, #1\n"
 252 "                 BNE     loc_FFC478A8\n"
 253 " loc_FFC47894:\n"
 254 "                 LDR     R1, [R5,#0x84]\n"
 255 "                 MOV     R0, R4\n"
 256 
 257 //"                                     BLX     R1\n"
 258 "                                                                       .long   0xE12FFF31\n"
 259 
 260 "                 STR     R4, [R5,#0x70]\n"
 261 "                 STR     R6, [R5,#0x30]\n"
 262 " loc_FFC478A8:\n"
 263 "                 STR     R6, [R5,#0x2C]\n"
 264 "                 B       loc_FFC47788\n"
 265 );
 266 }
 267 
 268 
 269 void __attribute((naked,noinline)) sub_FFD05EA4_my() {
 270      asm volatile (
 271 "                 STMFD   SP!, {R4-R8,LR}\n"
 272 "                 LDR     R4, =0x8090\n"
 273 "                 LDR     LR, [R4]\n"
 274 "                 LDR     R2, [R4,#8]\n"
 275 "                 CMP     LR, #0\n"
 276 "                 LDRNE   R3, [R4,#0xC]\n"
 277 "                 MOV     R5, R2\n"
 278 "                 CMPNE   R3, #1\n"
 279 "                 MOVEQ   R2, #0\n"
 280 "                 STREQ   R0, [R4]\n"
 281 "                 STREQ   R2, [R4,#0xC]\n"
 282 "                 BEQ     loc_FFD05F70\n"
 283 "                 LDR     R3, [R4,#4]\n"
 284 "                 LDR     R7, =table\n"                                 // --> changed
 285 "                 ADD     R12, R3, R3,LSL#1\n"
 286 "                 LDR     R3, [R7,R12,LSL#2]\n"
 287 "                 ADD     R6, R7, #0x30\n"
 288 "                 LDR     R8, [R6,R12,LSL#2]\n"
 289 "                 SUB     R3, LR, R3\n"
 290 "                 CMP     R3, #0\n"
 291 "                 SUB     LR, LR, R8\n"
 292 "                 BLE     loc_FFD05F2C\n"
 293 "                 ADD     R12, R7, R12,LSL#2\n"
 294 "                 LDR     LR, [R12,#4]\n"
 295 "                 CMP     LR, R3\n"
 296 "                 ADDGE   R2, R2, #1\n"
 297 "                 BGE     loc_FFD05F20\n"
 298 "                 LDR     R12, [R12,#8]\n"
 299 "                 CMP     R12, R3\n"
 300 "                 ADDLT   R2, R2, #3\n"
 301 "                 ADDGE   R2, R2, #2\n"
 302 " loc_FFD05F20:\n"
 303 //"                 CMP     R2, #0x17\n"
 304 //"                 MOVGE   R2, #0x16\n"
 305 "                                                                       CMP     R2, #0x1A\n"   // ---------> changed
 306 "                                                                       MOVGE   R2, #0x19\n"   // ---------> changed
 307 "                 B       loc_FFD05F60\n"
 308 " loc_FFD05F2C:\n"
 309 "                 CMP     LR, #0\n"
 310 "                 BGE     loc_FFD05F60\n"
 311 "                 ADD     R3, R6, R12,LSL#2\n"
 312 "                 LDR     R12, [R3,#4]\n"
 313 "                 CMP     R12, LR\n"
 314 "                 SUBLE   R2, R2, #1\n"
 315 "                 BLE     loc_FFD05F58\n"
 316 "                 LDR     R3, [R3,#8]\n"
 317 "                 CMP     R3, LR\n"
 318 "                 SUBGT   R2, R2, #3\n"
 319 "                 SUBLE   R2, R2, #2\n"
 320 " loc_FFD05F58:\n"
 321 "                 CMP     R2, #0\n"
 322 "                 MOVLT   R2, #0\n"
 323 " loc_FFD05F60:\n"
 324 "                 CMP     R2, R5\n"
 325 "                 STRNE   R2, [R4,#8]\n"
 326 "                 MOVNE   R2, #1\n"
 327 "                 STRNE   R2, [R4,#0xC]\n"
 328 " loc_FFD05F70:\n"
 329 "                 LDR     R2, =CompressionRateTable\n"
 330 "                 LDR     R3, [R4,#8]\n"
 331 "                 LDR     R2, [R2,R3,LSL#2]\n"
 332 "                 LDR     R3, =video_mode\n"      // +
 333 "                 LDR     R3, [R3]\n"             // +
 334 "                 LDR     R3, [R3]\n"             // +
 335 "                 CMP     R3, #1\n"               // +
 336 "                 LDREQ   R3, =video_quality\n"   // +     
 337 "                 LDREQ   R3, [R3]\n"             // +     
 338 "                 LDREQ   R2, [R3]\n"             // +     
 339 "                 STR     R2, [R1]\n"
 340 "                 STR     R0, [R4]\n"
 341 "                 BL      mute_on_zoom\n"     // +
 342 "                 LDMFD   SP!, {R4-R8,PC}\n"
 343 );
 344 }

/* [<][>][^][v][top][bottom][index][help] */