root/platform/sx240hs/sub/100c/movie_rec.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. change_video_tables
  2. set_quality
  3. movie_record_task
  4. sub_FF1B78D0_my
  5. sub_FF34D848_my

   1 /*
   2  * movie_rec.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "conf.h"
   5 
   6 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
   7 
   8 void  set_quality(int *x){ // -17 highest; +12 lowest
   9  if (conf.video_mode) *x=12-((conf.video_quality-1)*(12+17)/(99-1));
  10 }
  11 
  12 /*************************************************************/
  13 //** movie_record_task @ 0xFF1B8350 - 0xFF1B84C8, length=95
  14 void __attribute__((naked,noinline)) movie_record_task() {
  15 asm volatile (
  16 "    STMFD   SP!, {R2-R10,LR} \n"
  17 "    LDR     R6, =0xFF1B6FD8 \n"
  18 "    LDR     R7, =0xFF1B7D44 \n"
  19 "    LDR     R4, =0xAB38 \n"
  20 "    LDR     R9, =0x69B \n"
  21 "    LDR     R10, =0x2710 \n"
  22 "    MOV     R8, #1 \n"
  23 "    MOV     R5, #0 \n"
  24 
  25 "loc_FF1B8370:\n"
  26 "    LDR     R0, [R4, #0x24] \n"
  27 "    MOV     R2, #0 \n"
  28 "    ADD     R1, SP, #4 \n"
  29 "    BL      sub_0068BBE4 /*_ReceiveMessageQueue*/ \n"
  30 "    LDR     R0, [R4, #0x2C] \n"
  31 "    CMP     R0, #0 \n"
  32 "    LDRNE   R0, [R4, #0xC] \n"
  33 "    CMPNE   R0, #2 \n"
  34 "    LDRNE   R0, [R4, #0x44] \n"
  35 "    CMPNE   R0, #6 \n"
  36 "    BNE     loc_FF1B84AC \n"
  37 "    LDR     R0, [SP, #4] \n"
  38 "    LDR     R1, [R0] \n"
  39 "    SUB     R1, R1, #2 \n"
  40 "    CMP     R1, #0xD \n"
  41 "    ADDCC   PC, PC, R1, LSL#2 \n"
  42 "    B       loc_FF1B84AC \n"
  43 "    B       loc_FF1B844C \n"
  44 "    B       loc_FF1B8470 \n"
  45 "    B       loc_FF1B8480 \n"
  46 "    B       loc_FF1B8488 \n"
  47 "    B       loc_FF1B8490 \n"
  48 "    B       loc_FF1B8498 \n"
  49 "    B       loc_FF1B8454 \n"
  50 "    B       loc_FF1B84A0 \n"
  51 "    B       loc_FF1B8460 \n"
  52 "    B       loc_FF1B84AC \n"
  53 "    B       loc_FF1B84A8 \n"
  54 "    B       loc_FF1B8418 \n"
  55 "    B       loc_FF1B83E8 \n"
  56 
  57 "loc_FF1B83E8:\n"
  58 "    STR     R5, [R4, #0x40] \n"
  59 "    STR     R5, [R4, #0x30] \n"
  60 "    STR     R5, [R4, #0x34] \n"
  61 "    STRH    R5, [R4, #6] \n"
  62 "    STR     R6, [R4, #0xD4] \n"
  63 "    STR     R7, [R4, #0xF0] \n"
  64 "    LDR     R0, [R4, #0xC] \n"
  65 "    ADD     R0, R0, #1 \n"
  66 "    STR     R0, [R4, #0xC] \n"
  67 "    MOV     R0, #6 \n"
  68 "    STR     R0, [R4, #0x44] \n"
  69 "    B       loc_FF1B8438 \n"
  70 
  71 "loc_FF1B8418:\n"
  72 "    STR     R5, [R4, #0x40] \n"
  73 "    STR     R5, [R4, #0x30] \n"
  74 "    STR     R6, [R4, #0xD4] \n"
  75 "    STR     R7, [R4, #0xF0] \n"
  76 "    LDR     R0, [R4, #0xC] \n"
  77 "    ADD     R0, R0, #1 \n"
  78 "    STR     R0, [R4, #0xC] \n"
  79 "    STR     R8, [R4, #0x44] \n"
  80 
  81 "loc_FF1B8438:\n"
  82 "    LDR     R2, =0xFF1B64B0 \n"
  83 "    LDR     R1, =0xD368C \n"
  84 "    LDR     R0, =0xFF1B65C4 \n"
  85 "    BL      sub_FF03EF7C \n"
  86 "    B       loc_FF1B84AC \n"
  87 
  88 "loc_FF1B844C:\n"
  89 );
  90 if (conf.ext_video_time == 1)
  91 {
  92 asm volatile (
  93 "    BL      sub_FF1B78D0_my \n"  // --> Patched. Old value = 0xFF1B78D0.
  94 );
  95 }
  96 else
  97 {
  98 asm volatile (
  99 "    BL      sub_FF1B78D0 \n"
 100 );
 101 }
 102 asm volatile (
 103 "    B       loc_FF1B84AC \n"
 104 
 105 "loc_FF1B8454:\n"
 106 "    LDR     R1, [R4, #0xF0] \n"
 107 "    BLX     R1 \n"
 108 //begin patch
 109 "    LDR     R0, =video_compression_rate\n" //added
 110 "    BL      set_quality\n"                 //added
 111 //end patch
 112 "    B       loc_FF1B84AC \n"
 113 
 114 "loc_FF1B8460:\n"
 115 "    LDR     R1, [R0, #0x18] \n"
 116 "    LDR     R0, [R0, #4] \n"
 117 "    BL      sub_FF34F104 \n"
 118 "    B       loc_FF1B84AC \n"
 119 
 120 "loc_FF1B8470:\n"
 121 "    LDR     R0, [R4, #0x44] \n"
 122 "    CMP     R0, #5 \n"
 123 "    STRNE   R8, [R4, #0x34] \n"
 124 "    B       loc_FF1B84AC \n"
 125 
 126 "loc_FF1B8480:\n"
 127 "    BL      sub_FF1B6C40 \n"
 128 "    B       loc_FF1B84AC \n"
 129 
 130 "loc_FF1B8488:\n"
 131 "    BL      sub_FF1B6924 \n"
 132 "    B       loc_FF1B84AC \n"
 133 
 134 "loc_FF1B8490:\n"
 135 "    BL      sub_FF1B6628 \n"
 136 "    B       loc_FF1B84AC \n"
 137 
 138 "loc_FF1B8498:\n"
 139 "    BL      sub_FF1B61D8 \n"
 140 "    B       loc_FF1B84AC \n"
 141 
 142 "loc_FF1B84A0:\n"
 143 "    BL      sub_FF1B6158 \n"
 144 "    B       loc_FF1B84AC \n"
 145 
 146 "loc_FF1B84A8:\n"
 147 "    BL      sub_FF1B8A84 \n"
 148 
 149 "loc_FF1B84AC:\n"
 150 "    LDR     R1, [SP, #4] \n"
 151 "    LDR     R3, =0xFF1B5DF0 /*'MovieRecorder.c'*/ \n"
 152 "    STR     R5, [R1] \n"
 153 "    STR     R9, [SP] \n"
 154 "    LDR     R0, [R4, #0x28] \n"
 155 "    MOV     R2, R10 \n"
 156 "    BL      sub_0068AF18 /*_PostMessageQueueStrictly*/ \n"
 157 "    B       loc_FF1B8370 \n"
 158 );
 159 }
 160 
 161 /*************************************************************/
 162 //** sub_FF1B78D0_my @ 0xFF1B78D0 - 0xFF1B7C08, length=207
 163 void __attribute__((naked,noinline)) sub_FF1B78D0_my() {
 164 asm volatile (
 165 "    STMFD   SP!, {R0-R10,LR} \n"
 166 "    LDR     R6, =0xAB38 \n"
 167 "    MOV     R0, #0 \n"
 168 "    STR     R0, [R6, #0x34] \n"
 169 "    STR     R0, [R6, #0x38] \n"
 170 "    MOV     R0, R6 \n"
 171 "    LDR     R4, [R0, #0x58] \n"
 172 "    LDRH    R1, [R6, #6] \n"
 173 "    MOV     R0, #0x3E8 \n"
 174 "    MUL     R0, R4, R0 \n"
 175 "    LDR     R8, =0xFFF00 \n"
 176 "    CMP     R1, #0 \n"
 177 "    MOV     R2, #1 \n"
 178 "    BNE     loc_FF1B7918 \n"
 179 "    LDR     R1, [R6, #0x90] \n"
 180 "    CMP     R1, #0 \n"
 181 "    BNE     loc_FF1B7928 \n"
 182 "    B       loc_FF1B7920 \n"
 183 
 184 "loc_FF1B7918:\n"
 185 "    CMP     R1, #3 \n"
 186 "    BNE     loc_FF1B7928 \n"
 187 
 188 "loc_FF1B7920:\n"
 189 "    STR     R2, [R6, #0x48] \n"
 190 "    B       loc_FF1B7934 \n"
 191 
 192 "loc_FF1B7928:\n"
 193 "    MOV     R1, #0x3E8 \n"
 194 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 195 "    STR     R0, [R6, #0x48] \n"
 196 
 197 "loc_FF1B7934:\n"
 198 "    LDR     R5, =0xD36C0 \n"
 199 "    MOV     R7, #2 \n"
 200 "    LDR     R0, [R5, #8] \n"
 201 "    CMP     R0, #0 \n"
 202 "    BEQ     loc_FF1B79A0 \n"
 203 "    CMP     R4, #0x18 \n"
 204 "    MOV     R0, #4 \n"
 205 "    BEQ     loc_FF1B798C \n"
 206 "    BGT     loc_FF1B7974 \n"
 207 "    CMP     R4, #0xA \n"
 208 "    CMPNE   R4, #0xF \n"
 209 "    STREQ   R7, [R5, #0x14] \n"
 210 "    BEQ     loc_FF1B79A0 \n"
 211 "    CMP     R4, #0x14 \n"
 212 "    BNE     loc_FF1B7994 \n"
 213 "    B       loc_FF1B798C \n"
 214 
 215 "loc_FF1B7974:\n"
 216 "    CMP     R4, #0x19 \n"
 217 "    CMPNE   R4, #0x1E \n"
 218 "    BEQ     loc_FF1B798C \n"
 219 "    CMP     R4, #0x3C \n"
 220 "    BNE     loc_FF1B7994 \n"
 221 "    MOV     R0, #8 \n"
 222 
 223 "loc_FF1B798C:\n"
 224 "    STR     R0, [R5, #0x14] \n"
 225 "    B       loc_FF1B79A0 \n"
 226 
 227 "loc_FF1B7994:\n"
 228 "    LDR     R0, =0xFF1B5DF0 /*'MovieRecorder.c'*/ \n"
 229 "    MOV     R1, #0x790 \n"
 230 "    BL      _DebugAssert \n"
 231 
 232 "loc_FF1B79A0:\n"
 233 "    LDR     R0, [R6, #0x64] \n"
 234 "    CMP     R0, #1 \n"
 235 "    BNE     loc_FF1B79B8 \n"
 236 "    BL      sub_FF301DAC \n"
 237 "    LDR     R0, =0xD36D8 \n"
 238 "    BL      sub_FF34B1F4 \n"
 239 
 240 "loc_FF1B79B8:\n"
 241 "    LDR     R2, =0xAB3A \n"
 242 "    LDR     R0, [R6, #0xB4] \n"
 243 "    MOV     R3, #2 \n"
 244 "    MOV     R1, #0xAA \n"
 245 "    BL      sub_FF080958 \n"
 246 "    LDR     R2, =0xAB3C \n"
 247 "    LDR     R0, [R6, #0xB4] \n"
 248 "    MOV     R3, #2 \n"
 249 "    MOV     R1, #0xA9 \n"
 250 "    BL      sub_FF080958 \n"
 251 "    LDR     R2, =0xAB88 \n"
 252 "    LDR     R0, [R6, #0xB4] \n"
 253 "    MOV     R3, #4 \n"
 254 "    MOV     R1, #0xA2 \n"
 255 "    BL      sub_FF080958 \n"
 256 "    LDR     R2, =0xAB8C \n"
 257 "    LDR     R0, [R6, #0xB4] \n"
 258 "    MOV     R3, #4 \n"
 259 "    MOV     R1, #0xA3 \n"
 260 "    BL      sub_FF080958 \n"
 261 "    LDR     R0, [R6, #0x90] \n"
 262 "    CMP     R0, #0 \n"
 263 "    LDRNE   R2, =0xAC38 \n"
 264 "    MOVNE   R1, #0 \n"
 265 "    MOVNE   R0, #0xE \n"
 266 "    BLNE    _exmem_ualloc \n"
 267 "    LDR     R0, [R6, #0x4C] \n"
 268 "    LDR     R4, =0xAC38 \n"
 269 "    LDR     R9, =0xD36A8 \n"
 270 "    CMP     R0, #1 \n"
 271 "    CMPNE   R0, #2 \n"
 272 "    BNE     loc_FF1B7AEC \n"
 273 "    LDR     R0, [R6, #0x90] \n"
 274 "    CMP     R0, #0 \n"
 275 "    LDRNE   R0, =0x483FC000 \n"
 276 "    STRNE   R0, [R4] \n"
 277 "    BNE     loc_FF1B7AEC \n"
 278 "    LDR     R1, =0x484B4600 \n"
 279 "    LDR     R0, =0x3A57E00 \n"
 280 "    STR     R1, [R4] \n"
 281 "    STR     R0, [R4, #4] \n"
 282 "    LDMIA   R9, {R0,R2} \n"
 283 "    MUL     R0, R2, R0 \n"
 284 "    MOV     R3, R0, LSL#1 \n"
 285 "    CMP     R3, R8 \n"
 286 "    STR     R3, [R6, #0x9C] \n"
 287 "    MOVCC   R2, #0 \n"
 288 "    STR     R1, [R6, #0xA0] \n"
 289 "    BCC     loc_FF1B7AB4 \n"
 290 "    MOV     R2, #0 \n"
 291 "    STMEA   SP, {R1,R2,R8} \n"
 292 "    MOV     R3, R2 \n"
 293 "    MOV     R2, #9 \n"
 294 "    MOV     R1, #5 \n"
 295 "    MOV     R0, #0x16 \n"
 296 "    BL      sub_FF2FBE10 \n"
 297 "    LDR     R0, [R6, #0x9C] \n"
 298 "    MOV     R2, #0 \n"
 299 "    SUB     R3, R0, #0xF0000 \n"
 300 "    LDR     R0, [R6, #0xA0] \n"
 301 "    SUB     R3, R3, #0xFF00 \n"
 302 "    ADD     R1, R0, #0xF0000 \n"
 303 "    ADD     R1, R1, #0xFF00 \n"
 304 
 305 "loc_FF1B7AB4:\n"
 306 "    STMEA   SP, {R1-R3} \n"
 307 "    MOV     R3, #0 \n"
 308 "    MOV     R2, #9 \n"
 309 "    MOV     R1, #5 \n"
 310 "    MOV     R0, #0x16 \n"
 311 "    BL      sub_FF2FBE10 \n"
 312 "    LDR     R1, [R4] \n"
 313 "    LDR     R0, [R6, #0x9C] \n"
 314 "    ADD     R1, R1, R0, LSL#1 \n"
 315 "    STR     R1, [R4] \n"
 316 "    LDR     R1, [R4, #4] \n"
 317 "    RSB     R0, R0, #0 \n"
 318 "    ADD     R0, R1, R0, LSL#1 \n"
 319 "    STR     R0, [R4, #4] \n"
 320 
 321 "loc_FF1B7AEC:\n"
 322 "    LDR     R2, =0xD36C0 \n"
 323 "    LDR     R3, =0xFF1B789C \n"
 324 "    LDR     R0, [R4, #4] \n"
 325 "    LDR     R1, [R4] \n"
 326 "    STRD    R2, [SP] \n"
 327 "    SUB     R3, R2, #0x18 \n"
 328 "    MOV     R2, R0 \n"
 329 "    LDR     R0, [R6, #0x90] \n"
 330 "    BL      sub_FF34D848_my \n"  // --> Patched. Old value = 0xFF34D848.
 331 "    LDRD    R0, [R6, #0xF8] \n"
 332 "    LDR     R2, [R6, #0xB4] \n"
 333 "    BL      sub_FF34DE34 \n"
 334 "    LDR     R3, =0xABC0 \n"
 335 "    STR     R3, [SP] \n"
 336 "    LDR     R0, [R6, #0x64] \n"
 337 "    LDR     R1, [R9, #8] \n"
 338 "    AND     R2, R0, #0xFF \n"
 339 "    LDR     R0, [R9] \n"
 340 "    SUB     R3, R3, #4 \n"
 341 "    BL      sub_FF34AD5C \n"
 342 "    LDRH    R0, [R6, #6] \n"
 343 "    CMP     R0, #2 \n"
 344 "    LDREQ   R0, =0xFF1B7570 \n"
 345 "    STREQ   R0, [R6, #0xF0] \n"
 346 "    LDR     R0, [R6, #0x90] \n"
 347 "    CMP     R0, #0 \n"
 348 "    LDREQ   R1, =0xFF1B7140 \n"
 349 "    STREQ   R1, [R6, #0xF0] \n"
 350 "    LDR     R2, [R6, #0xC] \n"
 351 "    LDR     R1, =0xFF57676C \n"
 352 "    CMP     R2, #2 \n"
 353 "    BNE     loc_FF1B7B90 \n"
 354 "    LDR     R0, [R6, #0x4C] \n"
 355 "    ADD     R0, R1, R0, LSL#3 \n"
 356 "    LDR     R1, [R9, #0xC] \n"
 357 "    LDR     R0, [R0, R1, LSL#2] \n"
 358 "    BL      sub_FF300B40 \n"
 359 "    LDR     R0, =0xFF1B70B4 \n"
 360 "    MOV     R1, #0 \n"
 361 "    BL      sub_FF3010C4 \n"
 362 "    B       loc_FF1B7BC8 \n"
 363 
 364 "loc_FF1B7B90:\n"
 365 "    CMP     R0, #0 \n"
 366 "    LDR     R0, [R6, #0x4C] \n"
 367 "    ADD     R0, R1, R0, LSL#3 \n"
 368 "    LDR     R1, [R9, #0xC] \n"
 369 "    LDR     R0, [R0, R1, LSL#2] \n"
 370 "    BNE     loc_FF1B7BB8 \n"
 371 "    LDR     R1, [R6, #0x98] \n"
 372 "    BL      sub_FF3011A4 \n"
 373 "    BL      sub_FF301228 \n"
 374 "    B       loc_FF1B7BC8 \n"
 375 
 376 "loc_FF1B7BB8:\n"
 377 "    BL      sub_FF2FED2C \n"
 378 "    LDR     R0, =0xFF1B70B4 \n"
 379 "    MOV     R1, #0 \n"
 380 "    BL      sub_FF2FF53C \n"
 381 
 382 "loc_FF1B7BC8:\n"
 383 "    LDR     R0, [R5, #8] \n"
 384 "    CMP     R0, #0 \n"
 385 "    BEQ     loc_FF1B7BFC \n"
 386 "    ADD     R0, SP, #0xC \n"
 387 "    BL      sub_FF34EE6C \n"
 388 "    LDR     R1, [R5, #0xC] \n"
 389 "    LDR     R0, [SP, #0xC] \n"
 390 "    BL      sub_FF050DC0 \n"
 391 "    ADD     R0, SP, #0xC \n"
 392 "    BL      sub_FF34EE6C \n"
 393 "    LDR     R1, [R5, #0xC] \n"
 394 "    LDR     R0, [SP, #0xC] \n"
 395 "    BL      sub_FF050DC0 \n"
 396 
 397 "loc_FF1B7BFC:\n"
 398 "    LDR     R0, =0xFF1B706C \n"
 399 "    STR     R7, [R6, #0x44]! \n"
 400 "    STR     R0, [R6, #0x90] \n"
 401 "    LDMFD   SP!, {R0-R10,PC} \n"
 402 );
 403 }
 404 
 405 /*************************************************************/
 406 //** sub_FF34D848_my @ 0xFF34D848 - 0xFF34DDD8, length=357
 407 void __attribute__((naked,noinline)) sub_FF34D848_my() {
 408 asm volatile (
 409 "    STMFD   SP!, {R0-R11,LR} \n"
 410 "    MOV     R8, R0 \n"
 411 "    LDR     R0, [R3, #0x10] \n"
 412 "    SUB     SP, SP, #4 \n"
 413 "    CMP     R0, #0 \n"
 414 "    LDR     R7, [SP, #0x38] \n"
 415 "    LDREQ   R1, =0x36A \n"
 416 "    LDREQ   R0, =0xFF34B7E8 /*'MovWriter.c'*/ \n"
 417 "    MOV     R6, #0 \n"
 418 "    MOV     R4, R3 \n"
 419 "    MOV     R5, R6 \n"
 420 "    BLEQ    _DebugAssert \n"
 421 "    LDR     R11, =0xFE20 \n"
 422 "    CMP     R8, #0 \n"
 423 "    MOV     R10, #0 \n"
 424 "    STR     R8, [R11, #0x94] \n"
 425 "    MOVEQ   R0, #1 \n"
 426 "    STRNE   R10, [R11, #0xD8] \n"
 427 "    STREQ   R0, [R11, #0xD8] \n"
 428 "    LDR     R0, [R4] \n"
 429 "    LDR     R3, =0x61A8 \n"
 430 "    STR     R0, [R11, #0xE0] \n"
 431 "    LDR     R0, [R4, #4] \n"
 432 "    LDR     R1, =0x7530 \n"
 433 "    STR     R0, [R11, #0xE4] \n"
 434 "    LDR     R0, [R4, #0x10] \n"
 435 "    MOV     R2, #0x18 \n"
 436 "    STR     R0, [R11, #0xF0] \n"
 437 "    LDR     R8, [R4, #8] \n"
 438 "    LDR     R0, =0x3E9 \n"
 439 "    CMP     R8, #0xF \n"
 440 "    MOV     R12, #0x3E8 \n"
 441 "    MOV     R9, #0x1E \n"
 442 "    ADDCC   PC, PC, R8, LSL#2 \n"
 443 "    B       loc_FF34D9A0 \n"
 444 "    B       loc_FF34D928 \n"
 445 "    B       loc_FF34D920 \n"
 446 "    B       loc_FF34D910 \n"
 447 "    B       loc_FF34D97C \n"
 448 "    B       loc_FF34D98C \n"
 449 "    B       loc_FF34D9A0 \n"
 450 "    B       loc_FF34D9A0 \n"
 451 "    B       loc_FF34D9A0 \n"
 452 "    B       loc_FF34D9A0 \n"
 453 "    B       loc_FF34D948 \n"
 454 "    B       loc_FF34D940 \n"
 455 "    B       loc_FF34D938 \n"
 456 "    B       loc_FF34D974 \n"
 457 "    B       loc_FF34D96C \n"
 458 "    B       loc_FF34D958 \n"
 459 
 460 "loc_FF34D910:\n"
 461 "    LDR     R5, =0x5DC0 \n"
 462 "    STR     R2, [R11, #0xE8] \n"
 463 "    STR     R5, [R11, #0x13C] \n"
 464 "    B       loc_FF34D930 \n"
 465 
 466 "loc_FF34D920:\n"
 467 "    MOV     R5, R3 \n"
 468 "    B       loc_FF34D95C \n"
 469 
 470 "loc_FF34D928:\n"
 471 "    MOV     R5, R1 \n"
 472 "    B       loc_FF34D94C \n"
 473 
 474 "loc_FF34D930:\n"
 475 "    STR     R0, [R11, #0x140] \n"
 476 "    B       loc_FF34D9AC \n"
 477 
 478 "loc_FF34D938:\n"
 479 "    LDR     R5, =0x5DC \n"
 480 "    B       loc_FF34D94C \n"
 481 
 482 "loc_FF34D940:\n"
 483 "    LDR     R5, =0xBB8 \n"
 484 "    B       loc_FF34D94C \n"
 485 
 486 "loc_FF34D948:\n"
 487 "    LDR     R5, =0x1770 \n"
 488 
 489 "loc_FF34D94C:\n"
 490 "    STR     R1, [R11, #0x13C] \n"
 491 "    STR     R9, [R11, #0xE8] \n"
 492 "    B       loc_FF34D930 \n"
 493 
 494 "loc_FF34D958:\n"
 495 "    LDR     R5, =0x4E2 \n"
 496 
 497 "loc_FF34D95C:\n"
 498 "    STR     R2, [R11, #0xE8] \n"
 499 "    STR     R3, [R11, #0x13C] \n"
 500 "    STR     R12, [R11, #0x140] \n"
 501 "    B       loc_FF34D9AC \n"
 502 
 503 "loc_FF34D96C:\n"
 504 "    LDR     R5, =0x9C4 \n"
 505 "    B       loc_FF34D95C \n"
 506 
 507 "loc_FF34D974:\n"
 508 "    LDR     R5, =0x1388 \n"
 509 "    B       loc_FF34D95C \n"
 510 
 511 "loc_FF34D97C:\n"
 512 "    STR     R1, [R11, #0x13C] \n"
 513 "    LDR     R5, =0x57600000 \n"  // --> Patched. Old value = 0x3A980. 2hrs 240fps
 514 "    MOV     R1, #0xF0 \n"
 515 "    B       loc_FF34D998 \n"
 516 
 517 "loc_FF34D98C:\n"
 518 "    LDR     R5, =0x28800000 \n"  // --> Patched. Old value = 0x1D4C0. 2hrs 120fps
 519 "    STR     R1, [R11, #0x13C] \n"
 520 "    MOV     R1, #0x78 \n"
 521 
 522 "loc_FF34D998:\n"
 523 "    STR     R1, [R11, #0xE8] \n"
 524 "    B       loc_FF34D930 \n"
 525 
 526 "loc_FF34D9A0:\n"
 527 "    LDR     R0, =0xFF34B7E8 /*'MovWriter.c'*/ \n"
 528 "    MOV     R1, #0x3C4 \n"
 529 "    BL      _DebugAssert \n"
 530 
 531 "loc_FF34D9AC:\n"
 532 "    LDR     R0, [R11, #0xE8] \n"
 533 "    LDR     R1, =0x1C20 \n"  // --> Patched. Old value = 0xE0F. 2hrs
 534 "    MOV     R0, R0, LSR#1 \n"
 535 "    STR     R0, [R11, #0xEC] \n"
 536 "    LDR     R0, [R7] \n"
 537 "    STR     R0, [R11, #0xF4] \n"
 538 "    LDRH    R0, [R7, #0x10] \n"
 539 "    STR     R0, [R11, #0xF8] \n"
 540 "    LDR     R0, [R7, #4] \n"
 541 "    STRH    R0, [R11, #2] \n"
 542 "    LDR     R0, [R7, #8] \n"
 543 "    STRH    R0, [R11, #4] \n"
 544 "    LDR     R0, [R7, #0x14] \n"
 545 "    STR     R0, [R11, #0xFC] \n"
 546 "    LDR     R0, [SP, #0x3C] \n"
 547 "    STR     R0, [R11, #0x138] \n"
 548 "    LDR     R0, [R11, #0xE0] \n"
 549 "    CMP     R0, #0x140 \n"
 550 "    MOVEQ   R0, #0x20000 \n"
 551 "    MOVEQ   R6, #1 \n"
 552 "    STREQ   R0, [R11, #0xB8] \n"
 553 "    BEQ     loc_FF34DA44 \n"
 554 "    CMP     R0, #0x280 \n"
 555 "    LDREQ   R0, =0x7A760 \n"
 556 "    MOVEQ   R6, #2 \n"
 557 "    STREQ   R0, [R11, #0xB8] \n"
 558 "    BEQ     loc_FF34DA44 \n"
 559 "    CMP     R0, #0x500 \n"
 560 "    LDREQ   R0, =0x11DA50 \n"
 561 "    LDR     R1, =0x1C20 \n"  // --> Patched. Old value = 0x707. 2hrs
 562 "    MOVEQ   R6, #4 \n"
 563 "    STREQ   R0, [R11, #0xB8] \n"
 564 "    BEQ     loc_FF34DA44 \n"
 565 "    CMP     R0, #0x780 \n"
 566 "    BNE     loc_FF34DA4C \n"
 567 //"  MOV     R0, #0x200000 \n"
 568 "    MOV     R0, #2097152 \n" // 10 mins
 569 "    MOV     R6, #5 \n"
 570 "    STR     R0, [R11, #0xB8] \n"
 571 
 572 "loc_FF34DA44:\n"
 573 "    STR     R1, [R11, #0x54] \n"
 574 "    B       loc_FF34DA58 \n"
 575 
 576 "loc_FF34DA4C:\n"
 577 "    LDR     R0, =0xFF34B7E8 /*'MovWriter.c'*/ \n"
 578 "    MOV     R1, #0x3EC \n"
 579 "    BL      _DebugAssert \n"
 580 
 581 "loc_FF34DA58:\n"
 582 "    LDR     R8, [R4, #8] \n"
 583 "    CMP     R8, #0xB \n"
 584 "    CMPNE   R8, #0xA \n"
 585 "    CMPNE   R8, #9 \n"
 586 "    BNE     loc_FF34DA8C \n"
 587 "    LDR     R0, [R11, #0xE0] \n"
 588 "    CMP     R0, #0x500 \n"
 589 "    BNE     loc_FF34DA8C \n"
 590 "    LDR     R0, [R11, #0x54] \n"
 591 "    LDR     R1, [R11, #0x140] \n"
 592 "    MUL     R0, R5, R0 \n"
 593 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 594 "    B       loc_FF34DAAC \n"
 595 
 596 "loc_FF34DA8C:\n"
 597 "    LDR     R0, [R11, #0x54] \n"
 598 "    LDR     R1, [R11, #0x140] \n"
 599 "    MUL     R0, R5, R0 \n"
 600 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 601 "    MOV     R1, #5 \n"
 602 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 603 "    ADD     R0, R0, #1 \n"
 604 "    ADD     R0, R0, R0, LSL#2 \n"
 605 
 606 "loc_FF34DAAC:\n"
 607 "    CMP     R8, #0xB \n"
 608 "    CMPNE   R8, #0xA \n"
 609 "    CMPNE   R8, #9 \n"
 610 "    STR     R0, [R11, #0x50] \n"
 611 "    BNE     loc_FF34DAD4 \n"
 612 "    LDR     R1, [R11, #0x140] \n"
 613 "    MUL     R0, R1, R0 \n"
 614 "    MOV     R1, R5 \n"
 615 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 616 "    STR     R0, [R11, #0x54] \n"
 617 
 618 "loc_FF34DAD4:\n"
 619 "    CMP     R8, #3 \n"
 620 "    CMPNE   R8, #4 \n"
 621 "    BNE     loc_FF34DB0C \n"
 622 "    RSB     R0, R5, R5, LSL#4 \n"
 623 "    STR     R9, [R11, #0x54] \n"
 624 "    LDR     R1, [R11, #0x140] \n"
 625 "    MOV     R0, R0, LSL#1 \n"
 626 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 627 "    LDR     R1, [R11, #0xF0] \n"
 628 "    MOV     R9, R1 \n"
 629 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 630 "    ADD     R0, R0, #1 \n"
 631 "    MUL     R0, R9, R0 \n"
 632 "    STR     R0, [R11, #0x50] \n"
 633 
 634 "loc_FF34DB0C:\n"
 635 "    ADD     R0, R5, R5, LSL#8 \n"
 636 "    LDR     R1, [R11, #0x140] \n"
 637 "    RSB     R0, R0, R0, LSL#3 \n"
 638 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 639 "    STR     R0, [R11, #0x80] \n"
 640 "    LDR     R0, [R4, #0xC] \n"
 641 "    CMP     R0, #0 \n"
 642 "    MOVNE   R0, #1 \n"
 643 "    STR     R0, [SP] \n"
 644 "    LDR     R5, [R7, #0xC] \n"
 645 "    MOV     R0, R5, LSR#1 \n"
 646 "    STR     R5, [R11, #0xA0] \n"
 647 "    STR     R0, [R11, #0xA4] \n"
 648 "    LDR     R0, [SP, #8] \n"
 649 "    ADD     R0, R0, #3 \n"
 650 "    BIC     R1, R0, #3 \n"
 651 "    STR     R1, [R11, #0x104] \n"
 652 "    LDR     R0, [R11, #0x50] \n"
 653 "    MOV     R0, R0, LSL#2 \n"
 654 "    ADD     R1, R1, R0 \n"
 655 "    STR     R1, [R11, #0x108] \n"
 656 "    LDRH    R7, [R11, #4] \n"
 657 "    LDR     R2, [SP, #0xC] \n"
 658 "    LDR     R3, [SP, #8] \n"
 659 "    CMP     R7, #0 \n"
 660 "    ADD     R9, R3, R2 \n"
 661 "    BEQ     loc_FF34DD90 \n"
 662 "    ADD     R8, R1, R0 \n"
 663 "    STR     R8, [R11, #0x10C] \n"
 664 "    LDR     R1, [R11, #0xEC] \n"
 665 "    BL      sub_00690934 /*__divmod_unsigned_int*/ \n"
 666 "    ADD     R0, R0, R8 \n"
 667 "    ADD     R0, R0, #0x1F \n"
 668 "    BIC     R0, R0, #0x1F \n"
 669 "    STR     R0, [R11, #0x110] \n"
 670 "    LDR     R1, [R11, #0xD8] \n"
 671 "    CMP     R1, #0 \n"
 672 "    STREQ   R10, [R11, #0x84] \n"
 673 "    LDREQ   R2, [R11, #0xB8] \n"
 674 "    ADDEQ   R0, R0, R2 \n"
 675 "    STREQ   R0, [R11, #0x114] \n"
 676 "    MOVEQ   R0, #2 \n"
 677 "    STREQ   R0, [R11, #0x40] \n"
 678 "    BEQ     loc_FF34DC48 \n"
 679 "    LDR     R2, [R11, #0xB8] \n"
 680 "    CMP     R7, #1 \n"
 681 "    ADD     R0, R0, R2 \n"
 682 "    STR     R0, [R11, #0x84] \n"
 683 "    ADD     R0, R0, #0x100000 \n"
 684 "    MOV     R2, #5 \n"
 685 "    B       loc_FF34DC30 \n"
 686 
 687 "loc_FF34DC30:\n"
 688 "    STR     R0, [R11, #0x114] \n"
 689 "    STR     R2, [R11, #0x40] \n"
 690 "    ADDEQ   R2, R5, R5, LSL#1 \n"
 691 "    SUBEQ   R0, R9, R0 \n"
 692 "    MOVEQ   R2, R2, LSL#1 \n"
 693 "    BEQ     loc_FF34DC58 \n"
 694 
 695 "loc_FF34DC48:\n"
 696 "    LDR     R2, [R11, #0x40] \n"
 697 "    LDR     R0, [R11, #0x114] \n"
 698 "    MUL     R2, R5, R2 \n"
 699 "    SUB     R0, R9, R0 \n"
 700 
 701 "loc_FF34DC58:\n"
 702 "    SUB     R0, R0, R2 \n"
 703 "    MOV     R0, R0, LSR#15 \n"
 704 "    MOV     R0, R0, LSL#15 \n"
 705 "    STR     R0, [R11, #0x120] \n"
 706 "    LDR     R2, [R11, #0x114] \n"
 707 "    CMP     R1, #0 \n"
 708 "    ADD     R0, R0, R2 \n"
 709 "    STR     R0, [R11, #0x118] \n"
 710 "    BEQ     loc_FF34DC8C \n"
 711 "    CMP     R7, #1 \n"
 712 "    BICEQ   R0, R0, #3 \n"
 713 "    STREQ   R0, [R11, #0x28] \n"
 714 "    ADDEQ   R0, R0, R5 \n"
 715 
 716 "loc_FF34DC8C:\n"
 717 "    STR     R0, [R11, #0x11C] \n"
 718 "    LDR     R10, =0x170BB4 \n"
 719 "    LDR     R8, [R11, #0x40] \n"
 720 "    LDR     R9, [R11, #0x11C] \n"
 721 "    MOV     R0, #0 \n"
 722 "    SUB     LR, R10, #0x28 \n"
 723 
 724 "loc_FF34DCA4:\n"
 725 "    CMP     R0, R8 \n"
 726 "    MLACC   R1, R0, R5, R9 \n"
 727 "    LDR     R3, =0x170B64 \n"
 728 "    ADDCC   R1, R1, #3 \n"
 729 "    MOVCS   R1, #0 \n"
 730 "    BICCC   R1, R1, #3 \n"
 731 "    STR     R1, [R10, R0, LSL#2] \n"
 732 "    MOV     R1, #0 \n"
 733 "    ADD     R3, R3, R0, LSL#3 \n"
 734 "    ADD     R12, LR, R0, LSL#3 \n"
 735 
 736 "loc_FF34DCCC:\n"
 737 "    STR     R2, [R3, R1, LSL#2] \n"
 738 "    STR     R2, [R12, R1, LSL#2] \n"
 739 "    ADD     R1, R1, #1 \n"
 740 "    CMP     R1, #2 \n"
 741 "    BLT     loc_FF34DCCC \n"
 742 "    ADD     R0, R0, #1 \n"
 743 "    CMP     R0, #5 \n"
 744 "    BLT     loc_FF34DCA4 \n"
 745 "    CMP     R7, #1 \n"
 746 "    MOVNE   R0, #0 \n"
 747 "    STRNE   R0, [R11, #0xDC] \n"
 748 "    BNE     loc_FF34DD4C \n"
 749 "    LDRH    R0, [R11, #2] \n"
 750 "    CMP     R0, #0x10 \n"
 751 "    LDRNE   R1, =0x48D \n"
 752 "    LDRNE   R0, =0xFF34B7E8 /*'MovWriter.c'*/ \n"
 753 "    BLNE    _DebugAssert \n"
 754 "    MOV     R0, #1 \n"
 755 "    STR     R0, [R11, #0xDC] \n"
 756 "    LDRH    R0, [R11, #4] \n"
 757 "    MVN     R1, #0x10000 \n"
 758 "    AND     R0, R1, R0, LSL#1 \n"
 759 "    STRH    R0, [R11, #4] \n"
 760 "    LDR     R0, [R11, #0xF8] \n"
 761 "    MOV     R0, R0, LSL#1 \n"
 762 "    STR     R0, [R11, #0xF8] \n"
 763 "    LDR     R0, [R11, #0xA0] \n"
 764 "    MOV     R0, R0, LSL#1 \n"
 765 "    STR     R0, [R11, #0xA0] \n"
 766 "    LDR     R0, [R11, #0xA4] \n"
 767 "    MOV     R0, R0, LSL#1 \n"
 768 "    STR     R0, [R11, #0xA4] \n"
 769 
 770 "loc_FF34DD4C:\n"
 771 "    LDR     R0, [R11, #0xD8] \n"
 772 "    CMP     R0, #0 \n"
 773 "    BEQ     loc_FF34DD68 \n"
 774 "    LDR     R1, [R4, #8] \n"
 775 "    MOV     R0, R6 \n"
 776 "    BL      sub_FF0D35A4 \n"
 777 "    B       loc_FF34DD7C \n"
 778 
 779 "loc_FF34DD68:\n"
 780 "    LDRH    R3, [R4, #0x14] \n"
 781 "    LDR     R2, [R4, #8] \n"
 782 "    LDR     R1, [SP] \n"
 783 "    MOV     R0, R6 \n"
 784 "    BL      sub_FF0D34D8 \n"
 785 
 786 "loc_FF34DD7C:\n"
 787 "    LDR     R1, [R11, #0xA0] \n"
 788 "    ADD     R0, R0, R1 \n"
 789 
 790 "loc_FF34DD84:\n"
 791 "    STR     R0, [R11, #0x98] \n"
 792 "    ADD     SP, SP, #0x14 \n"
 793 "    LDMFD   SP!, {R4-R11,PC} \n"
 794 
 795 "loc_FF34DD90:\n"
 796 "    ADD     R0, R0, R1 \n"
 797 "    ADD     R0, R0, #0x1F \n"
 798 "    BIC     R0, R0, #0x1F \n"
 799 "    STR     R0, [R11, #0x110] \n"
 800 "    LDR     R1, [R11, #0xB8] \n"
 801 "    MOV     R2, R8 \n"
 802 "    ADD     R0, R0, R1 \n"
 803 "    SUB     R1, R9, R0 \n"
 804 "    MOV     R1, R1, LSR#15 \n"
 805 "    MOV     R1, R1, LSL#15 \n"
 806 "    STR     R0, [R11, #0x114] \n"
 807 "    ADD     R0, R0, R1 \n"
 808 "    STR     R1, [R11, #0x120] \n"
 809 "    STR     R0, [R11, #0x118] \n"
 810 "    LDRH    R3, [R4, #0x14] \n"
 811 "    LDR     R1, [SP] \n"
 812 "    MOV     R0, R6 \n"
 813 "    BL      sub_FF0D34D8 \n"
 814 "    B       loc_FF34DD84 \n"
 815 );
 816 }

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