root/platform/ixus990_sd970/sub/100a/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskHook
  2. CreateTask_spytask
  3. boot
  4. sub_FF8101A0_my
  5. sub_FF810FC4_my
  6. sub_FF814D38_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. taskcreatePhySw_my
  10. init_file_modules_task
  11. sub_FF870570_my
  12. sub_FF8533C8_my
  13. sub_FF853168_my
  14. sub_FF852EF8_my
  15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 #include "dryos31.h"
   8 
   9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
  10 
  11 const char * const new_sa = &_end;
  12 
  13 extern void task_CaptSeq();
  14 extern void task_InitFileModules();
  15 extern void task_MovieRecord();
  16 extern void task_ExpDrv();
  17 extern void task_FileWrite();
  18 extern void task_RotaryEncoder();
  19 void JogDial_task_my(void);
  20 
  21 void taskHook(context_t **context)
  22 {
  23     task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  24 
  25     // Replace firmware task addresses with ours
  26     if(tcb->entry == (void*)task_CaptSeq)           tcb->entry = (void*)capt_seq_task;
  27     if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  28     if(tcb->entry == (void*)task_MovieRecord)       tcb->entry = (void*)movie_record_task;
  29     if(tcb->entry == (void*)task_ExpDrv)            tcb->entry = (void*)exp_drv_task;
  30     if(tcb->entry == (void*)task_RotaryEncoder)     tcb->entry = (void*)JogDial_task_my;
  31     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  32 }
  33 
  34 /*----------------------------------------------------------------------
  35     CreateTask_spytask
  36 -----------------------------------------------------------------------*/
  37 void CreateTask_spytask() {
  38     _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  39 };
  40 
  41 /*----------------------------------------------------------------------
  42     boot()
  43 
  44     Main entry point for the CHDK code
  45 -----------------------------------------------------------------------*/
  46 
  47 /*************************************************************/
  48 //** boot @ 0xFF81000C - 0xFF810160, length=86
  49 void __attribute__((naked,noinline)) boot() {
  50 asm volatile (
  51 "    LDR     R1, =0xC0410000 \n"
  52 "    MOV     R0, #0 \n"
  53 "    STR     R0, [R1] \n"
  54 "    MOV     R1, #0x78 \n"
  55 "    MCR     p15, 0, R1, c1, c0 \n"
  56 "    MOV     R1, #0 \n"
  57 "    MCR     p15, 0, R1, c7, c10, 4 \n"
  58 "    MCR     p15, 0, R1, c7, c5 \n"
  59 "    MCR     p15, 0, R1, c7, c6 \n"
  60 "    MOV     R0, #0x3D \n"
  61 "    MCR     p15, 0, R0, c6, c0 \n"
  62 "    MOV     R0, #0xC000002F \n"
  63 "    MCR     p15, 0, R0, c6, c1 \n"
  64 "    MOV     R0, #0x33 \n"
  65 "    MCR     p15, 0, R0, c6, c2 \n"
  66 "    MOV     R0, #0x40000033 \n"
  67 "    MCR     p15, 0, R0, c6, c3 \n"
  68 "    MOV     R0, #0x80000017 \n"
  69 "    MCR     p15, 0, R0, c6, c4 \n"
  70 "    LDR     R0, =0xFF80002D \n"
  71 "    MCR     p15, 0, R0, c6, c5 \n"
  72 "    MOV     R0, #0x34 \n"
  73 "    MCR     p15, 0, R0, c2, c0 \n"
  74 "    MOV     R0, #0x34 \n"
  75 "    MCR     p15, 0, R0, c2, c0, 1 \n"
  76 "    MOV     R0, #0x34 \n"
  77 "    MCR     p15, 0, R0, c3, c0 \n"
  78 "    LDR     R0, =0x3333330 \n"
  79 "    MCR     p15, 0, R0, c5, c0, 2 \n"
  80 "    LDR     R0, =0x3333330 \n"
  81 "    MCR     p15, 0, R0, c5, c0, 3 \n"
  82 "    MRC     p15, 0, R0, c1, c0 \n"
  83 "    ORR     R0, R0, #0x1000 \n"
  84 "    ORR     R0, R0, #4 \n"
  85 "    ORR     R0, R0, #1 \n"
  86 "    MCR     p15, 0, R0, c1, c0 \n"
  87 "    MOV     R1, #0x80000006 \n"
  88 "    MCR     p15, 0, R1, c9, c1 \n"
  89 "    MOV     R1, #6 \n"
  90 "    MCR     p15, 0, R1, c9, c1, 1 \n"
  91 "    MRC     p15, 0, R1, c1, c0 \n"
  92 "    ORR     R1, R1, #0x50000 \n"
  93 "    MCR     p15, 0, R1, c1, c0 \n"
  94 "    LDR     R2, =0xC0200000 \n"
  95 "    MOV     R1, #1 \n"
  96 "    STR     R1, [R2, #0x10C] \n"
  97 "    MOV     R1, #0xFF \n"
  98 "    STR     R1, [R2, #0xC] \n"
  99 "    STR     R1, [R2, #0x1C] \n"
 100 "    STR     R1, [R2, #0x2C] \n"
 101 "    STR     R1, [R2, #0x3C] \n"
 102 "    STR     R1, [R2, #0x4C] \n"
 103 "    STR     R1, [R2, #0x5C] \n"
 104 "    STR     R1, [R2, #0x6C] \n"
 105 "    STR     R1, [R2, #0x7C] \n"
 106 "    STR     R1, [R2, #0x8C] \n"
 107 "    STR     R1, [R2, #0x9C] \n"
 108 "    STR     R1, [R2, #0xAC] \n"
 109 "    STR     R1, [R2, #0xBC] \n"
 110 "    STR     R1, [R2, #0xCC] \n"
 111 "    STR     R1, [R2, #0xDC] \n"
 112 "    STR     R1, [R2, #0xEC] \n"
 113 "    STR     R1, [R2, #0xFC] \n"
 114 "    LDR     R1, =0xC0400008 \n"
 115 "    LDR     R2, =0x430005 \n"
 116 "    STR     R2, [R1] \n"
 117 "    MOV     R1, #1 \n"
 118 "    LDR     R2, =0xC0243100 \n"
 119 "    STR     R2, [R1] \n"
 120 "    LDR     R2, =0xC0242010 \n"
 121 "    LDR     R1, [R2] \n"
 122 "    ORR     R1, R1, #1 \n"
 123 "    STR     R1, [R2] \n"
 124 "    LDR     R0, =0xFFB84E78 \n"
 125 "    LDR     R1, =0x1900 \n"
 126 "    LDR     R3, =0xD974 \n"
 127 
 128 "loc_FF81013C:\n"
 129 "    CMP     R1, R3 \n"
 130 "    LDRCC   R2, [R0], #4 \n"
 131 "    STRCC   R2, [R1], #4 \n"
 132 "    BCC     loc_FF81013C \n"
 133 "    LDR     R1, =0x1487C4 \n"
 134 "    MOV     R2, #0 \n"
 135 
 136 "loc_FF810154:\n"
 137 "    CMP     R3, R1 \n"
 138 "    STRCC   R2, [R3], #4 \n"
 139 "    BCC     loc_FF810154 \n"
 140 "    B       sub_FF8101A0_my \n"  // --> Patched. Old value = 0xFF8101A0.
 141 );
 142 }
 143 
 144 /*************************************************************/
 145 //** sub_FF8101A0_my @ 0xFF8101A0 - 0xFF810208, length=27
 146 void __attribute__((naked,noinline)) sub_FF8101A0_my() {
 147 
 148     //http://chdk.setepontos.com/index.php/topic,4194.0.html
 149     *(int*)0x1934=(int)taskHook;
 150 
 151     // replacement for correct power-on.
 152     // Search on FUN_ff842a90 on sd780 finds FUN_ff843850 for sd970, values from there
 153     *(int*)(0x22CC)= (*(int*)0xC0220128)&1 ? 0x400000 : 0x200000; 
 154 asm volatile (
 155 "    LDR     R0, =0xFF810218 \n"
 156 "    MOV     R1, #0 \n"
 157 "    LDR     R3, =0xFF810250 \n"
 158 
 159 "loc_FF8101AC:\n"
 160 "    CMP     R0, R3 \n"
 161 "    LDRCC   R2, [R0], #4 \n"
 162 "    STRCC   R2, [R1], #4 \n"
 163 "    BCC     loc_FF8101AC \n"
 164 "    LDR     R0, =0xFF810250 \n"
 165 "    MOV     R1, #0x4B0 \n"
 166 "    LDR     R3, =0xFF810464 \n"
 167 
 168 "loc_FF8101C8:\n"
 169 "    CMP     R0, R3 \n"
 170 "    LDRCC   R2, [R0], #4 \n"
 171 "    STRCC   R2, [R1], #4 \n"
 172 "    BCC     loc_FF8101C8 \n"
 173 "    MOV     R0, #0xD2 \n"
 174 "    MSR     CPSR_cxsf, R0 \n"
 175 "    MOV     SP, #0x1000 \n"
 176 "    MOV     R0, #0xD3 \n"
 177 "    MSR     CPSR_cxsf, R0 \n"
 178 "    MOV     SP, #0x1000 \n"
 179 "    LDR     R0, =0x6C4 \n"
 180 "    LDR     R2, =0xEEEEEEEE \n"
 181 "    MOV     R3, #0x1000 \n"
 182 
 183 "loc_FF8101FC:\n"
 184 "    CMP     R0, R3 \n"
 185 "    STRCC   R2, [R0], #4 \n"
 186 "    BCC     loc_FF8101FC \n"
 187 "    BL      sub_FF810FC4_my \n"  // --> Patched. Old value = 0xFF810FC4.
 188 );
 189 }
 190 
 191 /*************************************************************/
 192 //** sub_FF810FC4_my @ 0xFF810FC4 - 0xFF811070, length=44
 193 void __attribute__((naked,noinline)) sub_FF810FC4_my() {
 194 asm volatile (
 195 "    STR     LR, [SP, #-4]! \n"
 196 "    SUB     SP, SP, #0x74 \n"
 197 "    MOV     R0, SP \n"
 198 "    MOV     R1, #0x74 \n"
 199 "    BL      sub_FFAEBCA4 \n"
 200 "    MOV     R0, #0x53000 \n"
 201 "    STR     R0, [SP, #4] \n"
 202 
 203 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 204 "    LDR     R0, =0x1487C4 \n"
 205 #else
 206 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 207 "    LDR     R0, [R0]\n"      //
 208 #endif
 209 
 210 "    LDR     R2, =0x2F9C00 \n"
 211 "    LDR     R1, =0x2F24A8 \n"
 212 "    STR     R0, [SP, #8] \n"
 213 "    SUB     R0, R1, R0 \n"
 214 "    ADD     R3, SP, #0xC \n"
 215 "    STR     R2, [SP] \n"
 216 "    STMIA   R3, {R0-R2} \n"
 217 "    MOV     R0, #0x22 \n"
 218 "    STR     R0, [SP, #0x18] \n"
 219 "    MOV     R0, #0x68 \n"
 220 "    STR     R0, [SP, #0x1C] \n"
 221 "    LDR     R0, =0x19B \n"
 222 "    LDR     R1, =sub_FF814D38_my \n"  // --> Patched. Old value = 0xFF814D38.
 223 "    STR     R0, [SP, #0x20] \n"
 224 "    MOV     R0, #0x96 \n"
 225 "    STR     R0, [SP, #0x24] \n"
 226 "    MOV     R0, #0x78 \n"
 227 "    STR     R0, [SP, #0x28] \n"
 228 "    MOV     R0, #0x64 \n"
 229 "    STR     R0, [SP, #0x2C] \n"
 230 "    MOV     R0, #0 \n"
 231 "    STR     R0, [SP, #0x30] \n"
 232 "    STR     R0, [SP, #0x34] \n"
 233 "    MOV     R0, #0x10 \n"
 234 "    STR     R0, [SP, #0x5C] \n"
 235 "    MOV     R0, #0x800 \n"
 236 "    STR     R0, [SP, #0x60] \n"
 237 "    MOV     R0, #0xA0 \n"
 238 "    STR     R0, [SP, #0x64] \n"
 239 "    MOV     R0, #0x280 \n"
 240 "    STR     R0, [SP, #0x68] \n"
 241 "    MOV     R0, SP \n"
 242 "    MOV     R2, #0 \n"
 243 "    BL      sub_FF812D68 \n"
 244 "    ADD     SP, SP, #0x74 \n"
 245 "    LDR     PC, [SP], #4 \n"
 246 );
 247 }
 248 
 249 /*************************************************************/
 250 //** sub_FF814D38_my @ 0xFF814D38 - 0xFF814DAC, length=30
 251 void __attribute__((naked,noinline)) sub_FF814D38_my() {
 252 asm volatile (
 253 "    STMFD   SP!, {R4,LR} \n"
 254 "    BL      sub_FF810954 \n"
 255 "    BL      sub_FF8190B4 \n"
 256 "    CMP     R0, #0 \n"
 257 "    LDRLT   R0, =0xFF814E4C /*'dmSetup'*/ \n"
 258 "    BLLT    _err_init_task \n"
 259 "    BL      sub_FF814974 \n"
 260 "    CMP     R0, #0 \n"
 261 "    LDRLT   R0, =0xFF814E54 /*'termDriverInit'*/ \n"
 262 "    BLLT    _err_init_task \n"
 263 "    LDR     R0, =0xFF814E64 /*'/_term'*/ \n"
 264 "    BL      sub_FF814A5C \n"
 265 "    CMP     R0, #0 \n"
 266 "    LDRLT   R0, =0xFF814E6C /*'termDeviceCreate'*/ \n"
 267 "    BLLT    _err_init_task \n"
 268 "    LDR     R0, =0xFF814E64 /*'/_term'*/ \n"
 269 "    BL      _stdioSetup \n"
 270 "    CMP     R0, #0 \n"
 271 "    LDRLT   R0, =0xFF814E80 /*'stdioSetup'*/ \n"
 272 "    BLLT    _err_init_task \n"
 273 "    BL      sub_FF818BCC \n"
 274 "    CMP     R0, #0 \n"
 275 "    LDRLT   R0, =0xFF814E8C /*'stdlibSetup'*/ \n"
 276 "    BLLT    _err_init_task \n"
 277 "    BL      sub_FF8114A8 \n"
 278 "    CMP     R0, #0 \n"
 279 "    LDRLT   R0, =0xFF814E98 /*'armlib_setup'*/ \n"
 280 "    BLLT    _err_init_task \n"
 281 "    LDMFD   SP!, {R4,LR} \n"
 282 "    B       taskcreate_Startup_my \n"  // --> Patched. Old value = 0xFF81C260.
 283 );
 284 }
 285 
 286 /*************************************************************/
 287 //** taskcreate_Startup_my @ 0xFF81C260 - 0xFF81C2E4, length=34
 288 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 289 asm volatile (
 290 "    STMFD   SP!, {R3-R5,LR} \n"
 291 //"  BL      _sub_FF843848 \n"  // --> Nullsub call removed.
 292 "    BL      sub_FF828CE8 \n"
 293 "    CMP     R0, #0 \n"
 294 "    BNE     loc_FF81C2A8 \n"
 295 "    LDR     R4, =0xC0220000 \n"
 296 "    LDR     R0, [R4, #0x12C] \n"
 297 "    TST     R0, #1 \n"
 298 "    MOVEQ   R0, #0x12C \n"
 299 "    BLEQ    _SleepTask \n"
 300 "    BL      sub_FF84382C \n"
 301 "    CMP     R0, #0 \n"
 302 "    BNE     loc_FF81C2A8 \n"
 303 "    BL      sub_FF821248 \n"
 304 "    MOV     R0, #0x44 \n"
 305 "    STR     R0, [R4, #0x1C] \n"
 306 "    BL      sub_FF821434 \n"
 307 
 308 "loc_FF81C2A4:\n"
 309 "    B       loc_FF81C2A4 \n"
 310 
 311 "loc_FF81C2A8:\n"
 312 //"  BL      _sub_FF843850 \n"  // Removed for correct power-on
 313 //"  BL      _sub_FF84384C \n"  // --> Nullsub call removed.
 314 "    BL      sub_FF826FA0 \n"
 315 "    LDR     R1, =0x34E000 \n"
 316 "    MOV     R0, #0 \n"
 317 "    BL      sub_FF8273E8 \n"
 318 "    BL      sub_FF827194 /*_EnableDispatch*/ \n"
 319 "    MOV     R3, #0 \n"
 320 "    STR     R3, [SP] \n"
 321 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81C1FC.
 322 "    MOV     R2, #0 \n"
 323 "    MOV     R1, #0x19 \n"
 324 "    LDR     R0, =0xFF81C2F0 /*'Startup'*/ \n"
 325 "    BL      _CreateTask \n"
 326 "    MOV     R0, #0 \n"
 327 "    LDMFD   SP!, {R3-R5,PC} \n"
 328 );
 329 }
 330 
 331 /*************************************************************/
 332 //** task_Startup_my @ 0xFF81C1FC - 0xFF81C25C, length=25
 333 void __attribute__((naked,noinline)) task_Startup_my() {
 334 asm volatile (
 335 "    STMFD   SP!, {R4,LR} \n"
 336 "    BL      sub_FF815394 \n"
 337 "    BL      sub_FF822C58 \n"
 338 "    BL      sub_FF820F14 \n"
 339 //"  BL      _sub_FF843FB0 \n"  // --> Nullsub call removed.
 340 "    BL      sub_FF828F0C \n"
 341 //"  BL      _sub_FF828DBC \n"  // start diskboot.bin
 342 "    BL      sub_FF8778CC \n"
 343 "    BL      sub_FF81FBA0 \n"
 344 "    BL      sub_FF828F3C \n"
 345 "    BL      sub_FF8265A0 \n"
 346 "    BL      sub_FF8290B8 \n"
 347 "    BL      CreateTask_spytask\n"  // added
 348 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFF821A6C.
 349 "    BL      sub_FF824A8C \n"
 350 "    BL      sub_FF8290D0 \n"
 351 //"  BL      _sub_FF81EFC0 \n"  // --> Nullsub call removed.
 352 "    BL      sub_FF820818 \n"
 353 "    BL      sub_FF828AC4 \n"
 354 "    BL      sub_FF820EC4 \n"
 355 "    BL      sub_FF820724 \n"
 356 "    BL      sub_FF81FBD4 \n"
 357 "    BL      sub_FF829B9C \n"
 358 "    BL      sub_FF8206FC \n"
 359 "    LDMFD   SP!, {R4,LR} \n"
 360 "    B       sub_FF8154B4 \n"
 361 );
 362 }
 363 
 364 /*************************************************************/
 365 //** taskcreatePhySw_my @ 0xFF821A6C - 0xFF821ABC, length=21
 366 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 367 asm volatile (
 368 "    STMFD   SP!, {R3-R5,LR} \n"
 369 "    LDR     R4, =0x1C28 \n"
 370 "    LDR     R0, [R4, #0x10] \n"
 371 "    CMP     R0, #0 \n"
 372 "    BNE     loc_FF821AA0 \n"
 373 "    MOV     R3, #0 \n"
 374 "    STR     R3, [SP] \n"
 375 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFF821A38.
 376 "    MOV     R2, #0x2000 \n"  // --> Patched. Old value = 0x800. stack size for new task_PhySw
 377 "    MOV     R1, #0x17 \n"
 378 "    LDR     R0, =0xFF821C78 /*'PhySw'*/ \n"
 379 "    BL      sub_FF8271E8 /*_CreateTaskStrictly*/ \n"
 380 "    STR     R0, [R4, #0x10] \n"
 381 
 382 "loc_FF821AA0:\n"
 383 "    BL      sub_FF844158 \n"
 384 "    BL      sub_FF86E134 \n"
 385 "    BL      sub_FF847A04 /*_IsFactoryMode_FW*/ \n"
 386 "    CMP     R0, #0 \n"
 387 "    LDREQ   R1, =0xEE04 \n"
 388 "    LDMEQFD SP!, {R3-R5,LR} \n"
 389 "    BEQ     sub_FF86E0BC /*_OpLog.Start_FW*/ \n"
 390 "    LDMFD   SP!, {R3-R5,PC} \n"
 391 "    LDR     PC, =0xFF821AC0 \n"  // Continue in firmware
 392 );
 393 }
 394 
 395 /*************************************************************/
 396 //** init_file_modules_task @ 0xFF87B1A0 - 0xFF87B1D4, length=14
 397 void __attribute__((naked,noinline)) init_file_modules_task() {
 398 asm volatile (
 399 "    STMFD   SP!, {R4-R6,LR} \n"
 400 "    BL      sub_FF870544 \n"
 401 "    LDR     R5, =0x5006 \n"
 402 "    MOVS    R4, R0 \n"
 403 "    MOVNE   R1, #0 \n"
 404 "    MOVNE   R0, R5 \n"
 405 "    BLNE    _PostLogicalEventToUI \n"
 406 "    BL      sub_FF870570_my \n"  // --> Patched. Old value = 0xFF870570.
 407 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 408 "    CMP     R4, #0 \n"
 409 "    MOVEQ   R0, R5 \n"
 410 "    LDMEQFD SP!, {R4-R6,LR} \n"
 411 "    MOVEQ   R1, #0 \n"
 412 "    BEQ     _PostLogicalEventToUI \n"
 413 "    LDMFD   SP!, {R4-R6,PC} \n"
 414 );
 415 }
 416 
 417 /*************************************************************/
 418 //** sub_FF870570_my @ 0xFF870570 - 0xFF870578, length=3
 419 void __attribute__((naked,noinline)) sub_FF870570_my() {
 420 asm volatile (
 421 "    STMFD   SP!, {R4,LR} \n"
 422 "    MOV     R0, #3 \n"
 423 "    BL      sub_FF8533C8_my \n"  // --> Patched. Old value = 0xFF8533C8.
 424 "    LDR     PC, =0xFF87057C \n"  // Continue in firmware
 425 );
 426 }
 427 
 428 /*************************************************************/
 429 //** sub_FF8533C8_my @ 0xFF8533C8 - 0xFF85341C, length=22
 430 void __attribute__((naked,noinline)) sub_FF8533C8_my() {
 431 asm volatile (
 432 "    STMFD   SP!, {R4-R8,LR} \n"
 433 "    MOV     R6, R0 \n"
 434 "    BL      sub_FF853330 \n"
 435 "    LDR     R1, =0x11548 \n"
 436 "    MOV     R5, R0 \n"
 437 "    ADD     R4, R1, R0, LSL#7 \n"
 438 "    LDR     R0, [R4, #0x70] \n"
 439 "    CMP     R0, #4 \n"
 440 "    LDREQ   R1, =0x6D8 \n"
 441 "    LDREQ   R0, =0xFF852E54 /*'Mounter.c'*/ \n"
 442 "    BLEQ    _DebugAssert \n"
 443 "    MOV     R1, R6 \n"
 444 "    MOV     R0, R5 \n"
 445 "    BL      sub_FF852D9C \n"
 446 "    LDR     R0, [R4, #0x38] \n"
 447 "    BL      sub_FF8538F4 \n"
 448 "    CMP     R0, #0 \n"
 449 "    STREQ   R0, [R4, #0x70] \n"
 450 "    MOV     R0, R5 \n"
 451 "    BL      sub_FF852E74 \n"
 452 "    MOV     R0, R5 \n"
 453 "    BL      sub_FF853168_my \n"  // --> Patched. Old value = 0xFF853168.
 454 "    LDR     PC, =0xFF853420 \n"  // Continue in firmware
 455 );
 456 }
 457 
 458 /*************************************************************/
 459 //** sub_FF853168_my @ 0xFF853168 - 0xFF853190, length=11
 460 void __attribute__((naked,noinline)) sub_FF853168_my() {
 461 asm volatile (
 462 "    STMFD   SP!, {R4-R6,LR} \n"
 463 "    MOV     R5, R0 \n"
 464 "    LDR     R0, =0x11548 \n"
 465 "    ADD     R4, R0, R5, LSL#7 \n"
 466 "    LDR     R0, [R4, #0x70] \n"
 467 "    TST     R0, #2 \n"
 468 "    MOVNE   R0, #1 \n"
 469 "    LDMNEFD SP!, {R4-R6,PC} \n"
 470 "    LDR     R0, [R4, #0x38] \n"
 471 "    MOV     R1, R5 \n"
 472 "    BL      sub_FF852EF8_my \n"  // --> Patched. Old value = 0xFF852EF8.
 473 "    LDR     PC, =0xFF853194 \n"  // Continue in firmware
 474 );
 475 }
 476 
 477 /*************************************************************/
 478 //** sub_FF852EF8_my @ 0xFF852EF8 - 0xFF853060, length=91
 479 void __attribute__((naked,noinline)) sub_FF852EF8_my() {
 480 asm volatile (
 481 "    STMFD   SP!, {R4-R8,LR} \n"
 482 "    MOV     R8, R0 \n"
 483 "    LDR     R0, =0x11548 \n"
 484 "    MOV     R7, #0 \n"
 485 "    ADD     R5, R0, R1, LSL#7 \n"
 486 "    LDR     R0, [R5, #0x3C] \n"
 487 "    MOV     R6, #0 \n"
 488 "    CMP     R0, #7 \n"
 489 "    ADDLS   PC, PC, R0, LSL#2 \n"
 490 "    B       loc_FF853048 \n"
 491 "    B       loc_FF852F58 \n"
 492 "    B       loc_FF852F40 \n"
 493 "    B       loc_FF852F40 \n"
 494 "    B       loc_FF852F40 \n"
 495 "    B       loc_FF852F40 \n"
 496 "    B       loc_FF853040 \n"
 497 "    B       loc_FF852F40 \n"
 498 "    B       loc_FF852F40 \n"
 499 
 500 "loc_FF852F40:\n"
 501 "    MOV     R2, #0 \n"
 502 "    MOV     R1, #0x200 \n"
 503 "    MOV     R0, #2 \n"
 504 "    BL      sub_FF86A63C /*_exmem_ualloc*/ \n"
 505 "    MOVS    R4, R0 \n"
 506 "    BNE     loc_FF852F60 \n"
 507 
 508 "loc_FF852F58:\n"
 509 "    MOV     R0, #0 \n"
 510 "    LDMFD   SP!, {R4-R8,PC} \n"
 511 
 512 "loc_FF852F60:\n"
 513 "    LDR     R12, [R5, #0x4C] \n"
 514 "    MOV     R3, R4 \n"
 515 "    MOV     R2, #1 \n"
 516 "    MOV     R1, #0 \n"
 517 "    MOV     R0, R8 \n"
 518 "    BLX     R12 \n"
 519 "    CMP     R0, #1 \n"
 520 "    BNE     loc_FF852F8C \n"
 521 "    MOV     R0, #2 \n"
 522 "    BL      sub_FF86A788 /*_exmem_ufree*/ \n"
 523 "    B       loc_FF852F58 \n"
 524 
 525 "loc_FF852F8C:\n"
 526 "    LDR     R1, [R5, #0x68] \n"
 527 "    MOV     R0, R8 \n"
 528 "    BLX     R1 \n"
 529 
 530 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 531 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 532 
 533 // Start of DataGhost's FAT32 autodetection code
 534 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 535 // According to the code below, we can use R1, R2, R3 and R12.
 536 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 537 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 538 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 539 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 540 "    MOV     R1, #1\n"              // Note the current partition number
 541 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 542 "dg_sd_fat32:\n"
 543 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 544 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 545 "    ADD     R12, R12, #0x10\n"     // Second partition
 546 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 547 "dg_sd_fat32_enter:\n"
 548 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 549 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 550 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 551 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 552 "    CMPNE   R3, #0x7\n"            // exFat?
 553 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 554 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 555 "    CMPNE   R2, #0x80\n"
 556 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 557                                     // This partition is valid, it's the first one, bingo!
 558 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 559 
 560 "dg_sd_fat32_end:\n"
 561 // End of DataGhost's FAT32 autodetection code
 562 
 563 "    LDRB    R1, [R4, #0x1C9] \n"
 564 "    LDRB    R3, [R4, #0x1C8] \n"
 565 "    LDRB    R12, [R4, #0x1CC] \n"
 566 "    MOV     R1, R1, LSL#24 \n"
 567 "    ORR     R1, R1, R3, LSL#16 \n"
 568 "    LDRB    R3, [R4, #0x1C7] \n"
 569 "    LDRB    R2, [R4, #0x1BE] \n"
 570 //"  LDRB    LR, [R4, #0x1FF] \n"  // replaced below
 571 "    ORR     R1, R1, R3, LSL#8 \n"
 572 "    LDRB    R3, [R4, #0x1C6] \n"
 573 "    CMP     R2, #0 \n"
 574 "    CMPNE   R2, #0x80 \n"
 575 "    ORR     R1, R1, R3 \n"
 576 "    LDRB    R3, [R4, #0x1CD] \n"
 577 "    MOV     R3, R3, LSL#24 \n"
 578 "    ORR     R3, R3, R12, LSL#16 \n"
 579 "    LDRB    R12, [R4, #0x1CB] \n"
 580 "    ORR     R3, R3, R12, LSL#8 \n"
 581 "    LDRB    R12, [R4, #0x1CA] \n"
 582 "    ORR     R3, R3, R12 \n"
 583 //"  LDRB    R12, [R4, #0x1FE] \n"  // replaced below
 584 "    LDRB    R12, [LR,#0x1FE]\n"    // replace instructions above - First MBR signature byte (0x55), LR is original offset.
 585 "    LDRB    LR, [LR,#0x1FF]\n"     // replace instructions above - Last MBR signature byte (0xAA), LR is original offset.
 586 "    MOV     R4, #0 \n"
 587 "    BNE     loc_FF853018 \n"
 588 "    CMP     R0, R1 \n"
 589 "    BCC     loc_FF853018 \n"
 590 "    ADD     R2, R1, R3 \n"
 591 "    CMP     R2, R0 \n"
 592 "    CMPLS   R12, #0x55 \n"
 593 "    CMPEQ   LR, #0xAA \n"
 594 "    MOVEQ   R7, R1 \n"
 595 "    MOVEQ   R6, R3 \n"
 596 "    MOVEQ   R4, #1 \n"
 597 
 598 "loc_FF853018:\n"
 599 "    MOV     R0, #2 \n"
 600 "    BL      sub_FF86A788 /*_exmem_ufree*/ \n"
 601 "    CMP     R4, #0 \n"
 602 "    BNE     loc_FF853054 \n"
 603 "    LDR     R1, [R5, #0x68] \n"
 604 "    MOV     R7, #0 \n"
 605 "    MOV     R0, R8 \n"
 606 "    BLX     R1 \n"
 607 "    MOV     R6, R0 \n"
 608 "    B       loc_FF853054 \n"
 609 
 610 "loc_FF853040:\n"
 611 "    MOV     R6, #0x40 \n"
 612 "    B       loc_FF853054 \n"
 613 
 614 "loc_FF853048:\n"
 615 "    LDR     R1, =0x5C9 \n"
 616 "    LDR     R0, =0xFF852E54 /*'Mounter.c'*/ \n"
 617 "    BL      _DebugAssert \n"
 618 
 619 "loc_FF853054:\n"
 620 "    STR     R7, [R5, #0x44]! \n"
 621 "    MOV     R0, #1 \n"
 622 "    STR     R6, [R5, #4] \n"
 623 "    LDMFD   SP!, {R4-R8,PC} \n"
 624 );
 625 }
 626 
 627 /*************************************************************/
 628 //** JogDial_task_my @ 0xFF84405C - 0xFF844154, length=63
 629 void __attribute__((naked,noinline)) JogDial_task_my() {
 630 asm volatile (
 631 "    STMFD   SP!, {R3-R11,LR} \n"
 632 "    BL      sub_FF84420C \n"
 633 "    LDR     R11, =0x80000B01 \n"
 634 "    LDR     R8, =0xFFAF1394 \n"
 635 "    LDR     R7, =0xC0240000 \n"
 636 "    LDR     R6, =0x22DC \n"
 637 "    MOV     R9, #1 \n"
 638 "    MOV     R10, #0 \n"
 639 
 640 "loc_FF84407C:\n"
 641 "    LDR     R3, =0x1BB \n"
 642 "    LDR     R0, [R6, #0xC] \n"
 643 "    LDR     R2, =0xFF8442B8 /*'JogDial.c'*/ \n"
 644 "    MOV     R1, #0 \n"
 645 "    BL      sub_FF8272D0 /*_TakeSemaphoreStrictly*/ \n"
 646 "    MOV     R0, #0x28 \n"
 647 "    BL      _SleepTask \n"
 648 //------------------  added code ---------------------
 649 "labelA:\n"
 650 "    LDR     R0, =jogdial_stopped\n"
 651 "    LDR     R0, [R0]\n"
 652 "    CMP     R0, #1\n"
 653 "    BNE     labelB\n"
 654 "    MOV     R0, #40\n"
 655 "    BL      _SleepTask\n"
 656 "    B       labelA\n"
 657 "labelB:\n"
 658 //------------------  original code ------------------
 659 "    LDR     R0, [R7, #0x104] \n"
 660 "    MOV     R0, R0, ASR#16 \n"
 661 "    STRH    R0, [R6] \n"
 662 "    LDRSH   R2, [R6, #2] \n"
 663 "    SUB     R1, R0, R2 \n"
 664 "    CMP     R1, #0 \n"
 665 "    BEQ     loc_FF844140 \n"
 666 "    MOV     R5, R1 \n"
 667 "    RSBLT   R5, R5, #0 \n"
 668 "    MOVLE   R4, #0 \n"
 669 "    MOVGT   R4, #1 \n"
 670 "    CMP     R5, #0xFF \n"
 671 "    BLS     loc_FF8440F4 \n"
 672 "    CMP     R1, #0 \n"
 673 "    RSBLE   R1, R2, #0xFF \n"
 674 "    ADDLE   R1, R1, #0x7F00 \n"
 675 "    ADDLE   R0, R1, R0 \n"
 676 "    RSBGT   R0, R0, #0xFF \n"
 677 "    ADDGT   R0, R0, #0x7F00 \n"
 678 "    ADDGT   R0, R0, R2 \n"
 679 "    ADD     R5, R0, #0x8000 \n"
 680 "    ADD     R5, R5, #1 \n"
 681 "    EOR     R4, R4, #1 \n"
 682 
 683 "loc_FF8440F4:\n"
 684 "    LDR     R0, [R6, #0x14] \n"
 685 "    CMP     R0, #0 \n"
 686 "    BEQ     loc_FF844138 \n"
 687 "    LDR     R0, [R6, #0x1C] \n"
 688 "    CMP     R0, #0 \n"
 689 "    BEQ     loc_FF844120 \n"
 690 "    LDR     R1, [R8, R4, LSL#2] \n"
 691 "    CMP     R1, R0 \n"
 692 "    BEQ     loc_FF844128 \n"
 693 "    LDR     R0, =0xB01 \n"
 694 "    BL      sub_FF877374 \n"
 695 
 696 "loc_FF844120:\n"
 697 "    MOV     R0, R11 \n"
 698 "    BL      sub_FF877374 \n"
 699 
 700 "loc_FF844128:\n"
 701 "    LDR     R0, [R8, R4, LSL#2] \n"
 702 "    MOV     R1, R5 \n"
 703 "    STR     R0, [R6, #0x1C] \n"
 704 "    BL      sub_FF8772A4 \n"
 705 
 706 "loc_FF844138:\n"
 707 "    LDRH    R0, [R6] \n"
 708 "    STRH    R0, [R6, #2] \n"
 709 
 710 "loc_FF844140:\n"
 711 "    STR     R10, [R7, #0x100] \n"
 712 "    STR     R9, [R7, #0x108] \n"
 713 "    LDR     R0, [R6, #0x10] \n"
 714 "    CMP     R0, #0 \n"
 715 "    BLNE    _SleepTask \n"
 716 "    B       loc_FF84407C \n"
 717 );
 718 }

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