This source file includes following definitions.
- change_video_tables
- set_quality
- movie_record_task
- sub_FF96916C_my
- sub_FFAABE5C_my
1
2
3
4 #include "conf.h"
5
6 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
7
8 void set_quality(int *x){
9 if (conf.video_mode) *x=12-((conf.video_quality-1)*(12+17)/(99-1));
10 }
11
12
13
14 void __attribute__((naked,noinline)) movie_record_task() {
15 asm volatile (
16 " STMFD SP!, {R2-R10,LR} \n"
17 " LDR R6, =0xFF969014 \n"
18 " LDR R7, =0xFF96950C \n"
19 " LDR R4, =0x66E0 \n"
20 " LDR R9, =0x67F \n"
21 " LDR R10, =0x2710 \n"
22 " MOV R8, #1 \n"
23 " MOV R5, #0 \n"
24
25 "loc_FF969B04:\n"
26 " LDR R0, [R4, #0x24] \n"
27 " MOV R2, #0 \n"
28 " ADD R1, SP, #4 \n"
29 " BL sub_FF839B84 /*_ReceiveMessageQueue*/ \n"
30 " LDR R0, [R4, #0x2C] \n"
31 " CMP R0, #0 \n"
32 " LDRNE R0, [R4, #0xC] \n"
33 " CMPNE R0, #2 \n"
34 " LDRNE R0, [R4, #0x44] \n"
35 " CMPNE R0, #6 \n"
36 " BNE loc_FF969C28 \n"
37 " LDR R0, [SP, #4] \n"
38 " LDR R1, [R0] \n"
39 " SUB R1, R1, #2 \n"
40 " CMP R1, #0xB \n"
41 " ADDCC PC, PC, R1, LSL#2 \n"
42 " B loc_FF969C28 \n"
43 " B loc_FF969BD8 \n"
44 " B loc_FF969BFC \n"
45 " B loc_FF969C0C \n"
46 " B loc_FF969C14 \n"
47 " B loc_FF969BE0 \n"
48 " B loc_FF969C1C \n"
49 " B loc_FF969BEC \n"
50 " B loc_FF969C28 \n"
51 " B loc_FF969C24 \n"
52 " B loc_FF969BA4 \n"
53 " B loc_FF969B74 \n"
54
55 "loc_FF969B74:\n"
56 " STR R5, [R4, #0x40] \n"
57 " STR R5, [R4, #0x30] \n"
58 " STR R5, [R4, #0x34] \n"
59 " STRH R5, [R4, #6] \n"
60 " STR R6, [R4, #0xB4] \n"
61 " STR R7, [R4, #0xCC] \n"
62 " LDR R0, [R4, #0xC] \n"
63 " ADD R0, R0, #1 \n"
64 " STR R0, [R4, #0xC] \n"
65 " MOV R0, #6 \n"
66 " STR R0, [R4, #0x44] \n"
67 " B loc_FF969BC4 \n"
68
69 "loc_FF969BA4:\n"
70 " STR R5, [R4, #0x40] \n"
71 " STR R5, [R4, #0x30] \n"
72 " STR R6, [R4, #0xB4] \n"
73 " STR R7, [R4, #0xCC] \n"
74 " LDR R0, [R4, #0xC] \n"
75 " ADD R0, R0, #1 \n"
76 " STR R0, [R4, #0xC] \n"
77 " STR R8, [R4, #0x44] \n"
78
79 "loc_FF969BC4:\n"
80 " LDR R2, =0xFF968830 \n"
81 " LDR R1, =0xACE28 \n"
82 " LDR R0, =0xFF968944 \n"
83 " BL sub_FF852C24 \n"
84 " B loc_FF969C28 \n"
85
86 "loc_FF969BD8:\n"
87 " BL unlock_optical_zoom\n"
88 );
89 if (conf.ext_video_time == 1)
90 {
91 asm volatile (
92 " BL sub_FF96916C_my \n"
93 );
94 }
95 else
96 {
97 asm volatile (
98 " BL sub_FF96916C \n"
99 );
100 }
101 asm volatile (
102 " B loc_FF969C28 \n"
103
104 "loc_FF969BE0:\n"
105 " LDR R1, [R4, #0xCC] \n"
106 " BLX R1 \n"
107 " LDR R0, =video_compression_rate\n"
108 " BL set_quality\n"
109 " BL mute_on_zoom\n"
110 " B loc_FF969C28 \n"
111
112 "loc_FF969BEC:\n"
113 " LDR R1, [R0, #0x18] \n"
114 " LDR R0, [R0, #4] \n"
115 " BL sub_FFAAC964 \n"
116 " B loc_FF969C28 \n"
117
118 "loc_FF969BFC:\n"
119 " LDR R0, [R4, #0x44] \n"
120 " CMP R0, #5 \n"
121 " STRNE R8, [R4, #0x34] \n"
122 " B loc_FF969C28 \n"
123
124 "loc_FF969C0C:\n"
125 " BL sub_FF968CD4 \n"
126 " B loc_FF969C28 \n"
127
128 "loc_FF969C14:\n"
129 " BL sub_FF968990 \n"
130 " B loc_FF969C28 \n"
131
132 "loc_FF969C1C:\n"
133 " BL sub_FF9687BC \n"
134 " B loc_FF969C28 \n"
135
136 "loc_FF969C24:\n"
137 " BL sub_FF96A068 \n"
138
139 "loc_FF969C28:\n"
140 " LDR R1, [SP, #4] \n"
141 " LDR R3, =0xFF968604 /*'MovieRecorder.c'*/ \n"
142 " STR R5, [R1] \n"
143 " STR R9, [SP] \n"
144 " LDR R0, [R4, #0x28] \n"
145 " MOV R2, R10 \n"
146 " BL sub_FF83A4FC /*_PostMessageQueueStrictly*/ \n"
147 " B loc_FF969B04 \n"
148 );
149 }
150
151
152
153 void __attribute__((naked,noinline)) sub_FF96916C_my() {
154 asm volatile (
155 " STMFD SP!, {R2-R8,LR} \n"
156 " LDR R5, =0x66E0 \n"
157 " MOV R0, #0 \n"
158 " STR R0, [R5, #0x34] \n"
159 " STR R0, [R5, #0x38] \n"
160 " MOV R0, R5 \n"
161 " LDR R0, [R0, #0x5C] \n"
162 " LDRH R1, [R5, #6] \n"
163 " MOV R2, #0x3E8 \n"
164 " MUL R0, R2, R0 \n"
165 " CMP R1, #0 \n"
166 " BNE loc_FF9691A8 \n"
167
168 "loc_FF96919C:\n"
169 " MOV R1, #0x3E8 \n"
170 " BL sub_FFB585C0 /*__divmod_unsigned_int*/ \n"
171 " B loc_FF9691B4 \n"
172
173 "loc_FF9691A8:\n"
174 " CMP R1, #3 \n"
175 " BNE loc_FF96919C \n"
176 " MOV R0, #1 \n"
177
178 "loc_FF9691B4:\n"
179 " LDR R4, =0xACE5C \n"
180 " STR R0, [R5, #0x48] \n"
181 " LDR R0, [R4, #8] \n"
182 " MOV R6, #2 \n"
183 " CMP R0, #0 \n"
184 " BEQ loc_FF969220 \n"
185 " LDR R0, [R5, #0x58] \n"
186 " MOV R1, #4 \n"
187 " CMP R0, #0x18 \n"
188 " BEQ loc_FF969318 \n"
189 " BGT loc_FF9691FC \n"
190 " CMP R0, #0xA \n"
191 " CMPNE R0, #0xF \n"
192 " STREQ R6, [R4, #0x14] \n"
193 " BEQ loc_FF969220 \n"
194 " CMP R0, #0x14 \n"
195 " BNE loc_FF969214 \n"
196 " B loc_FF969318 \n"
197
198 "loc_FF9691FC:\n"
199 " CMP R0, #0x1E \n"
200 " BEQ loc_FF969318 \n"
201 " CMP R0, #0x3C \n"
202 " MOVEQ R0, #8 \n"
203 " STREQ R0, [R4, #0x14] \n"
204 " BEQ loc_FF969220 \n"
205
206 "loc_FF969214:\n"
207 " LDR R1, =0x777 \n"
208 " LDR R0, =0xFF968604 /*'MovieRecorder.c'*/ \n"
209 " BL _DebugAssert \n"
210
211 "loc_FF969220:\n"
212 " LDR R2, =0x66E2 \n"
213 " LDR R0, [R5, #0x94] \n"
214 " MOV R3, #2 \n"
215 " MOV R1, #0xAA \n"
216 " BL sub_FF88D330 \n"
217 " LDR R2, =0x66E4 \n"
218 " LDR R0, [R5, #0x94] \n"
219 " MOV R3, #2 \n"
220 " MOV R1, #0xA9 \n"
221 " BL sub_FF88D330 \n"
222 " LDR R2, =0x6730 \n"
223 " LDR R0, [R5, #0x94] \n"
224 " MOV R3, #4 \n"
225 " MOV R1, #0xA2 \n"
226 " BL sub_FF88D330 \n"
227 " LDR R2, =0x6734 \n"
228 " LDR R0, [R5, #0x94] \n"
229 " MOV R3, #4 \n"
230 " MOV R1, #0xA3 \n"
231 " BL sub_FF88D330 \n"
232 " LDR R2, =0x67B8 \n"
233 " MOV R1, #0 \n"
234 " MOV R0, #0xD \n"
235 " BL _exmem_ualloc \n"
236 " LDR R0, [R5, #0x4C] \n"
237 " LDR R1, =0x67B8 \n"
238 " CMP R0, #2 \n"
239 " CMPNE R0, #3 \n"
240 " LDREQ R0, =0x42546000 \n"
241 " LDR R3, =0xFF969138 \n"
242 " STREQ R0, [R1] \n"
243 " LDRNE R0, [R1] \n"
244 " LDR R1, [R1, #4] \n"
245 " STR R3, [SP] \n"
246 " LDR R3, =0xACE5C \n"
247 " SUB R2, R3, #0x18 \n"
248 " BL sub_FFAABE5C_my \n"
249 " LDR R3, [R5, #0x94] \n"
250 " STR R3, [SP] \n"
251 " LDR R0, [R5, #0x90] \n"
252 " LDRD R2, [R5, #0xD0] \n"
253 " BL sub_FFAAC1D0 \n"
254 " LDR R0, [R5, #0x64] \n"
255 " LDR R7, =0xACE44 \n"
256 " LDR R3, =0x6768 \n"
257 " AND R1, R0, #0xFF \n"
258 " LDR R0, [R7] \n"
259 " SUB R2, R3, #4 \n"
260 " BL sub_FFAAA950 \n"
261 " LDR R1, [R5, #0xC] \n"
262 " LDR R0, =0xFFB966B8 \n"
263 " CMP R1, #2 \n"
264 " LDR R1, [R5, #0x4C] \n"
265 " ADD R0, R0, R1, LSL#3 \n"
266 " LDR R1, [R7, #0xC] \n"
267 " LDR R0, [R0, R1, LSL#2] \n"
268 " BNE loc_FF969320 \n"
269 " BL sub_FFA683A4 \n"
270 " LDR R0, =0xFF9690F0 \n"
271 " MOV R1, #0 \n"
272 " BL sub_FFA688B8 \n"
273 " B loc_FF969330 \n"
274
275 "loc_FF969318:\n"
276 " STR R1, [R4, #0x14] \n"
277 " B loc_FF969220 \n"
278
279 "loc_FF969320:\n"
280 " BL sub_FFA66EF4 \n"
281 " LDR R0, =0xFF9690F0 \n"
282 " MOV R1, #0 \n"
283 " BL sub_FFA67630 \n"
284
285 "loc_FF969330:\n"
286 " LDR R0, [R4, #8] \n"
287 " CMP R0, #0 \n"
288 " BEQ loc_FF969364 \n"
289 " ADD R0, SP, #4 \n"
290 " BL sub_FFAAC7E0 \n"
291 " LDR R1, [R4, #0xC] \n"
292 " LDR R0, [SP, #4] \n"
293 " BL sub_FF86126C \n"
294 " ADD R0, SP, #4 \n"
295 " BL sub_FFAAC7E0 \n"
296 " LDR R1, [R4, #0xC] \n"
297 " LDR R0, [SP, #4] \n"
298 " BL sub_FF86126C \n"
299
300 "loc_FF969364:\n"
301 " LDR R0, =0xFF9690A8 \n"
302 " STR R6, [R5, #0x44]! \n"
303 " STR R0, [R5, #0x70] \n"
304 " LDMFD SP!, {R2-R8,PC} \n"
305 );
306 }
307
308
309
310 void __attribute__((naked,noinline)) sub_FFAABE5C_my() {
311 asm volatile (
312 " STMFD SP!, {R4-R12,LR} \n"
313 " MOV R8, R0 \n"
314 " LDR R0, [R2, #0x10] \n"
315 " MOV R10, R1 \n"
316 " CMP R0, #0 \n"
317 " LDR R9, [SP, #0x28] \n"
318 " LDREQ R1, =0x31E \n"
319 " LDREQ R0, =0xFFAAB454 /*'MovWriter.c'*/ \n"
320 " MOV R5, #0 \n"
321 " MOV R4, R2 \n"
322 " MOV R7, R3 \n"
323 " MOV R11, R5 \n"
324 " BLEQ _DebugAssert \n"
325 " LDR R6, =0xB7C8 \n"
326 " LDR R0, [R4] \n"
327 " LDR R1, =0x7530 \n"
328 " STR R0, [R6, #0xA0] \n"
329 " LDR R0, [R4, #4] \n"
330 " MOV R2, #0x1E \n"
331 " STR R0, [R6, #0xA4] \n"
332 " LDR R0, [R4, #0x10] \n"
333 " STR R0, [R6, #0xB0] \n"
334 " LDR R0, [R4, #8] \n"
335 " CMP R0, #8 \n"
336 " LDREQ R11, =0x1770 \n"
337 " BEQ loc_FFAABF08 \n"
338 " BGT loc_FFAABEF0 \n"
339 " CMP R0, #0 \n"
340 " MOVEQ R11, R1 \n"
341 " BEQ loc_FFAABF08 \n"
342 " CMP R0, #1 \n"
343 " LDREQ R11, =0x5DC0 \n"
344 " MOVEQ R0, #0x18 \n"
345 " STREQ R0, [R6, #0xA8] \n"
346 " STREQ R11, [R6, #0xFC] \n"
347 " BEQ loc_FFAABF20 \n"
348 " B loc_FFAABF14 \n"
349
350 "loc_FFAABEF0:\n"
351 " CMP R0, #9 \n"
352 " LDREQ R11, =0xBB8 \n"
353 " BEQ loc_FFAABF08 \n"
354 " CMP R0, #0xA \n"
355 " BNE loc_FFAABF14 \n"
356 " LDR R11, =0x5DC \n"
357
358 "loc_FFAABF08:\n"
359 " STR R1, [R6, #0xFC] \n"
360 " STR R2, [R6, #0xA8] \n"
361 " B loc_FFAABF20 \n"
362
363 "loc_FFAABF14:\n"
364 " LDR R1, =0x34F \n"
365 " LDR R0, =0xFFAAB454 /*'MovWriter.c'*/ \n"
366 " BL _DebugAssert \n"
367
368 "loc_FFAABF20:\n"
369 " LDR R0, [R6, #0xA8] \n"
370 " LDR R1, =0x383F \n"
371 " MOV R0, R0, LSR#1 \n"
372 " STR R0, [R6, #0xAC] \n"
373 " LDR R0, [R7] \n"
374 " STR R0, [R6, #0xB4] \n"
375 " LDRH R0, [R7, #0x10] \n"
376 " STR R0, [R6, #0xB8] \n"
377 " LDR R0, [R7, #4] \n"
378 " STRH R0, [R6, #2] \n"
379 " LDR R0, [R7, #8] \n"
380 " STRH R0, [R6, #4] \n"
381 " LDR R0, [R7, #0x14] \n"
382 " STR R0, [R6, #0xBC] \n"
383 " STR R9, [R6, #0xF8] \n"
384 " LDR R0, [R6, #0xA0] \n"
385 " CMP R0, #0x140 \n"
386 " MOVEQ R0, #0x20000 \n"
387 " MOVEQ R5, #1 \n"
388 " STREQ R0, [R6, #0x80] \n"
389 " BEQ loc_FFAAC06C \n"
390 " CMP R0, #0x280 \n"
391 " BEQ loc_FFAAC060 \n"
392 " CMP R0, #0x500 \n"
393 " LDREQ R0, =0x11DA50 \n"
394 " MOVEQ R5, #4 \n"
395 " STREQ R0, [R6, #0x80] \n"
396 " LDREQ R0, =0x1C1F \n"
397 " STREQ R0, [R6, #0x4C] \n"
398 " BEQ loc_FFAABFA4 \n"
399 " LDR R1, =0x377 \n"
400 " LDR R0, =0xFFAAB454 /*'MovWriter.c'*/ \n"
401 " BL _DebugAssert \n"
402
403 "loc_FFAABFA4:\n"
404 " LDR R9, [R6, #0x4C] \n"
405 " LDR R1, =0x138D \n"
406 " MUL R0, R9, R11 \n"
407 " BL sub_FFB585C0 /*__divmod_unsigned_int*/ \n"
408 " ADD R0, R0, #1 \n"
409 " ADD R0, R0, R0, LSL#2 \n"
410 " STR R0, [R6, #0x48] \n"
411 " LDR R7, [R7, #0xC] \n"
412 " LDR R1, [R4, #0xC] \n"
413 " MOV R2, R7, LSR#1 \n"
414 " STR R7, [R6, #0x68] \n"
415 " STR R2, [R6, #0x6C] \n"
416 " ADD R2, R8, #3 \n"
417 " BIC R2, R2, #3 \n"
418 " MOV R0, R0, LSL#2 \n"
419 " STR R2, [R6, #0xC4] \n"
420 " ADD R2, R2, R0 \n"
421 " STR R2, [R6, #0xC8] \n"
422 " LDRH R3, [R6, #4] \n"
423 " CMP R1, #0 \n"
424 " MOVNE R1, #1 \n"
425 " CMP R3, #0 \n"
426 " ADD R12, R8, R10 \n"
427 " ADD R0, R0, R2 \n"
428 " BEQ loc_FFAAC0D4 \n"
429 " STR R0, [R6, #0xCC] \n"
430 " ADD R0, R0, R9, LSL#3 \n"
431 " ADD R0, R0, #0x1F \n"
432 " BIC R0, R0, #0x1F \n"
433 " STR R0, [R6, #0xD0] \n"
434 " LDR R2, [R6, #0x80] \n"
435 " LDR R9, =0xFBDF4 \n"
436 " ADD R3, R0, R2 \n"
437 " SUB R0, R12, R3 \n"
438 " RSB R2, R7, #0 \n"
439 " ADD R0, R0, R2, LSL#1 \n"
440 " MOV R0, R0, LSR#15 \n"
441 " MOV R0, R0, LSL#15 \n"
442 " STR R3, [R6, #0xD4] \n"
443 " ADD R8, R3, R0 \n"
444 " STR R0, [R6, #0xE0] \n"
445 " STR R8, [R6, #0xD8] \n"
446 " LDR R11, =0xB918 \n"
447 " MOV R2, #0 \n"
448 " ADD R10, R9, #0x10 \n"
449 " STR R8, [R6, #0xDC] \n"
450 " B loc_FFAAC074 \n"
451
452 "loc_FFAAC060:\n"
453 " LDR R0, =0x7A760 \n"
454 " MOV R5, #2 \n"
455 " STR R0, [R6, #0x80] \n"
456
457 "loc_FFAAC06C:\n"
458 " STR R1, [R6, #0x4C] \n"
459 " B loc_FFAABFA4 \n"
460
461 "loc_FFAAC074:\n"
462 " MLA R0, R2, R7, R8 \n"
463 " ADD R12, R9, R2, LSL#3 \n"
464 " ADD R0, R0, #3 \n"
465 " BIC R0, R0, #3 \n"
466 " STR R0, [R11, R2, LSL#2] \n"
467 " MOV R0, #0 \n"
468 " ADD R6, R10, R2, LSL#3 \n"
469
470 "loc_FFAAC090:\n"
471 " STR R3, [R12, R0, LSL#2] \n"
472 " STR R3, [R6, R0, LSL#2] \n"
473 " ADD R0, R0, #1 \n"
474 " CMP R0, #2 \n"
475 " BLT loc_FFAAC090 \n"
476 " ADD R2, R2, #1 \n"
477 " CMP R2, #2 \n"
478 " BLT loc_FFAAC074 \n"
479 " LDRH R3, [R4, #0x14] \n"
480 " LDR R2, [R4, #8] \n"
481 " MOV R0, R5 \n"
482 " BL sub_FF8D1060 \n"
483 " LDR R1, =0xB7C8 \n"
484 " LDR R2, [R1, #0x68] \n"
485 " ADD R0, R0, R2 \n"
486 " STR R0, [R1, #0x60] \n"
487 " LDMFD SP!, {R4-R12,PC} \n"
488
489 "loc_FFAAC0D4:\n"
490 " ADD R0, R0, #0x1F \n"
491 " BIC R0, R0, #0x1F \n"
492 " STR R0, [R6, #0xD0] \n"
493 " LDR R2, [R6, #0x80] \n"
494 " ADD R0, R0, R2 \n"
495 " SUB R2, R12, R0 \n"
496 " MOV R2, R2, LSR#15 \n"
497 " MOV R2, R2, LSL#15 \n"
498 " STR R0, [R6, #0xD4] \n"
499 " ADD R0, R0, R2 \n"
500 " STR R2, [R6, #0xE0] \n"
501 " STR R0, [R6, #0xD8] \n"
502 " LDRH R3, [R4, #0x14] \n"
503 " LDR R2, [R4, #8] \n"
504 " MOV R0, R5 \n"
505 " BL sub_FF8D1060 \n"
506 " STR R0, [R6, #0x60] \n"
507 " LDMFD SP!, {R4-R12,PC} \n"
508 );
509 }