This source file includes following definitions.
- change_video_tables
- movie_record_task
- sub_FF949F50_my
- sub_FF94B7D0_my
- sub_FF94AB98_my
1 #include "conf.h"
2
3 int *video_quality = &conf.video_quality;
4 int *video_mode = &conf.video_mode;
5
6 long def_table1[9]={0x2000,0x38D,0x788,0x5800,0x9C5,0x14B8,0x10000,0x1C6A,0x3C45};
7 long def_table2[9]={0x1CCD,-0x2E1,-0x579,0x4F33,-0x7EB,-0xF0C,0xE666,-0x170A,-0x2BC6};
8
9 long table1[9], table2[9];
10
11 void change_video_tables(int a, int b){
12 int i;
13 for (i=0;i<9;i++) {table1[i]=(def_table1[i]*a)/b; table2[i]=(def_table2[i]*a)/b;}
14 }
15
16 long CompressionRateTable[]={0x60, 0x5D, 0x5A, 0x57, 0x54, 0x51, 0x4D, 0x48, 0x42, 0x3B, 0x32, 0x29, 0x22, 0x1D, 0x17, 0x14, 0x10, 0xE, 0xB, 9, 7, 6, 5, 4, 3, 2, 1};
17
18
19 void __attribute__((naked,noinline)) movie_record_task(){
20 asm volatile (
21 " STMFD SP!, {R4,LR} \n"
22 " SUB SP, SP, #4 \n"
23 " MOV R4, SP \n"
24 " B loc_FF9497E4 \n"
25 "loc_FF949734:\n"
26 " LDR R3, =0x740C0 \n"
27 " LDR R2, [R3] \n"
28 " CMP R2, #0 \n"
29 " BNE loc_FF9497D0 \n"
30 " SUB R3, R12, #1 \n"
31 " CMP R3, #0xA \n"
32 " LDRLS PC, [PC, R3, LSL #2] \n"
33 " B loc_FF9497D0 \n"
34 " .long loc_FF949780\n"
35 " .long loc_FF949788\n"
36 " .long loc_FF9497A0\n"
37 " .long loc_FF9497A8\n"
38 " .long loc_FF9497B0\n"
39 " .long loc_FF949790\n"
40 " .long loc_FF9497B8\n"
41 " .long loc_FF949798\n"
42 " .long loc_FF9497D0\n"
43 " .long loc_FF9497C8\n"
44 " .long loc_FF9497C0\n"
45 "loc_FF949780:\n"
46 " BL sub_FF949864 \n"
47 " B loc_FF9497CC \n"
48 "loc_FF949788:\n"
49 " BL unlock_optical_zoom\n"
50 " BL sub_FF949A98 \n"
51 " B loc_FF9497CC \n"
52 "loc_FF949790:\n"
53 " BL sub_FF949F50_my \n"
54 " B loc_FF9497CC \n"
55 "loc_FF949798:\n"
56 " BL sub_FF94A3A4 \n"
57 " B loc_FF9497CC \n"
58 "loc_FF9497A0:\n"
59 " BL sub_FF94A1C8 \n"
60 " B loc_FF9497CC \n"
61 "loc_FF9497A8:\n"
62 " BL sub_FF94A5B0 \n"
63 " B loc_FF9497CC \n"
64 "loc_FF9497B0:\n"
65 " BL sub_FF94A7C8 \n"
66 " B loc_FF9497CC \n"
67 "loc_FF9497B8:\n"
68 " BL sub_FF94A464 \n"
69 " B loc_FF9497CC \n"
70 "loc_FF9497C0:\n"
71 " BL sub_FF94A544 \n"
72 " B loc_FF9497CC \n"
73 "loc_FF9497C8:\n"
74 " BL sub_FF94A218 \n"
75 "loc_FF9497CC:\n"
76 " LDR R1, [SP] \n"
77 "loc_FF9497D0:\n"
78 " LDR R3, =0x73FF0 \n"
79 " MOV R2, #0 \n"
80 " STR R2, [R1] \n"
81 " LDR R0, [R3] \n"
82 " BL sub_FF8207A0 \n"
83 "loc_FF9497E4:\n"
84 " LDR R3, =0x73FEC \n"
85 " MOV R1, R4 \n"
86 " LDR R0, [R3] \n"
87 " MOV R2, #0 \n"
88 " BL sub_FF820388 \n"
89 " LDR R0, [SP] \n"
90 " LDR R12, [R0] \n"
91 " CMP R12, #0xC \n"
92 " MOV R1, R0 \n"
93 " BNE loc_FF949734 \n"
94 " LDR R3, =0x73FE4 \n"
95 " LDR R0, [R3] \n"
96 " BL sub_FF82115C \n"
97 " BL sub_FF821924 \n"
98 " ADD SP, SP, #4 \n"
99 " LDMFD SP!, {R4,PC} \n"
100 );
101 }
102
103
104 void __attribute__((naked,noinline)) sub_FF949F50_my( ) {
105 asm volatile (
106 " STMFD SP!, {R4-R11,LR} \n"
107 " LDR R5, =0x740DC \n"
108 " SUB SP, SP, #0x34 \n"
109 " LDR R3, [R5] \n"
110 " CMP R3, #3 \n"
111 " MOV R4, R0 \n"
112 " MOVEQ R3, #4 \n"
113 " STREQ R3, [R5] \n"
114 " LDR R3, =0x74184 \n"
115 " MOV LR, PC \n"
116 " LDR PC, [R3] \n"
117 " LDR R2, [R5] \n"
118 " CMP R2, #4 \n"
119 " BNE loc_FF94A0FC \n"
120 " ADD R0, SP, #0x30 \n"
121 " ADD R1, SP, #0x2C \n"
122 " ADD R2, SP, #0x28 \n"
123 " ADD R3, SP, #0x24 \n"
124 " BL sub_FF94B7D0_my \n"
125 " CMP R0, #0 \n"
126 " BNE loc_FF949FCC \n"
127 " LDR R3, =0x740C8 \n"
128 " LDR R2, [R3] \n"
129 " CMP R2, #1 \n"
130 " BNE loc_FF949FE0 \n"
131 " LDR R2, =0x74118 \n"
132 " LDR R1, =0x740F0 \n"
133 " LDR R12, [R2] \n"
134 " LDR R3, [R1] \n"
135 " CMP R12, R3 \n"
136 " BCC loc_FF949FE0 \n"
137 "loc_FF949FCC:\n"
138 " BL sub_FF94A140 \n"
139 " BL sub_FF94A374 \n"
140 " MOV R3, #5 \n"
141 " STR R3, [R5] \n"
142 " B loc_FF94A0FC \n"
143 "loc_FF949FE0:\n"
144 " LDR R12, =0x74120 \n"
145 " LDR R11, =0x7412C \n"
146 " LDMIB R4, {R0-R2} \n"
147 " LDR R10, [R12] \n"
148 " LDR R7, [R11] \n"
149 " LDR R4, [SP, #0x2C] \n"
150 " LDR R5, [SP, #0x28] \n"
151 " LDR R6, [SP, #0x24] \n"
152 " LDR R8, =0x740CC \n"
153 " LDR R3, [SP, #0x30] \n"
154 " ADD R12, SP, #0x20 \n"
155 " ADD LR, SP, #0x1C \n"
156 " MOV R9, #1 \n"
157 " STMEA SP, {R4-R6,R12} \n"
158 " STR R10, [SP, #0x10] \n"
159 " STR R7, [SP, #0x14] \n"
160 " STR LR, [SP, #0x18] \n"
161 " STR R9, [R8] \n"
162 " BL sub_FF897924 \n"
163 " LDR R3, =0x73FE4 \n"
164 " MOV R1, #0x3E8 \n"
165 " LDR R0, [R3] \n"
166 " BL sub_FF820F74 \n"
167 " CMP R0, #9 \n"
168 " BNE loc_FF94A054 \n"
169 " BL sub_FF94BF90 \n"
170 " LDR R3, =0x740DC \n"
171 " LDR R0, =0xFF949F38 \n"
172 " B loc_FF94A06C \n"
173 "loc_FF94A054:\n"
174 " LDR R5, [SP, #0x1C] \n"
175 " CMP R5, #0 \n"
176 " BEQ loc_FF94A078 \n"
177 " BL sub_FF94BF90 \n"
178 " LDR R3, =0x740DC \n"
179 " LDR R0, =0xFF949F44 \n"
180 "loc_FF94A06C:\n"
181 " STR R9, [R3] \n"
182 " BL sub_FF95FD24 \n"
183 " B loc_FF94A0FC \n"
184 "loc_FF94A078:\n"
185 " BL sub_FF897A88 \n"
186 " LDR R0, [SP, #0x30] \n"
187 " LDR R1, [SP, #0x20] \n"
188 " BL sub_FF94BCB4 \n"
189 " LDR R4, =0x74118 \n"
190 " LDR R3, [R4] \n"
191 " ADD R3, R3, #1 \n"
192 " LDR R0, [SP, #0x20] \n"
193 " MOV R1, R11 \n"
194 " STR R3, [R4] \n"
195 " MOV R2, R5 \n"
196 " BL sub_FF94AB98_my \n"
197 " LDR R3, =0x74104 \n"
198 " LDR R4, [R4] \n"
199 " LDR R1, [R3] \n"
200 " MOV R0, R4 \n"
201 " BL sub_FFAF8880 \n"
202 " CMP R0, #0 \n"
203 " BEQ loc_FF94A0D8 \n"
204 " LDR R6, =0x740D0 \n"
205 " LDR R3, [R6] \n"
206 " CMP R3, #1 \n"
207 " BNE loc_FF94A0F0 \n"
208 " B loc_FF94A0DC \n"
209 "loc_FF94A0D8:\n"
210 " LDR R6, =0x740D0 \n"
211 "loc_FF94A0DC:\n"
212 " MOV R0, R4 \n"
213 " LDR R3, =0x74160 \n"
214 " MOV LR, PC \n"
215 " LDR PC, [R3] \n"
216 " STR R5, [R6] \n"
217 "loc_FF94A0F0:\n"
218 " LDR R2, =0x740CC \n"
219 " MOV R3, #0 \n"
220 " STR R3, [R2] \n"
221 "loc_FF94A0FC:\n"
222 " ADD SP, SP, #0x34 \n"
223 " LDMFD SP!, {R4-R11,PC} \n"
224 );
225 }
226
227
228 void __attribute__((naked,noinline)) sub_FF94B7D0_my( ) {
229 asm volatile (
230 " STMFD SP!, {R4-R11,LR} \n"
231 " LDR R5, =0x7442C \n"
232 " SUB SP, SP, #0x14 \n"
233 " LDR LR, [R5] \n"
234 " LDR R12, =0x74444 \n"
235 " ADD LR, LR, #1 \n"
236 " LDR R4, [R12] \n"
237 " STR LR, [R5] \n"
238 " LDR R12, =0x744C0 \n"
239 " STR R0, [SP, #0x10] \n"
240 " STR R1, [SP, #0xC] \n"
241 " STR R2, [SP, #8] \n"
242 " STR R3, [SP, #4] \n"
243 " CMP LR, R4 \n"
244 " LDR R11, [R12] \n"
245 " MOVHI R0, #0x80000001 \n"
246 " BHI loc_FF94BC68 \n"
247 " LDR R3, =0x744A8 \n"
248 " MOV R0, LR \n"
249 " LDR R1, [R3] \n"
250 " BL sub_FFAF8880 \n"
251 " CMP R0, #1 \n"
252 " BNE loc_FF94B9F0 \n"
253 " LDR R0, =0x744C8 \n"
254 " LDR R1, =0x74418 \n"
255 " LDR R3, [R0] \n"
256 " LDR R2, [R1] \n"
257 " CMP R3, R2 \n"
258 " LDREQ R3, =0x744C4 \n"
259 " LDREQ R5, [R3] \n"
260 " MOVNE R5, R2 \n"
261 " LDR R3, =0x7442C \n"
262 " LDR R2, =0x744A8 \n"
263 " LDR R0, [R3] \n"
264 " LDR R1, [R2] \n"
265 " BL sub_FFAF81F0 \n"
266 " LDR R3, =0x74420 \n"
267 " ADD R0, R0, #1 \n"
268 " AND R0, R0, #1 \n"
269 " STR R5, [R3, R0, LSL #2] \n"
270 " LDR R3, =0x74414 \n"
271 " LDR R2, [R3] \n"
272 " CMP R5, R2 \n"
273 " BHI loc_FF94B8A0 \n"
274 " LDR R4, =0x74464 \n"
275 " LDR R3, [R4] \n"
276 " ADD R3, R5, R3 \n"
277 " ADD R3, R3, #8 \n"
278 " CMP R2, R3 \n"
279 " BCS loc_FF94B8A4 \n"
280 "loc_FF94B898:\n"
281 " MOV R0, #0x80000003 \n"
282 " B loc_FF94BC68 \n"
283 "loc_FF94B8A0:\n"
284 " LDR R4, =0x74464 \n"
285 "loc_FF94B8A4:\n"
286 " LDR R3, [R4] \n"
287 " LDR R2, =0x744C8 \n"
288 " ADD R1, R5, R3 \n"
289 " LDR R3, [R2] \n"
290 " ADD R2, R1, #8 \n"
291 " CMP R2, R3 \n"
292 " BLS loc_FF94B8F0 \n"
293 " LDR R2, =0x744C4 \n"
294 " LDR R0, =0x74414 \n"
295 " RSB R3, R3, R1 \n"
296 " LDR R1, [R2] \n"
297 " ADD R3, R3, #8 \n"
298 " LDR R2, [R0] \n"
299 " ADD R1, R1, R3 \n"
300 " CMP R2, R1 \n"
301 " BCC loc_FF94B898 \n"
302 " LDR R3, =0x74418 \n"
303 " STR R1, [R3] \n"
304 " B loc_FF94B8F8 \n"
305 "loc_FF94B8F0:\n"
306 " LDR R3, =0x74418 \n"
307 " STR R2, [R3] \n"
308 "loc_FF94B8F8:\n"
309 " LDR R3, [R4] \n"
310 " LDR R12, =0x74478 \n"
311 " ADD R3, R3, #0x18 \n"
312 " LDR R2, [R12, #4] \n"
313 " MOV R0, R3 \n"
314 " MOV R1, #0 \n"
315 " CMP R1, R2 \n"
316 " BHI loc_FF94BB3C \n"
317 " BNE loc_FF94B928 \n"
318 " LDR R3, [R12] \n"
319 " CMP R0, R3 \n"
320 " BHI loc_FF94BB3C \n"
321 "loc_FF94B928:\n"
322 " LDR R4, [R4] \n"
323 " LDR LR, =0x74480 \n"
324 " STR R4, [SP] \n"
325 " LDR R12, =0x74478 \n"
326 " LDR R3, =0x7442C \n"
327 " LDMIA LR, {R7,R8} \n"
328 " LDMIA R12, {R5,R6} \n"
329 " LDR R10, [R3] \n"
330 " LDR R2, =0x744A8 \n"
331 " MOV R3, R4 \n"
332 " MOV R4, #0 \n"
333 " ADDS R7, R7, R3 \n"
334 " ADC R8, R8, R4 \n"
335 " LDR R9, [R2] \n"
336 " SUBS R5, R5, R3 \n"
337 " SBC R6, R6, R4 \n"
338 " MVN R2, #0 \n"
339 " MVN R1, #0x17 \n"
340 " ADDS R5, R5, R1 \n"
341 " MOV R4, #0 \n"
342 " MOV R3, #0x18 \n"
343 " ADC R6, R6, R2 \n"
344 " ADDS R7, R7, R3 \n"
345 " ADC R8, R8, R4 \n"
346 " STMIA R12, {R5,R6} \n"
347 " SUB R0, R10, #1 \n"
348 " MOV R1, R9 \n"
349 " STMIA LR, {R7,R8} \n"
350 " BL sub_FFAF81F0 \n"
351 " CMP R10, #1 \n"
352 " MLA R0, R9, R0, R0 \n"
353 " BEQ loc_FF94B9F0 \n"
354 " SUB R3, R0, #1 \n"
355 " MOV R3, R3, LSL #4 \n"
356 " ADD R4, R11, #0x10 \n"
357 " ADD R5, R11, #0x14 \n"
358 " LDR R1, [R5, R3] \n"
359 " LDR R2, [R4, R3] \n"
360 " LDR LR, =0x62773130 \n"
361 " ADD R2, R2, R1 \n"
362 " MOV R3, R0, LSL #4 \n"
363 " ADD R2, R2, #8 \n"
364 " MOV R0, #0 \n"
365 " ADD R12, R11, #0xC \n"
366 " ADD R1, R11, #8 \n"
367 " STR LR, [R1, R3] \n"
368 " STR R0, [R12, R3] \n"
369 " STR R2, [R4, R3] \n"
370 " LDR R0, [SP] \n"
371 " STR R0, [R5, R3] \n"
372 "loc_FF94B9F0:\n"
373 " LDR R2, =0x74418 \n"
374 " LDR R3, =0x744C8 \n"
375 " LDR R1, [R2] \n"
376 " LDR R0, [R3] \n"
377 " ADD R3, R1, #9 \n"
378 " CMP R3, R0 \n"
379 " BLS loc_FF94BA2C \n"
380 " LDR R2, =0x744C4 \n"
381 " LDR R3, [R2] \n"
382 " ADD R3, R3, R1 \n"
383 " RSB R3, R0, R3 \n"
384 " LDR R0, [SP, #0x10] \n"
385 " ADD R3, R3, #8 \n"
386 " STR R3, [R0] \n"
387 " B loc_FF94BA38 \n"
388 "loc_FF94BA2C:\n"
389 " ADD R3, R1, #8 \n"
390 " LDR R1, [SP, #0x10] \n"
391 " STR R3, [R1] \n"
392 "loc_FF94BA38:\n"
393 " LDR R2, [SP, #0x10] \n"
394 " LDR R1, =0x74474 \n"
395 " LDR R3, =0x744C8 \n"
396 " LDR R12, [R2] \n"
397 " LDR R2, [R1] \n"
398 " LDR R0, [R3] \n"
399 " ADD R3, R12, R2 \n"
400 " CMP R3, R0 \n"
401 " BLS loc_FF94BA8C \n"
402 " LDR R2, [SP, #0xC] \n"
403 " RSB R0, R12, R0 \n"
404 " STR R0, [R2] \n"
405 " LDR R2, =0x744C4 \n"
406 " LDR R3, [R1] \n"
407 " LDR R1, [R2] \n"
408 " RSB R3, R0, R3 \n"
409 " LDR R0, [SP, #8] \n"
410 " STR R1, [R0] \n"
411 " LDR R1, [SP, #4] \n"
412 " STR R3, [R1] \n"
413 " B loc_FF94BAA8 \n"
414 "loc_FF94BA8C:\n"
415 " LDR R0, [SP, #0xC] \n"
416 " STR R2, [R0] \n"
417 " LDR R1, [SP, #4] \n"
418 " MOV R3, #0 \n"
419 " STR R3, [R1] \n"
420 " LDR R2, [SP, #8] \n"
421 " STR R3, [R2] \n"
422 "loc_FF94BAA8:\n"
423 " LDR R0, =0x74418 \n"
424 " LDR R1, =0x74414 \n"
425 " LDR R3, [R0] \n"
426 " LDR R2, [R1] \n"
427 " CMP R3, R2 \n"
428 " BHI loc_FF94BAD4 \n"
429 " LDR R0, [SP, #0xC] \n"
430 " LDR R3, [R0] \n"
431 " ADD R3, R12, R3 \n"
432 " CMP R2, R3 \n"
433 " BCC loc_FF94B898 \n"
434 "loc_FF94BAD4:\n"
435 " LDR R1, [SP, #8] \n"
436 " LDR R2, [R1] \n"
437 " CMP R2, #0 \n"
438 " BEQ loc_FF94BB08 \n"
439 " LDR R3, =0x74414 \n"
440 " LDR R1, [R3] \n"
441 " CMP R2, R1 \n"
442 " BHI loc_FF94BB08 \n"
443 " LDR R0, [SP, #4] \n"
444 " LDR R3, [R0] \n"
445 " ADD R3, R2, R3 \n"
446 " CMP R1, R3 \n"
447 " BCC loc_FF94B898 \n"
448 "loc_FF94BB08:\n"
449 " LDR R3, =0x74474 \n"
450 " LDR R0, =0x74478 \n"
451 " LDR R2, [R3] \n"
452 " LDR R3, [R0, #4] \n"
453 " ADD R2, R2, #0x18 \n"
454 " MOV R1, R2 \n"
455 " MOV R2, #0 \n"
456 " CMP R2, R3 \n"
457 " BHI loc_FF94BB3C \n"
458 " BNE loc_FF94BB44 \n"
459 " LDR R3, [R0] \n"
460 " CMP R1, R3 \n"
461 " BLS loc_FF94BB44 \n"
462 "loc_FF94BB3C:\n"
463 " MOV R0, #0x80000005 \n"
464 " B loc_FF94BC68 \n"
465 "loc_FF94BB44:\n"
466 " LDR R1, =0x7445C \n"
467 " LDR R0, =0x744A8 \n"
468 " LDR R3, [R1] \n"
469 " LDR R2, [R0] \n"
470 " ADD R3, R3, R2, LSL #4 \n"
471 " ADD R3, R3, R3, LSL #2 \n"
472 " LDR R12, =0x74478 \n"
473 " MOV R3, R3, LSL #1 \n"
474 " ADD R3, R3, #0xA0 \n"
475 " LDR R2, [R12, #4] \n"
476 " MOV R0, R3 \n"
477 " MOV R1, #0 \n"
478 " CMP R1, R2 \n"
479 " BHI loc_FF94BB8C \n"
480 " BNE loc_FF94BBB0 \n"
481 " LDR R3, [R12] \n"
482 " CMP R0, R3 \n"
483 " BLS loc_FF94BBB0 \n"
484 "loc_FF94BB8C:\n"
485 " LDR R4, =0x74490 \n"
486 " LDR R1, [R4] \n"
487 " CMP R1, #0 \n"
488 " BNE loc_FF94BBB0 \n"
489 " MOV R0, #0x3140 \n"
490 " ADD R0, R0, #8 \n"
491 " BL sub_FF963F7C \n"
492 " MOV R3, #1 \n"
493 " STR R3, [R4] \n"
494 "loc_FF94BBB0:\n"
495 " LDR R1, =0x7445C \n"
496 " LDR R0, =0x744A8 \n"
497 " LDR R2, [R1] \n"
498 " LDR R3, [R0] \n"
499 " LDR R0, =0x74480 \n"
500 " ADD R2, R2, R3, LSL #4 \n"
501 " MVN R3, #0x9F \n"
502 " ADD R2, R2, R2, LSL #2 \n"
503 " ADD R3, R3, #0x40000000 \n"
504 " SUB R3, R3, R2, LSL #1 \n"
505 " LDR R1, [R0, #4] \n"
506 " MOV R4, R3 \n"
507 " MOV R5, #0 \n"
508 " CMP R1, R5 \n"
509 " BHI loc_FF94BBFC \n"
510 " BNE loc_FF94BC20 \n"
511 " LDR R3, [R0] \n"
512 " CMP R3, R4 \n"
513 " BLS loc_FF94BC20 \n"
514 "loc_FF94BBFC:\n"
515 " LDR R4, =0x74490 \n"
516 " LDR R1, [R4] \n"
517 " CMP R1, #0 \n"
518 " BNE loc_FF94BC20 \n"
519 " MOV R0, #0x3140 \n"
520 " ADD R0, R0, #8 \n"
521 " BL sub_FF963F7C \n"
522 " MOV R3, #1 \n"
523 " STR R3, [R4] \n"
524 "loc_FF94BC20:\n"
525 " LDR R3, =0x74480 \n"
526 " LDR R12, =0x74474 \n"
527 " LDMIA R3, {R1,R2} \n"
528 " LDR R0, [R12] \n"
529 " MOV R4, #0 \n"
530 " MOV R3, #0x18 \n"
531 " ADDS R1, R1, R0 \n"
532 " ADC R2, R2, #0 \n"
533 " ADDS R1, R1, R3 \n"
534 " ADC R2, R2, R4 \n"
535 " CMP R2, #0 \n"
536 " BHI loc_FF94BC5C \n"
537 " BNE loc_FF94BC64 \n"
538 " CMP R1, #0x40000000 \n"
539
540 " B loc_FF94BC64 \n"
541 "loc_FF94BC5C:\n"
542 " MOV R0, #0x80000007 \n"
543 " B loc_FF94BC68 \n"
544 "loc_FF94BC64:\n"
545 " MOV R0, #0 \n"
546 "loc_FF94BC68:\n"
547 " ADD SP, SP, #0x14 \n"
548 " LDMFD SP!, {R4-R11,PC} \n"
549 );
550 }
551
552
553 void __attribute__((naked,noinline)) sub_FF94AB98_my( ) {
554 asm volatile (
555 " CMP R2, #1 \n"
556 " STMFD SP!, {R4-R7,LR} \n"
557 " MOV R7, R0 \n"
558 " MOV R6, R1 \n"
559 " MOVEQ R3, #0x79 \n"
560 " STREQ R3, [R6] \n"
561 " LDMEQFD SP!, {R4-R7,PC} \n"
562 " LDR R12, =0x74190 \n"
563 " LDR R0, [R12] \n"
564 " LDR R3, =0x74198 \n"
565 " CMP R0, #0 \n"
566 " LDR R1, [R3] \n"
567 " BEQ loc_FF94ABE0 \n"
568 " LDR R2, =0x7419C \n"
569 " LDR R3, [R2] \n"
570 " CMP R3, #1 \n"
571 " BNE loc_FF94ABF4 \n"
572 " B loc_FF94ABE4 \n"
573 "loc_FF94ABE0:\n"
574 " LDR R2, =0x7419C \n"
575 "loc_FF94ABE4:\n"
576 " MOV R3, #0 \n"
577 " STR R3, [R2] \n"
578 " STR R7, [R12] \n"
579 " B loc_FF94ACA8 \n"
580 "loc_FF94ABF4:\n"
581 " LDR R3, =0x74194 \n"
582 " LDR R2, [R3] \n"
583 " LDR R5, =table1\n"
584 " MOV LR, R2, LSL #2 \n"
585 " LDR R3, [R5, LR] \n"
586 " LDR R4, =table2\n"
587 " RSB R12, R3, R0 \n"
588 " LDR R2, [R4, LR] \n"
589 " CMP R12, #0 \n"
590 " RSB R0, R2, R0 \n"
591 " BLE loc_FF94AC54 \n"
592 " ADD R3, R5, #0x14 \n"
593 " LDR R2, [R3, LR] \n"
594 " CMP R2, R12 \n"
595 " ADDGE R1, R1, #1 \n"
596 " BGE loc_FF94AC48 \n"
597 " ADD R3, R5, #0x28 \n"
598 " LDR R2, [R3, LR] \n"
599 " CMP R2, R12 \n"
600 " ADDGE R1, R1, #2 \n"
601 " ADDLT R1, R1, #3 \n"
602 "loc_FF94AC48:\n"
603 " CMP R1, #0x1a\n"
604 " MOVGE R1, #0x1a\n"
605 " B loc_FF94AC8C \n"
606 "loc_FF94AC54:\n"
607 " CMP R0, #0 \n"
608 " BGE loc_FF94AC8C \n"
609 " ADD R3, R4, #0x14 \n"
610 " LDR R2, [R3, LR] \n"
611 " CMP R2, R0 \n"
612 " SUBLE R1, R1, #1 \n"
613 " BLE loc_FF94AC84 \n"
614 " ADD R3, R4, #0x28 \n"
615 " LDR R2, [R3, LR] \n"
616 " CMP R2, R0 \n"
617 " SUBLE R1, R1, #2 \n"
618 " SUBGT R1, R1, #3 \n"
619 "loc_FF94AC84:\n"
620 " CMP R1, #0 \n"
621 " MOVLT R1, #0 \n"
622 "loc_FF94AC8C:\n"
623 " LDR R0, =0x74198 \n"
624 " LDR R3, [R0] \n"
625 " CMP R1, R3 \n"
626 " LDRNE R2, =0x7419C \n"
627 " MOVNE R3, #1 \n"
628 " STRNE R1, [R0] \n"
629 " STRNE R3, [R2] \n"
630 "loc_FF94ACA8:\n"
631 " LDR R3, =0x74198 \n"
632 " LDR R1, =video_mode\n"
633 " LDR R0, [R3] \n"
634 " LDR R2, =CompressionRateTable\n"
635 " LDR R12, [R1] \n"
636 " LDR R12, [R12]\n"
637 " LDR LR, [R2, R0, LSL #2] \n"
638 " LDR R3, =0x74190 \n"
639 " CMP R12, #1 \n"
640 " STR R7, [R3] \n"
641 " STR LR, [R6] \n"
642
643 " LDREQ R3, =video_quality\n"
644 " LDREQ R3, [R3]\n"
645 " LDREQ R3, [R3]\n"
646 " STREQ R3, [R6] \n"
647 " LDMFD SP!, {R4-R7,PC} \n"
648 );
649 }