This source file includes following definitions.
- change_video_tables
- movie_record_task
- sub_FFD1B97C_my
- sub_FFE1515C_my
1 #include "conf.h"
2
3 int *video_quality = &conf.video_quality;
4 int *video_mode = &conf.video_mode;
5
6 long def_table[24]={0x2000, 0x38D, 0x788, 0x5800, 0x9C5, 0x14B8, 0x10000, 0x1C6A, 0x3C45, 0x8000, 0xE35, 0x1E23,
7 0x1CCD, -0x2E1, -0x579, 0x4F33, -0x7EB, -0xF0C, 0xE666, -0x170A, -0x2BC6, 0x7333, -0xB85, -0x15E3};
8
9 long table[24];
10
11 void change_video_tables(int a, int b){
12 int i;
13 for (i=0;i<24;i++) table[i]=(def_table[i]*a)/b;
14 }
15
16 long CompressionRateTable[]={0x60, 0x5D, 0x5A, 0x57, 0x54, 0x51, 0x4D, 0x48, 0x42, 0x3B, 0x32, 0x29, 0x22, 0x1D, 0x17, 0x14, 0x10, 0xE, 0xB, 9, 7, 6, 5, 4, 3, 2, 1};
17
18
19
20 void __attribute__((naked,noinline)) movie_record_task(){
21 asm volatile (
22 "STMFD SP!, {R2-R8,LR} \n"
23 "LDR R8, =0x346 \n"
24 "LDR R7, =0x2710 \n"
25 "LDR R4, =0x5748 \n"
26 "MOV R6, #0 \n"
27 "MOV R5, #1 \n"
28 "loc_FFD1BE78:\n"
29 "LDR R0, [R4, #0x18] \n"
30 "MOV R2, #0 \n"
31 "ADD R1, SP, #4 \n"
32 "BL sub_FFC2936C \n"
33 "LDR R0, [R4, #0x20] \n"
34 "CMP R0, #0 \n"
35 "BNE loc_FFD1BF48 \n"
36 "LDR R0, [SP, #4] \n"
37 "LDR R1, [R0] \n"
38 "SUB R1, R1, #2 \n"
39 "CMP R1, #9 \n"
40 "ADDLS PC, PC, R1, LSL #2 \n"
41 "B loc_FFD1BF48 \n"
42 "B loc_FFD1BEFC \n"
43 "B loc_FFD1BF1C \n"
44 "B loc_FFD1BF2C \n"
45 "B loc_FFD1BF34 \n"
46 "B loc_FFD1BF04 \n"
47 "B loc_FFD1BF3C \n"
48 "B loc_FFD1BF0C \n"
49 "B loc_FFD1BF48 \n"
50 "B loc_FFD1BF44 \n"
51 "B loc_FFD1BED4 \n"
52 "loc_FFD1BED4:\n"
53 "LDR R0, =0xFFD1BB7C \n"
54 "STR R6, [R4, #0x34] \n"
55 "STR R0, [R4, #0xA8] \n"
56 "LDR R0, =0xFFD1B59C \n"
57 "LDR R2, =0xFFD1B4B8 \n"
58 "LDR R1, =0x72318 \n"
59 "STR R6, [R4, #0x24] \n"
60 "BL sub_FFCBDCC4 \n"
61 "STR R5, [R4, #0x38] \n"
62 "B loc_FFD1BF48 \n"
63 "loc_FFD1BEFC:\n"
64 "BL unlock_optical_zoom\n"
65 "BL sub_FFD1BC74 \n"
66 "B loc_FFD1BF48 \n"
67 "loc_FFD1BF04:\n"
68
69 "BL sub_FFD1B97C_my \n"
70 "B loc_FFD1BF48 \n"
71 "loc_FFD1BF0C:\n"
72 "LDR R1, [R0, #0x10] \n"
73 "LDR R0, [R0, #4] \n"
74 "BL sub_FFE16E10 \n"
75 "B loc_FFD1BF48 \n"
76 "loc_FFD1BF1C:\n"
77 "LDR R0, [R4, #0x38] \n"
78 "CMP R0, #5 \n"
79 "STRNE R5, [R4, #0x28] \n"
80 "B loc_FFD1BF48 \n"
81 "loc_FFD1BF2C:\n"
82 "BL sub_FFD1B758 \n"
83 "B loc_FFD1BF48 \n"
84 "loc_FFD1BF34:\n"
85 "BL sub_FFD1B5E8 \n"
86 "B loc_FFD1BF48 \n"
87 "loc_FFD1BF3C:\n"
88 "BL sub_FFD1B444 \n"
89 "B loc_FFD1BF48 \n"
90 "loc_FFD1BF44:\n"
91 "BL sub_FFD1C0B0 \n"
92 "loc_FFD1BF48:\n"
93 "LDR R1, [SP, #4] \n"
94 "LDR R3, =0xFFD1B2D4 \n"
95 "STR R6, [R1] \n"
96 "STR R8, [SP] \n"
97 "LDR R0, [R4, #0x1C] \n"
98 "MOV R2, R7 \n"
99 "BL sub_FFC29CC0 \n"
100 "B loc_FFD1BE78 \n"
101 );
102 }
103
104
105
106 void __attribute__((naked,noinline)) sub_FFD1B97C_my() {
107 asm volatile (
108 "STMFD SP!, {R4-R8,LR} \n"
109 "SUB SP, SP, #0x40 \n"
110 "MOV R6, #0 \n"
111 "LDR R5, =0x5748 \n"
112 "MOV R4, R0 \n"
113 "STR R6, [SP, #0x30] \n"
114 "STR R6, [SP, #0x28] \n"
115 "LDR R0, [R5, #0x38] \n"
116 "MOV R8, #4 \n"
117 "CMP R0, #3 \n"
118 "STREQ R8, [R5, #0x38] \n"
119 "LDR R0, [R5, #0xA8] \n"
120 "BLX R0 \n"
121 "LDR R0, [R5, #0x38] \n"
122 "CMP R0, #4 \n"
123 "BNE loc_FFD1BA54 \n"
124 "ADD R3, SP, #0x28 \n"
125 "ADD R2, SP, #0x2C \n"
126 "ADD R1, SP, #0x30 \n"
127 "ADD R0, SP, #0x34 \n"
128 "BL sub_FFE16FA4 \n"
129 "CMP R0, #0 \n"
130 "MOV R7, #1 \n"
131 "BNE loc_FFD1B9F8 \n"
132 "LDR R1, [R5, #0x28] \n"
133 "CMP R1, #1 \n"
134 "BNE loc_FFD1BA5C \n"
135 "LDR R1, [R5, #0x60] \n"
136 "LDR R2, [R5, #0x3C] \n"
137 "CMP R1, R2 \n"
138 "BCC loc_FFD1BA5C \n"
139 "loc_FFD1B9F8:\n"
140 "CMP R0, #0x80000001 \n"
141 "STREQ R8, [R5, #0x64] \n"
142 "BEQ loc_FFD1BA30 \n"
143 "CMP R0, #0x80000003 \n"
144 "STREQ R7, [R5, #0x64] \n"
145 "BEQ loc_FFD1BA30 \n"
146 "CMP R0, #0x80000005 \n"
147 "MOVEQ R0, #2 \n"
148 "BEQ loc_FFD1BA2C \n"
149 "CMP R0, #0x80000007 \n"
150 "STRNE R6, [R5, #0x64] \n"
151 "BNE loc_FFD1BA30 \n"
152 "MOV R0, #3 \n"
153 "loc_FFD1BA2C:\n"
154 "STR R0, [R5, #0x64] \n"
155 "loc_FFD1BA30:\n"
156 "LDR R0, =0x72348 \n"
157 "LDR R0, [R0, #8] \n"
158 "CMP R0, #0 \n"
159 "BEQ loc_FFD1BA48 \n"
160 "BL sub_FFC48DE4 \n"
161 "B loc_FFD1BA4C \n"
162 "loc_FFD1BA48:\n"
163 "BL sub_FFD1B444 \n"
164 "loc_FFD1BA4C:\n"
165 "MOV R0, #5 \n"
166 "STR R0, [R5, #0x38] \n"
167 "loc_FFD1BA54:\n"
168 "ADD SP, SP, #0x40 \n"
169 "LDMFD SP!, {R4-R8,PC} \n"
170 "loc_FFD1BA5C:\n"
171 "LDR LR, [SP, #0x30] \n"
172 "CMP LR, #0 \n"
173 "BEQ loc_FFD1BB24 \n"
174 "STR R7, [R5, #0x2C] \n"
175 "LDR R0, [R5, #0x7C] \n"
176 "LDR R1, [R4, #0x14] \n"
177 "LDR R2, [R4, #0x18] \n"
178 "LDR R12, [R4, #0xC] \n"
179 "ADD R3, SP, #0x38 \n"
180 "ADD R8, SP, #0x14 \n"
181 "STMIA R8, {R0-R3} \n"
182 "LDR R3, [R5, #0x68] \n"
183 "ADD R2, SP, #0x3C \n"
184 "ADD R8, SP, #8 \n"
185 "LDRD R0, [SP, #0x28] \n"
186 "STMIA R8, {R0,R2,R3} \n"
187 "STR R1, [SP, #4] \n"
188 "STR LR, [SP] \n"
189 "LDMIB R4, {R0,R1} \n"
190 "LDR R3, [SP, #0x34] \n"
191 "MOV R2, R12 \n"
192 "BL sub_FFDEA518 \n"
193 "LDR R0, [R5, #0x10] \n"
194 "LDR R1, [R5, #0x58] \n"
195 "BL sub_FFC29788 \n"
196 "CMP R0, #9 \n"
197 "BNE loc_FFD1BAD8 \n"
198 "BL sub_FFE17590 \n"
199 "MOV R0, #0x90000 \n"
200 "STR R7, [R5, #0x38] \n"
201 "B loc_FFD1BAF0 \n"
202 "loc_FFD1BAD8:\n"
203 "LDR R0, [SP, #0x38] \n"
204 "CMP R0, #0 \n"
205 "BEQ loc_FFD1BAF8 \n"
206 "BL sub_FFE17590 \n"
207 "MOV R0, #0xA0000 \n"
208 "STR R7, [R5, #0x38] \n"
209 "loc_FFD1BAF0:\n"
210 "BL sub_FFC747A4 \n"
211 "B loc_FFD1BA54 \n"
212 "loc_FFD1BAF8:\n"
213 "BL sub_FFDEA5DC \n"
214 "LDR R0, [SP, #0x34] \n"
215 "LDR R1, [SP, #0x3C] \n"
216 "BL sub_FFE17338 \n"
217 "LDR R0, [R5, #0x5C] \n"
218 "LDR R1, =0x57C4 \n"
219 "ADD R0, R0, #1 \n"
220 "STR R0, [R5, #0x5C] \n"
221 "LDR R0, [SP, #0x3C] \n"
222 "MOV R2, #0 \n"
223
224 "BL sub_FFE1515C_my \n"
225
226 "loc_FFD1BB24:\n"
227 "LDR R0, [R5, #0x60] \n"
228 "ADD R0, R0, #1 \n"
229 "STR R0, [R5, #0x60] \n"
230 "LDR R1, [R5, #0x4C] \n"
231 "MUL R0, R1, R0 \n"
232 "LDR R1, [R5, #0x48] \n"
233 "BL sub_FFEA4910 \n"
234 "MOV R4, R0 \n"
235 "BL sub_FFE175C8 \n"
236 "LDR R1, [R5, #0x80] \n"
237 "CMP R1, R4 \n"
238 "BNE loc_FFD1BB60 \n"
239 "LDR R0, [R5, #0x30] \n"
240 "CMP R0, #1 \n"
241 "BNE loc_FFD1BB74 \n"
242 "loc_FFD1BB60:\n"
243 "LDR R1, [R5, #0x8C] \n"
244 "MOV R0, R4 \n"
245 "BLX R1 \n"
246 "STR R4, [R5, #0x80] \n"
247 "STR R6, [R5, #0x30] \n"
248 "loc_FFD1BB74:\n"
249 "STR R6, [R5, #0x2C] \n"
250 "B loc_FFD1BA54 \n"
251 );
252 }
253
254
255
256 void __attribute__((naked,noinline)) sub_FFE1515C_my(){
257 asm volatile (
258 "STMFD SP!, {R4-R8,LR} \n"
259 "LDR R4, =0x9000 \n"
260 "LDR LR, [R4] \n"
261 "LDR R2, [R4, #8] \n"
262 "CMP LR, #0 \n"
263 "LDRNE R3, [R4, #0xC] \n"
264 "MOV R5, R2 \n"
265 "CMPNE R3, #1 \n"
266 "MOVEQ R2, #0 \n"
267 "STREQ R0, [R4] \n"
268 "STREQ R2, [R4, #0xC] \n"
269 "BEQ loc_FFE15228 \n"
270 "LDR R3, [R4, #4] \n"
271 "LDR R7, =0xFFEED7D4 \n"
272 "ADD R12, R3, R3, LSL #1 \n"
273 "LDR R3, [R7, R12, LSL #2] \n"
274 "ADD R6, R7, #0x30 \n"
275 "LDR R8, [R6, R12, LSL #2] \n"
276 "SUB R3, LR, R3 \n"
277 "CMP R3, #0 \n"
278 "SUB LR, LR, R8 \n"
279 "BLE loc_FFE151E4 \n"
280 "ADD R12, R7, R12, LSL #2 \n"
281 "LDR LR, [R12, #4] \n"
282 "CMP LR, R3 \n"
283 "ADDGE R2, R2, #1 \n"
284 "BGE loc_FFE151D8 \n"
285 "LDR R12, [R12, #8] \n"
286 "CMP R12, R3 \n"
287 "ADDLT R2, R2, #3 \n"
288 "ADDGE R2, R2, #2 \n"
289 "loc_FFE151D8:\n"
290
291
292 "CMP R2, #0x1A\n"
293 "MOVGE R2, #0x19\n"
294 "B loc_FFE15218 \n"
295 "loc_FFE151E4:\n"
296 "CMP LR, #0 \n"
297 "BGE loc_FFE15218 \n"
298 "ADD R3, R6, R12, LSL #2 \n"
299 "LDR R12, [R3, #4] \n"
300 "CMP R12, LR \n"
301 "SUBLE R2, R2, #1 \n"
302 "BLE loc_FFE15210 \n"
303 "LDR R3, [R3, #8] \n"
304 "CMP R3, LR \n"
305 "SUBGT R2, R2, #3 \n"
306 "SUBLE R2, R2, #2 \n"
307 "loc_FFE15210:\n"
308 "CMP R2, #0 \n"
309 "MOVLT R2, #0 \n"
310 "loc_FFE15218:\n"
311 "CMP R2, R5 \n"
312 "STRNE R2, [R4, #8] \n"
313 "MOVNE R2, #1 \n"
314 "STRNE R2, [R4, #0xC] \n"
315 "loc_FFE15228:\n"
316
317 "LDR R2, =CompressionRateTable \n"
318 "LDR R3, [R4, #8] \n"
319 "LDR R2, [R2, R3, LSL #2] \n"
320
321 "LDR R3, =video_mode\n"
322 "LDR R3, [R3]\n"
323 "LDR R3, [R3]\n"
324 "CMP R3, #1\n"
325 "LDREQ R3, =video_quality\n"
326 "LDREQ R3, [R3]\n"
327 "LDREQ R2, [R3]\n"
328
329 "STR R2, [R1] \n"
330 "STR R0, [R4] \n"
331 "LDMFD SP!, {R4-R8,PC} \n"
332 );
333 }