This source file includes following definitions.
- set_quality
- change_video_tables
- movie_record_task
1 #include "conf.h"
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11 void set_quality (int *x)
12 {
13 if (conf.video_mode)
14 *x = 12 - ((conf.video_quality-1) * (12+17) / (99-1));
15 }
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17
18
19
20
21 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
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26
27 void __attribute__((naked,noinline)) movie_record_task()
28 {
29
30 asm volatile (
31
32 " STMFD SP!, {R2-R8,LR} \n"
33 " LDR R8, =0x2710 \n"
34 " LDR R4, =0x6B68 \n"
35 " MOV R7, #1 \n"
36
37 " LDR R6, =0xFF9698B8 \n"
38 " MOV R5, #0 \n"
39 "loc_FF969BE0: \n"
40 " LDR R0, [R4,#0x24] \n"
41 " MOV R2, #0 \n"
42 " ADD R1, SP, #0x4 \n"
43 " BL sub_FF839B8C \n"
44 " LDR R0, [R4,#0x2C] \n"
45 " CMP R0, #0 \n"
46 " LDRNE R0, [R4,#0xC] \n"
47 " CMPNE R0, #2 \n"
48 " LDRNE R0, [R4,#0x44] \n"
49 " CMPNE R0, #6 \n"
50 " BNE loc_FF969CF8 \n"
51 " LDR R0, [SP,#0x4] \n"
52 " LDR R1, [R0] \n"
53 " SUB R1, R1, #2 \n"
54 " CMP R1, #0xA \n"
55 " ADDLS PC, PC, R1,LSL#2 \n"
56 " B loc_FF969CF8 \n"
57 "loc_FF969C24: \n"
58 " B loc_FF969CAC \n"
59 "loc_FF969C28: \n"
60 " B loc_FF969CCC \n"
61 "loc_FF969C2C: \n"
62 " B loc_FF969CDC \n"
63 "loc_FF969C30: \n"
64 " B loc_FF969CE4 \n"
65 "loc_FF969C34: \n"
66 " B loc_FF969CB4 \n"
67 "loc_FF969C38: \n"
68 " B loc_FF969CEC \n"
69 "loc_FF969C3C: \n"
70 " B loc_FF969CBC \n"
71 "loc_FF969C40: \n"
72 " B loc_FF969CF8 \n"
73 "loc_FF969C44: \n"
74 " B loc_FF969CF4 \n"
75 "loc_FF969C48: \n"
76 " B loc_FF969C7C \n"
77 "loc_FF969C4C: \n"
78 " B loc_FF969C50 \n"
79 "loc_FF969C50: \n"
80
81 " STR R5, [R4,#0x40] \n"
82 " STR R5, [R4,#0x30] \n"
83 " STR R5, [R4,#0x34] \n"
84 " STRH R5, [R4,#6] \n"
85 " STR R6, [R4,#0xB4] \n"
86 " LDR R0, [R4,#0xC] \n"
87 " ADD R0, R0, #1 \n"
88 " STR R0, [R4,#0xC] \n"
89 " MOV R0, #6 \n"
90 " STR R0, [R4,#0x44] \n"
91 " B loc_FF969C98 \n"
92 "loc_FF969C7C: \n"
93
94 " STR R5, [R4,#0x40] \n"
95 " STR R5, [R4,#0x30] \n"
96 " STR R6, [R4,#0xB4] \n"
97 " LDR R0, [R4,#0xC] \n"
98 " ADD R0, R0, #1 \n"
99 " STR R0, [R4,#0xC] \n"
100 " STR R7, [R4,#0x44] \n"
101 "loc_FF969C98: \n"
102 " LDR R2, =0xFF968AD0 \n"
103 " LDR R1, =0xAC9B0 \n"
104 " LDR R0, =0xFF968BCC \n"
105 " BL sub_FF851604 \n"
106 " B loc_FF969CF8 \n"
107 "loc_FF969CAC: \n"
108
109 " BL sub_FF9699E0 \n"
110 " B loc_FF969CF8 \n"
111 "loc_FF969CB4: \n"
112
113 " BL sub_FF969320 \n"
114
115 " LDR R0, =0x6BEC \n"
116 " BL set_quality \n"
117
118 " B loc_FF969CF8 \n"
119 "loc_FF969CBC: \n"
120
121 " LDR R1, [R0,#0x18] \n"
122 " LDR R0, [R0,#4] \n"
123 " BL sub_FFAA9A98 \n"
124 " B loc_FF969CF8 \n"
125 "loc_FF969CCC: \n"
126
127 " LDR R0, [R4,#0x44] \n"
128 " CMP R0, #5 \n"
129 " STRNE R7, [R4,#0x34] \n"
130 " B loc_FF969CF8 \n"
131 "loc_FF969CDC: \n"
132
133 " BL sub_FF968F68 \n"
134 " B loc_FF969CF8 \n"
135 "loc_FF969CE4: \n"
136
137 " BL sub_FF968C18 \n"
138 " B loc_FF969CF8 \n"
139 "loc_FF969CEC: \n"
140
141 " BL sub_FF968A5C \n"
142 " B loc_FF969CF8 \n"
143 "loc_FF969CF4: \n"
144
145 " BL sub_FF96A128 \n"
146 "loc_FF969CF8: \n"
147
148
149 " LDR R1, [SP,#0x4] \n"
150 " MOV R3, #0x5F0 \n"
151 " STR R5, [R1] \n"
152 " STR R3, [SP] \n"
153 " LDR R0, [R4,#0x28] \n"
154 " LDR R3, =0xFF9688C0 \n"
155 " MOV R2, R8 \n"
156 " BL sub_FF83A4E0 \n"
157 " B loc_FF969BE0 \n"
158
159 );
160 }