This source file includes following definitions.
- boot
- h_usrInit
- h_usrKernelInit
- h_usrRoot
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4
5 const char * const new_sa = &_end;
6
7
8 extern long wrs_kernel_bss_start;
9 extern long wrs_kernel_bss_end;
10 extern void createHook (void *pNewTcb);
11 extern void deleteHook (void *pTcb);
12
13
14 void boot();
15
16
17 void __attribute__((naked,noinline)) h_usrInit();
18 void __attribute__((naked,noinline)) h_usrKernelInit();
19 void __attribute__((naked,noinline)) h_usrRoot();
20
21
22
23 void boot()
24 {
25 long *canon_data_src = (void*)0xFFB23040;
26 long *canon_data_dst = (void*)0x1900;
27 long canon_data_len = 0xBDB0;
28 long *canon_bss_start = (void*)0xD6B0;
29 long canon_bss_len = 0x9C890 - 0xD6B0;
30 long i;
31
32 asm volatile (
33 "MRC p15, 0, R0,c1,c0\n"
34 "ORR R0, R0, #0x1000\n"
35 "ORR R0, R0, #4\n"
36 "ORR R0, R0, #1\n"
37 "MCR p15, 0, R0,c1,c0\n"
38 :::"r0");
39
40 for(i=0;i<canon_data_len/4;i++)
41 canon_data_dst[i]=canon_data_src[i];
42
43 for(i=0;i<canon_bss_len/4;i++)
44 canon_bss_start[i]=0;
45
46 asm volatile (
47 "MRC p15, 0, R0,c1,c0\n"
48 "ORR R0, R0, #0x1000\n"
49 "BIC R0, R0, #4\n"
50 "ORR R0, R0, #1\n"
51 "MCR p15, 0, R0,c1,c0\n"
52 :::"r0");
53
54 h_usrInit();
55 }
56
57
58 void h_usrInit()
59 {
60 asm volatile (
61 "STR LR, [SP,#-4]!\n"
62 "BL sub_FF81196C\n"
63 "MOV R0, #2\n"
64 "MOV R1, R0\n"
65 "BL sub_FFB08998\n"
66 "BL sub_FFAFBC80\n"
67 "BL sub_FF8111C4\n"
68 "BL sub_FF81172C\n"
69 "LDR LR, [SP],#4\n"
70 "B h_usrKernelInit\n"
71 );
72 }
73
74 void h_usrKernelInit()
75 {
76 asm volatile (
77 "STMFD SP!, {R4,LR}\n"
78 "SUB SP, SP, #8\n"
79 "BL sub_FFB08E98\n"
80 "BL sub_FFB1C6A0\n"
81 "LDR R3, =0xC6C8\n"
82 "LDR R2, =0x99380\n"
83 "LDR R1, [R3]\n"
84 "LDR R0, =0x9C250\n"
85 "MOV R3, #0x100\n"
86 "BL sub_FFB157B0\n"
87 "LDR R3, =0xC688\n"
88 "LDR R0, =0xCED0\n"
89 "LDR R1, [R3]\n"
90 "BL sub_FFB157B0\n"
91 "LDR R3, =0xC744\n"
92 "LDR R0, =0x9C224\n"
93 "LDR R1, [R3]\n"
94 "BL sub_FFB157B0\n"
95 "BL sub_FFB21220\n"
96 "BL sub_FF8112B0\n"
97 "MOV R4, #0\n"
98 "MOV R3, R0\n"
99 "MOV R12, #0x800\n"
100 "LDR R0, =h_usrRoot\n"
101 "MOV R1, #0x4000\n"
102 );
103
104 asm volatile (
105 "LDR R2, =new_sa\n"
106 "LDR R2, [R2]\n"
107 );
108 asm volatile (
109 "STR R12, [SP]\n"
110 "STR R4, [SP,#4]\n"
111 "BL sub_FFB198E0\n"
112 "ADD SP, SP, #8\n"
113 "LDMFD SP!, {R4,PC}\n"
114 );
115 }
116
117
118
119 void h_usrRoot()
120 {
121 asm volatile (
122 "STMFD SP!, {R4,R5,LR}\n"
123 "MOV R5, R0\n"
124 "MOV R4, R1\n"
125 "BL sub_FF8119D4\n"
126 "MOV R1, R4\n"
127 "MOV R0, R5\n"
128 "BL sub_FFB0DB2C\n"
129 "MOV R1, R4\n"
130 "MOV R0, R5\n"
131 "BL sub_FFB0E5A4\n"
132 "BL sub_FF8117EC\n"
133 "BL sub_FF811708\n"
134 "MOV R0, #0x32\n"
135 "BL sub_FFB10548\n"
136 "BL sub_FF811A14\n"
137 "BL sub_FF8119F8\n"
138 "BL sub_FF811A40\n"
139 "BL sub_FFB0FE08\n"
140 "BL sub_FF8119C8\n"
141 );
142
143 _taskCreateHookAdd(createHook);
144 _taskDeleteHookAdd(deleteHook);
145
146 drv_self_hide();
147
148 asm volatile (
149 "LDMFD SP!, {R4,R5,LR}\n"
150 "B sub_FF811370\n"
151 );
152 }
153