This source file includes following definitions.
- change_video_tables
- set_quality
- movie_record_task
- sub_FF937C70_my
1
2
3
4 #include "conf.h"
5
6 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {}
7
8 void set_quality(int *x){
9 if (conf.video_mode) *x=12-((conf.video_quality-1)*(12+17)/(99-1));
10 }
11
12
13
14
15 void __attribute__((naked,noinline)) movie_record_task() {
16 asm volatile (
17 " STMFD SP!, {R2-R8,LR} \n"
18 " LDR R8, =0x442 \n"
19 " LDR R7, =0x2710 \n"
20 " LDR R4, =0x6588 \n"
21 " MOV R6, #0 \n"
22 " MOV R5, #1 \n"
23
24 "loc_FF9382D0:\n"
25 " LDR R0, [R4, #0x18] \n"
26 " MOV R2, #0 \n"
27 " ADD R1, SP, #4 \n"
28 " BL sub_FF826D3C /*_ReceiveMessageQueue*/ \n"
29 " LDR R0, [R4, #0x20] \n"
30 " CMP R0, #0 \n"
31 " BNE loc_FF9383A0 \n"
32 " LDR R0, [SP, #4] \n"
33 " LDR R1, [R0] \n"
34 " SUB R1, R1, #2 \n"
35 " CMP R1, #9 \n"
36 " ADDLS PC, PC, R1, LSL#2 \n"
37 " B loc_FF9383A0 \n"
38 " B loc_FF938354 \n"
39 " B loc_FF938374 \n"
40 " B loc_FF938384 \n"
41 " B loc_FF93838C \n"
42 " B loc_FF93835C \n"
43 " B loc_FF938394 \n"
44 " B loc_FF938364 \n"
45 " B loc_FF9383A0 \n"
46 " B loc_FF93839C \n"
47 " B loc_FF93832C \n"
48
49 "loc_FF93832C:\n"
50 " LDR R0, =0xFF937FCC \n"
51 " STR R6, [R4, #0x34] \n"
52 " STR R0, [R4, #0x9C] \n"
53 " LDR R0, =0xFF9375EC \n"
54 " LDR R2, =0xFF937508 \n"
55 " LDR R1, =0x4C6D8 \n"
56 " STR R6, [R4, #0x24] \n"
57 " BL sub_FF838FE4 \n"
58 " STR R5, [R4, #0x38] \n"
59 " B loc_FF9383A0 \n"
60
61 "loc_FF938354:\n"
62 " BL unlock_optical_zoom\n"
63 " BL sub_FF9380D4 \n"
64 " B loc_FF9383A0 \n"
65
66 "loc_FF93835C:\n"
67 " BL sub_FF937C70_my \n"
68 " B loc_FF9383A0 \n"
69
70 "loc_FF938364:\n"
71 " LDR R1, [R0, #0x18] \n"
72 " LDR R0, [R0, #4] \n"
73 " BL sub_FFA63230 \n"
74 " B loc_FF9383A0 \n"
75
76 "loc_FF938374:\n"
77 " LDR R0, [R4, #0x38] \n"
78 " CMP R0, #5 \n"
79 " STRNE R5, [R4, #0x28] \n"
80 " B loc_FF9383A0 \n"
81
82 "loc_FF938384:\n"
83 " BL sub_FF937958 \n"
84 " B loc_FF9383A0 \n"
85
86 "loc_FF93838C:\n"
87 " BL sub_FF937638 \n"
88 " B loc_FF9383A0 \n"
89
90 "loc_FF938394:\n"
91 " BL sub_FF937494 \n"
92 " B loc_FF9383A0 \n"
93
94 "loc_FF93839C:\n"
95 " BL sub_FF938508 \n"
96
97 "loc_FF9383A0:\n"
98 " LDR R1, [SP, #4] \n"
99 " LDR R3, =0xFF9372F8 /*'MovieRecorder.c'*/ \n"
100 " STR R6, [R1] \n"
101 " STR R8, [SP] \n"
102 " LDR R0, [R4, #0x1C] \n"
103 " MOV R2, R7 \n"
104 " BL sub_FF827690 /*_PostMessageQueueStrictly*/ \n"
105 " B loc_FF9382D0 \n"
106 );
107 }
108
109
110
111 void __attribute__((naked,noinline)) sub_FF937C70_my() {
112 asm volatile (
113 " STMFD SP!, {R4-R9,LR} \n"
114 " SUB SP, SP, #0x44 \n"
115 " MOV R7, #0 \n"
116 " LDR R6, =0x6588 \n"
117 " MOV R4, R0 \n"
118 " STR R7, [SP, #0x34] \n"
119 " STR R7, [SP, #0x2C] \n"
120 " LDR R0, [R6, #0x38] \n"
121 " MOV R8, #4 \n"
122 " CMP R0, #3 \n"
123 " STREQ R8, [R6, #0x38] \n"
124 " LDR R0, [R6, #0x9C] \n"
125 " BLX R0 \n"
126 " LDR R0, [R6, #0x38] \n"
127 " CMP R0, #4 \n"
128 " BNE loc_FF937DC0 \n"
129 " ADD R3, SP, #0x2C \n"
130 " ADD R2, SP, #0x30 \n"
131 " ADD R1, SP, #0x34 \n"
132 " ADD R0, SP, #0x38 \n"
133 " BL sub_FFA632CC \n"
134 " CMP R0, #0 \n"
135 " MOV R5, #1 \n"
136 " BNE loc_FF937CEC \n"
137 " LDR R1, [R6, #0x28] \n"
138 " CMP R1, #1 \n"
139 " BNE loc_FF937DD4 \n"
140 " LDR R1, [R6, #0x4C] \n"
141 " LDR R2, [R6, #0x3C] \n"
142 " CMP R1, R2 \n"
143 " BCC loc_FF937DD4 \n"
144
145 "loc_FF937CEC:\n"
146 " CMP R0, #0x80000001 \n"
147 " STREQ R8, [R6, #0x50] \n"
148 " BEQ loc_FF937D24 \n"
149 " CMP R0, #0x80000003 \n"
150 " STREQ R5, [R6, #0x50] \n"
151 " BEQ loc_FF937D24 \n"
152 " CMP R0, #0x80000005 \n"
153 " MOVEQ R0, #2 \n"
154 " BEQ loc_FF937D20 \n"
155 " CMP R0, #0x80000007 \n"
156 " STRNE R7, [R6, #0x50] \n"
157 " BNE loc_FF937D24 \n"
158 " MOV R0, #3 \n"
159
160 "loc_FF937D20:\n"
161 " STR R0, [R6, #0x50] \n"
162
163 "loc_FF937D24:\n"
164 " LDR R0, =0x4C70C \n"
165 " LDR R0, [R0, #8] \n"
166 " CMP R0, #0 \n"
167 " BEQ loc_FF937D3C \n"
168 " BL sub_FF84A188 \n"
169 " B loc_FF937D40 \n"
170
171 "loc_FF937D3C:\n"
172 " BL sub_FF937494 \n"
173
174 "loc_FF937D40:\n"
175 " LDR R0, [R4, #0x1C] \n"
176 " LDR R1, [R4, #0x20] \n"
177 " ADD R3, SP, #0x3C \n"
178 " MVN R2, #1 \n"
179 " ADD R7, SP, #0x18 \n"
180 " STMIA R7, {R0-R3} \n"
181 " LDR R2, [R6, #0x64] \n"
182 " LDR R3, [R6, #0x68] \n"
183 " MOV R0, #0 \n"
184 " ADD R1, SP, #0x40 \n"
185 " ADD R7, SP, #8 \n"
186 " STMIA R7, {R0-R3} \n"
187 " MOV R3, #0 \n"
188 " MOV R2, #0x40 \n"
189 " STRD R2, [SP] \n"
190 " LDMIB R4, {R0,R1} \n"
191 " LDR R3, =0x4C724 \n"
192 " MOV R2, R9 \n"
193 " BL sub_FFA23604 \n"
194 " LDR R0, [R6, #0x10] \n"
195 " MOV R1, #0x3E8 \n"
196 " BL _TakeSemaphore \n"
197 " CMP R0, #9 \n"
198 " BEQ loc_FF937E58 \n"
199 " LDR R0, [SP, #0x3C] \n"
200 " CMP R0, #0 \n"
201 " BNE loc_FF937E74 \n"
202 " MOV R0, #1 \n"
203 " BL sub_FFA236AC \n"
204 " BL sub_FFA236E8 \n"
205 " MOV R0, #5 \n"
206 " STR R0, [R6, #0x38] \n"
207
208 "loc_FF937DC0:\n"
209 " ADD SP, SP, #0x44 \n"
210 " LDMFD SP!, {R4-R9,PC} \n"
211
212 "loc_FF937DC8:\n"
213 " BL sub_FF87BF7C /*_HardwareDefect_FW*/ \n"
214 " MOV R0, #1 \n"
215 " B loc_FF937F14 \n"
216
217 "loc_FF937DD4:\n"
218 " LDR R12, [SP, #0x34] \n"
219 " CMP R12, #0 \n"
220 " BEQ loc_FF937F74 \n"
221 " STR R5, [R6, #0x2C] \n"
222 " LDR R0, [R6, #0x4C] \n"
223 " LDR R8, [R4, #0xC] \n"
224 " CMP R0, #0 \n"
225 " LDRNE LR, [SP, #0x38] \n"
226 " BNE loc_FF937EA0 \n"
227 " LDR R0, [R4, #0x1C] \n"
228 " LDR R1, [R4, #0x20] \n"
229 " ADD R3, SP, #0x3C \n"
230 " MVN R2, #0 \n"
231 " ADD R9, SP, #0x18 \n"
232 " STMIA R9, {R0-R3} \n"
233 " LDR R0, [SP, #0x2C] \n"
234 " LDR R2, [R6, #0x64] \n"
235 " LDR R3, [R6, #0x68] \n"
236 " ADD R1, SP, #0x40 \n"
237 " ADD R9, SP, #8 \n"
238 " STMIA R9, {R0-R3} \n"
239 " LDR R3, [SP, #0x30] \n"
240 " STR R12, [SP] \n"
241 " STR R3, [SP, #4] \n"
242 " LDMIB R4, {R0,R1} \n"
243 " LDR R3, [SP, #0x38] \n"
244 " MOV R2, R8 \n"
245 " BL sub_FFA23604 \n"
246 " LDR R0, [R6, #0x10] \n"
247 " MOV R1, #0x3E8 \n"
248 " BL _TakeSemaphore \n"
249 " CMP R0, #9 \n"
250 " BNE loc_FF937E68 \n"
251
252 "loc_FF937E58:\n"
253 " BL sub_FFA63798 \n"
254 " MOV R0, #0x90000 \n"
255 " STR R5, [R6, #0x38] \n"
256 " B loc_FF937DC8 \n"
257
258 "loc_FF937E68:\n"
259 " LDR R0, [SP, #0x3C] \n"
260 " CMP R0, #0 \n"
261 " BEQ loc_FF937E84 \n"
262
263 "loc_FF937E74:\n"
264 " BL sub_FFA63798 \n"
265 " MOV R0, #0xA0000 \n"
266 " STR R5, [R6, #0x38] \n"
267 " B loc_FF937DC8 \n"
268
269 "loc_FF937E84:\n"
270 " MOV R0, #1 \n"
271 " BL sub_FFA236AC \n"
272 " LDR R0, [SP, #0x40] \n"
273 " LDR R1, [SP, #0x38] \n"
274 " ADD LR, R1, R0 \n"
275 " LDR R1, [SP, #0x34] \n"
276 " SUB R12, R1, R0 \n"
277
278 "loc_FF937EA0:\n"
279 " LDR R0, [R4, #0x1C] \n"
280 " LDR R2, [R6, #0x48] \n"
281 " LDR R1, [R4, #0x20] \n"
282 " ADD R3, SP, #0x3C \n"
283 " ADD R9, SP, #0x18 \n"
284 " STMIA R9, {R0-R3} \n"
285 " LDR R0, [SP, #0x2C] \n"
286 " LDR R2, [R6, #0x64] \n"
287 " LDR R3, [R6, #0x68] \n"
288 " ADD R1, SP, #0x40 \n"
289 " ADD R9, SP, #8 \n"
290 " STMIA R9, {R0-R3} \n"
291 " LDR R3, [SP, #0x30] \n"
292 " STR R12, [SP] \n"
293 " STR R3, [SP, #4] \n"
294 " LDMIB R4, {R0,R1} \n"
295 " MOV R3, LR \n"
296 " MOV R2, R8 \n"
297 " BL sub_FFA23604 \n"
298 " LDR R0, [R6, #0x10] \n"
299 " MOV R1, #0x3E8 \n"
300 " BL _TakeSemaphore \n"
301 " CMP R0, #9 \n"
302 " BNE loc_FF937F1C \n"
303 " BL sub_FFA63798 \n"
304 " MOV R0, #0x90000 \n"
305 " STR R5, [R6, #0x38] \n"
306 " BL sub_FF87BF7C /*_HardwareDefect_FW*/ \n"
307 " MOV R0, #0 \n"
308
309 "loc_FF937F14:\n"
310 " BL sub_FFA236AC \n"
311 " B loc_FF937DC0 \n"
312
313 "loc_FF937F1C:\n"
314 " LDR R0, [SP, #0x3C] \n"
315 " CMP R0, #0 \n"
316 " BEQ loc_FF937F3C \n"
317 " BL sub_FFA63798 \n"
318 " MOV R0, #0xA0000 \n"
319 " STR R5, [R6, #0x38] \n"
320 " BL sub_FF87BF7C /*_HardwareDefect_FW*/ \n"
321 " B loc_FF937DC0 \n"
322
323 "loc_FF937F3C:\n"
324 " MOV R0, #0 \n"
325 " BL sub_FFA236AC \n"
326 " LDR R0, [SP, #0x38] \n"
327 " LDR R1, [SP, #0x40] \n"
328 " BL sub_FFA634F4 \n"
329 " LDR R0, [R6, #0x48] \n"
330 " LDR R3, =0x65F0 \n"
331 " ADD R1, R0, #1 \n"
332 " STR R1, [R6, #0x48] \n"
333 " STR R3, [SP] \n"
334 " LDR R0, [SP, #0x40] \n"
335 " SUB R3, R3, #4 \n"
336 " MOV R2, #0xF \n"
337 " BL sub_FFA61698 \n"
338
339 " LDR R0, =0x65F0-4\n"
340 " BL set_quality\n"
341
342 "loc_FF937F74:\n"
343 " LDR R0, [R6, #0x4C] \n"
344 " ADD R0, R0, #1 \n"
345 " STR R0, [R6, #0x4C] \n"
346 " LDR R1, [R6, #0x74] \n"
347 " MUL R0, R1, R0 \n"
348 " LDR R1, [R6, #0x70] \n"
349 " BL sub_FFAFB000 /*__divmod_unsigned_int*/ \n"
350 " MOV R4, R0 \n"
351 " BL sub_FFA637D0 \n"
352 " LDR R1, [R6, #0x6C] \n"
353 " CMP R1, R4 \n"
354 " BNE loc_FF937FB0 \n"
355 " LDR R0, [R6, #0x30] \n"
356 " CMP R0, #1 \n"
357 " BNE loc_FF937FC4 \n"
358
359 "loc_FF937FB0:\n"
360 " LDR R1, [R6, #0x80] \n"
361 " MOV R0, R4 \n"
362 " BLX R1 \n"
363 " STR R4, [R6, #0x6C] \n"
364 " STR R7, [R6, #0x30] \n"
365
366 "loc_FF937FC4:\n"
367 " STR R7, [R6, #0x2C] \n"
368 " B loc_FF937DC0 \n"
369 );
370 }