CHDK_DE Vorschauversion  Trunk Rev. 5429
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boot.c-Dateireferenz
#include "lolevel.h"
#include "platform.h"
#include "core.h"
#include "stdlib.h"
+ Include-Abhängigkeitsdiagramm für boot.c:

gehe zum Quellcode dieser Datei

Funktionen

void CreateTask_PhySw ()
 
void CreateTask_spytask ()
 
void JogDial_task_my (void)
 
void taskCreateHook (int *p)
 
void __attribute__ ((naked, noinline))
 *-------------------------------------------------------------------— Mehr ...
 
void spytask (long ua, long ub, long uc, long ud, long ue, long uf)
 

Variablen

const char *const new_sa = &_end
 
volatile int jogdial_stopped
 

Dokumentation der Funktionen

void __attribute__ ( (naked, noinline)  )

*-------------------------------------------------------------------—

!!

IS_ERROR( hSoundHandle )

IS_ERROR( RetCode )

IS_ERROR( RetCode )

IS_ERROR( RetCode )

IS_ERROR( RetCode )

"MOV R3, #0\n" "STR R3, [R9]\n"

TODO! below is from sd400

"MOV R3, #0\n" "STR R3, [R9]\n"

TODO! below is from sd400

__MovieRecorder_c__100

__MovieRecorder_c__100

Definiert in Zeile 66 der Datei boot.c.

67 {
68  asm volatile (
69 " LDR R1, =0xC0410000 \n"
70 " MOV R0, #0 \n"
71 " STR R0, [R1] \n"
72 
73 " MOV R1, #0x78 \n"
74 " MCR p15, 0, R1,c1,c0 \n" // control reg
75 
76 " MOV R1, #0 \n"
77 " MCR p15, 0, R1,c7,c10, 4 \n" // drain write buffer
78 " MCR p15, 0, R1,c7,c5 \n" // flush instruction cache
79 " MCR p15, 0, R1,c7,c6 \n" // flush data cache
80 
81 " MOV R0, #0x3D \n" // size 2GB base 0x00000000
82 " MCR p15, 0, R0,c6,c0 \n" // protection region 0
83 " MOV R0, #0xC000002F \n" // size 16M base 0xc0000000
84 " MCR p15, 0, R0,c6,c1 \n" // protection region 1
85 " MOV R0, #0x35 \n" // size 128M base 0x00000000 (s90 is 64M)
86 " MCR p15, 0, R0,c6,c2 \n" // protection region 2
87 " MOV R0, #0x40000035 \n" // size 128M base 0x40000000 (s90 is 64M)
88 " MCR p15, 0, R0,c6,c3 \n" // protection region 3
89 " MOV R0, #0x80000017 \n" // size 4k base 0x80000000
90 " MCR p15, 0, R0,c6,c4 \n" // protection region 4
91 " LDR R0, =0xFF80002D \n" // size 8M base 0xff800000
92 " MCR p15, 0, R0,c6,c5 \n" // protection region 5
93 
94 " MOV R0, #0x34 \n" // regions 2,4,5
95 " MCR p15, 0, R0,c2,c0 \n" // data cachable bits
96 " MOV R0, #0x34 \n" // regions 2,4,5
97 " MCR p15, 0, R0,c2,c0, 1 \n" // instruction cachable bits
98 
99 " MOV R0, #0x34 \n" // regions 2,4,5
100 " MCR p15, 0, R0,c3,c0 \n" // data bufferable bits
101 " LDR R0, =0x3333330 \n" // region 0,7 = --, 1-6 = rw
102 " MCR p15, 0, R0,c5,c0, 2 \n" // data access permission
103 " LDR R0, =0x3333330 \n" // region 0,7 = --, 1-6 = rw
104 " MCR p15, 0, R0,c5,c0, 3 \n" // instruction access permission
105 
106 " MRC p15, 0, R0,c1,c0 \n" // control reg
107 " ORR R0, R0, #0x1000 \n" // enable L1 instruction cache
108 " ORR R0, R0, #4 \n" // L1 unified/data cache enable
109 " ORR R0, R0, #1 \n" // MMU or Protection Unit enable
110 " MCR p15, 0, R0,c1,c0 \n" // control reg
111 
112 " MOV R1, #0x80000006 \n" // size 4K base 0x80000000
113 " MCR p15, 0, R1,c9,c1 \n" // data tightly-coupled memory
114 " MOV R1, #6 \n" // size 4K base 0x00000000
115 " MCR p15, 0, R1,c9,c1, 1 \n" // instruction tightly-coupled memory
116 " MRC p15, 0, R1,c1,c0 \n" // control reg
117 
118 " ORR R1, R1, #0x50000 \n" // DRAM bit | IRAM bit
119 " MCR p15, 0, R1,c1,c0 \n" // control reg
120 
121 " LDR R2, =0xC0200000 \n"
122 " MOV R1, #1 \n"
123 " STR R1, [R2,#0x10C] \n"
124 
125 " MOV R1, #0xFF \n"
126 " STR R1, [R2,#0xC] \n"
127 " STR R1, [R2,#0x1C] \n"
128 " STR R1, [R2,#0x2C] \n"
129 " STR R1, [R2,#0x3C] \n"
130 " STR R1, [R2,#0x4C] \n"
131 " STR R1, [R2,#0x5C] \n"
132 " STR R1, [R2,#0x6C] \n"
133 " STR R1, [R2,#0x7C] \n"
134 " STR R1, [R2,#0x8C] \n"
135 " STR R1, [R2,#0x9C] \n"
136 " STR R1, [R2,#0xAC] \n"
137 " STR R1, [R2,#0xBC] \n"
138 " STR R1, [R2,#0xCC] \n"
139 " STR R1, [R2,#0xDC] \n"
140 " STR R1, [R2,#0xEC] \n"
141 " STR R1, [R2,#0xFC] \n"
142 
143 " LDR R1, =0xC0400008 \n"
144 " LDR R2, =0x430005 \n"
145 " STR R2, [R1] \n"
146 
147 " MOV R1, #1 \n"
148 " LDR R2, =0xC0243100 \n"
149 " STR R2, [R1] \n"
150 
151 " LDR R2, =0xC0242010 \n"
152 " LDR R1, [R2] \n"
153 " ORR R1, R1, #1 \n"
154 " STR R1, [R2] \n"
155 
156 " LDR R0, =0xFFC9A08C \n" // init data section
157 " LDR R1, =0x1900 \n"
158 " LDR R3, =0x10FE4 \n"
159 "loc_FF81013C: \n"
160 " CMP R1, R3 \n"
161 " LDRCC R2, [R0],#4 \n"
162 " STRCC R2, [R1],#4 \n"
163 " BCC loc_FF81013C \n"
164 
165 " LDR R1, =0x16EE30 \n" // clear bss section
166 " MOV R2, #0 \n"
167 "loc_FF810154: \n"
168 " CMP R3, R1 \n"
169 " STRCC R2, [R3],#4 \n"
170 " BCC loc_FF810154 \n"
171 
172 //" B sub_FF810354 \n"
173 " B sub_FF810354_my \n" // patched
174  );
175 };
void CreateTask_PhySw ( )
void CreateTask_spytask ( )

Definiert in Zeile 34 der Datei boot.c.

34  {
35  _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
36 };
void JogDial_task_my ( void  )
void spytask ( long  ua,
long  ub,
long  uc,
long  ud,
long  ue,
long  uf 
)

Definiert in Zeile 452 der Datei boot.c.

453 {
454  core_spytask();
455 }
void taskCreateHook ( int *  p)

Definiert in Zeile 40 der Datei boot.c.

41 {
42  p-=17;
43 
44  if (p[0] == 0xFF88322C)
45  p[0] = (int) capt_seq_task;
46 
47  if (p[0] == 0xFF986420)
48  p[0] = (int) movie_record_task;
49 
50  if (p[0] == 0xFF8A0AA0)
51  p[0] = (int) init_file_modules_task;
52 
53  if (p[0] == 0xFF8CF1A8)
54  p[0] = (int) exp_drv_task;
55 
56  if (p[0] == 0xFF865894)
57  p[0] = (int) JogDial_task_my;
58 }

Variablen-Dokumentation

volatile int jogdial_stopped

Definiert in Zeile 81 der Datei kbd.c.

const char* const new_sa = &_end

Definiert in Zeile 6 der Datei boot.c.