physw_status 93 core/kbd_common.c extern long physw_status[3]; physw_status 100 core/kbd_common.c if(!(physw_status[HDMI_HPD_IDX] & HDMI_HPD_FLAG)) { physw_status 111 core/kbd_common.c if(!(physw_status[ANALOG_AV_IDX] & ANALOG_AV_FLAG)) { physw_status 160 core/kbd_common.c if(physw_status[USB_IDX] & USB_MASK) { physw_status 206 core/kbd_common.c physw_status[0] = kbd_new_state[0]; physw_status 207 core/kbd_common.c physw_status[1] = kbd_new_state[1]; physw_status 208 core/kbd_common.c physw_status[2] = kbd_new_state[2]; physw_status 216 core/kbd_common.c physw_status[0] = (kbd_new_state[0] & (~KEYS_MASK0)) | (kbd_mod_state[0] & KEYS_MASK0); physw_status 218 core/kbd_common.c physw_status[1] = (kbd_new_state[1] & (~KEYS_MASK1)) | (kbd_mod_state[1] & KEYS_MASK1); physw_status 220 core/kbd_common.c physw_status[2] = (kbd_new_state[2] & (~KEYS_MASK2)) | (kbd_mod_state[2] & KEYS_MASK2); physw_status 244 core/kbd_common.c physw_status[USB_IDX] = physw_status[USB_IDX] & ~(USB_MASK); physw_status 248 core/kbd_common.c physw_status[HDMI_HPD_IDX] |= HDMI_HPD_FLAG; physw_status 253 core/kbd_common.c physw_status[ANALOG_AV_IDX] |= ANALOG_AV_FLAG; physw_status 258 core/kbd_common.c physw_status[USB_IDX] = physw_status[USB_IDX] & ~(USB_MASK); physw_status 263 core/kbd_common.c physw_status[USB_IDX] = physw_status[USB_IDX] | USB_MASK; physw_status 268 core/kbd_common.c physw_status[ANALOG_AV_IDX] &= ~(ANALOG_AV_FLAG); physw_status 270 core/kbd_common.c physw_status[ANALOG_AV_IDX] |= ANALOG_AV_FLAG; physw_status 283 core/kbd_common.c physw_status[SD_READONLY_IDX] = physw_status[SD_READONLY_IDX] & ~SD_READONLY_FLAG; physw_status 288 core/kbd_common.c physw_status[SD_DOOR_IDX] |= SD_DOOR_FLAG; // override SD card door switch physw_status 292 core/kbd_common.c physw_status[BATTCOVER_IDX] = physw_status[BATTCOVER_IDX] | BATTCOVER_FLAG; physw_status 297 core/kbd_common.c physw_status[HOTSHOE_IDX] = physw_status[HOTSHOE_IDX] & ~HOTSHOE_FLAG; physw_status 299 core/kbd_common.c physw_status[HOTSHOE_IDX] = physw_status[HOTSHOE_IDX] | HOTSHOE_FLAG; physw_status 434 core/usb_remote.c extern long physw_status[3] ; physw_status 485 core/usb_remote.c sprintf(buf,"physw=%d err=%d %d %d ", physw_status[0]&0x03, debug_errors[0], debug_errors[1], debug_errors[2] ); physw_status 181 include/lolevel.h extern long physw_status[3], physw_copy[3]; physw_status 117 platform/a1000/kbd.c _kbd_read_keys_r2(physw_status); physw_status 123 platform/a1100/kbd.c _kbd_read_keys_r2(physw_status); physw_status 46 platform/a3000/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 47 platform/a3000/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 48 platform/a3000/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 78 platform/a3000/kbd.c _kbd_read_keys_r2(physw_status); physw_status 51 platform/a3100/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 52 platform/a3100/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 53 platform/a3100/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 86 platform/a410/kbd.c _kbd_read_keys_r2(physw_status); physw_status 86 platform/a420/kbd.c _kbd_read_keys_r2(physw_status); physw_status 87 platform/a430/kbd.c _kbd_read_keys_r2(physw_status); physw_status 106 platform/a450/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/a450/main.c return (physw_status[2] & 0x00002000); physw_status 107 platform/a460/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/a460/main.c return (physw_status[2] & 0x00002000); physw_status 55 platform/a470/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 56 platform/a470/kbd.c kbd_new_state[1] = physw_status[1] ^ keys_inv1; physw_status 57 platform/a470/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 97 platform/a470/kbd.c physw_status[0] = kbd_new_state[0]; physw_status 98 platform/a470/kbd.c physw_status[1] = kbd_new_state[1] ^ keys_inv1; physw_status 99 platform/a470/kbd.c physw_status[2] = kbd_new_state[2]; physw_status 102 platform/a470/kbd.c physw_status[0] = (kbd_new_state[0] & (~KEYS_MASK0)) | physw_status 105 platform/a470/kbd.c physw_status[1] = ((kbd_new_state[1] & (~KEYS_MASK1)) | physw_status 108 platform/a470/kbd.c physw_status[2] = (kbd_new_state[2] & (~KEYS_MASK2)) | physw_status 112 platform/a470/kbd.c _kbd_read_keys_r2(physw_status); physw_status 53 platform/a470/main.c return (physw_status[1] & 0x00000e00); physw_status 113 platform/a480/kbd.c _kbd_read_keys_r2(physw_status); physw_status 51 platform/a490/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 52 platform/a490/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 53 platform/a490/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 87 platform/a490/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 88 platform/a490/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 89 platform/a490/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 95 platform/a490/kbd.c physw_status[0] = (kbd_new_state[0] | KEYS_MASK0) & (~KEYS_MASK0 | kbd_mod_state[0]); physw_status 97 platform/a490/kbd.c physw_status[2] = ((kbd_new_state[2] | KEYS_MASK2) & (~KEYS_MASK2 | kbd_mod_state[2])) ^ KEYS_INV2; physw_status 50 platform/a495/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 51 platform/a495/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 52 platform/a495/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 93 platform/a495/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 94 platform/a495/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 95 platform/a495/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 101 platform/a495/kbd.c physw_status[0] = (kbd_new_state[0] | KEYS_MASK0) & (~KEYS_MASK0 | kbd_mod_state[0]); physw_status 102 platform/a495/kbd.c physw_status[1] = (kbd_new_state[1] | KEYS_MASK1) & (~KEYS_MASK1 | kbd_mod_state[1]); physw_status 103 platform/a495/kbd.c physw_status[2] = ((kbd_new_state[2] | KEYS_MASK2) & (~KEYS_MASK2 | kbd_mod_state[2])) ^ KEYS_INV2; physw_status 89 platform/a530/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/a530/main.c return (physw_status[2] & 0x00002000); physw_status 90 platform/a540/kbd.c _kbd_read_keys_r2(physw_status); physw_status 43 platform/a540/main.c return (physw_status[1] & 0x00000400); physw_status 111 platform/a550/kbd.c _kbd_read_keys_r2(physw_status); physw_status 50 platform/a550/main.c return (physw_status[1] & 0x00000040); physw_status 113 platform/a560/kbd.c _kbd_read_keys_r2(physw_status); physw_status 111 platform/a570/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/a570/main.c return (physw_status[1] & 0x02000000); physw_status 114 platform/a580/kbd.c _kbd_read_keys_r2(physw_status); physw_status 61 platform/a580/main.c return (physw_status[1] & 0x02000000); physw_status 114 platform/a590/kbd.c _kbd_read_keys_r2(physw_status); physw_status 62 platform/a590/main.c return (physw_status[1] & 0x02000000); physw_status 89 platform/a610/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/a610/main.c return (physw_status[2] & 0x00002000); physw_status 44 platform/a610/main.c return !(physw_status[2] & 0x00008000); physw_status 49 platform/a610/main.c return !(physw_status[2] & 0x00004000); physw_status 89 platform/a620/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/a620/main.c return !(physw_status[2] & 0x00008000); physw_status 43 platform/a620/main.c return !(physw_status[2] & 0x00004000); physw_status 49 platform/a620/main.c return (physw_status[2] & 0x00002000); physw_status 88 platform/a630/kbd.c _kbd_read_keys_r2(physw_status); physw_status 37 platform/a630/main.c return !(physw_status[2] & 0x00008000); physw_status 42 platform/a630/main.c return !(physw_status[2] & 0x00004000); physw_status 48 platform/a630/main.c return (physw_status[2] & 0x00002000); physw_status 89 platform/a640/kbd.c _kbd_read_keys_r2(physw_status); physw_status 37 platform/a640/main.c return !(physw_status[2] & 0x00008000); physw_status 42 platform/a640/main.c return !(physw_status[2] & 0x00004000); physw_status 48 platform/a640/main.c return (physw_status[2] & 0x00002000); physw_status 117 platform/a650/kbd.c _kbd_read_keys_r2(physw_status); physw_status 54 platform/a650/main.c return !(physw_status[0] & 0x04000000); physw_status 58 platform/a650/main.c return !(physw_status[0] & 0x08000000); physw_status 64 platform/a650/main.c return !(physw_status[1] & 0x02000000); physw_status 89 platform/a700/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/a700/main.c return (physw_status[2] & 0x00002000); physw_status 89 platform/a710/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/a710/main.c return (physw_status[2] & 0x00002000); physw_status 114 platform/a720/kbd.c _kbd_read_keys_r2(physw_status); physw_status 61 platform/a720/main.c return (physw_status[1] & 0x02000000); physw_status 47 platform/a800/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 48 platform/a800/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 49 platform/a800/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 83 platform/a800/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 84 platform/a800/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 85 platform/a800/kbd.c kbd_new_state[2] = physw_status[2] ^ KEYS_INV2; physw_status 91 platform/a800/kbd.c physw_status[0] = (kbd_new_state[0] | KEYS_MASK0) & (~KEYS_MASK0 | kbd_mod_state[0]); physw_status 93 platform/a800/kbd.c physw_status[2] = ((kbd_new_state[2] | KEYS_MASK2) & (~KEYS_MASK2 | kbd_mod_state[2])) ^ KEYS_INV2; physw_status 54 platform/g11/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 55 platform/g11/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 56 platform/g11/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 166 platform/g11/shooting.c if ( physw_status[2] & 0x04000000 ) physw_status 174 platform/g11/shooting.c if ( physw_status[2] & 0x02000000 ) physw_status 30 platform/g12/main.c return (physw_status[0] & 0x80000000); physw_status 34 platform/g12/main.c return !(physw_status[0] & 0x40000000); physw_status 30 platform/g1x/main.c return (physw_status[2] & 0x00002000); physw_status 34 platform/g1x/main.c return !(physw_status[2] & 0x00001000); physw_status 127 platform/g5x/kbd.c physw0_override = physw_status[0]; physw_status 63 platform/g5x/main.c return (physw_status[0] & 0x00002000); physw_status 68 platform/g5x/main.c return !(physw_status[0] & 0x10000000); physw_status 142 platform/g7/kbd.c _kbd_read_keys_r2(physw_status); physw_status 124 platform/g7x2/kbd.c physw0_override = physw_status[0]; physw_status 82 platform/ixus100_sd780/kbd.c _kbd_read_keys_r2(physw_status); physw_status 66 platform/ixus105_sd1300/kbd.c _kbd_read_keys_r2(physw_status); physw_status 74 platform/ixus120_sd940/kbd.c _kbd_read_keys_r2(physw_status); physw_status 76 platform/ixus132_elph115/kbd.c _kbd_read_keys_r2(physw_status); physw_status 76 platform/ixus135_elph120/kbd.c _kbd_read_keys_r2(physw_status); physw_status 79 platform/ixus175_elph180/kbd.c return physw_status[2] & 0xffff; // firmware specific value, see 0xff86ba38 in 100c physw_status 77 platform/ixus185_elph185/kbd.c return physw_status[2] & 0xffff; // firmware specific value, see 0xff86ba38 in 100c physw_status 79 platform/ixus200_sd980/kbd.c _kbd_read_keys_r2(physw_status); physw_status 62 platform/ixus240_elph320hs/kbd.c if((physw_status[USB_IDX] & USB_MASK) == USB_MASK) { physw_status 603 platform/ixus240_elph320hs/kbd.c physw_status[0] = kbd_new_state[0]; physw_status 604 platform/ixus240_elph320hs/kbd.c physw_status[1] = kbd_new_state[1]; physw_status 605 platform/ixus240_elph320hs/kbd.c physw_status[2] = kbd_new_state[2]; physw_status 608 platform/ixus240_elph320hs/kbd.c physw_status[0] = (kbd_new_state[0] & (~KEYS_MASK0)) | (kbd_mod_state[0] & KEYS_MASK0); physw_status 609 platform/ixus240_elph320hs/kbd.c physw_status[1] = (kbd_new_state[1] & (~KEYS_MASK1)) | (kbd_mod_state[1] & KEYS_MASK1); physw_status 610 platform/ixus240_elph320hs/kbd.c physw_status[2] = (kbd_new_state[2] & (~KEYS_MASK2)) | (kbd_mod_state[2] & KEYS_MASK2); physw_status 612 platform/ixus240_elph320hs/kbd.c physw_status[SD_READONLY_IDX] = physw_status[SD_READONLY_IDX] & ~SD_READONLY_FLAG; physw_status 615 platform/ixus240_elph320hs/kbd.c physw_status[USB_IDX] = physw_status[USB_IDX] & ~USB_MASK; physw_status 73 platform/ixus285_elph360hs/kbd.c return physw_status[2] & 0xffff; // firmware specific value physw_status 207 platform/ixus50_sd400/main.c return (physw_status[0]&0x07)==0x01 ? 0 : 1; physw_status 102 platform/ixus55_sd450/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/ixus55_sd450/main.c return (physw_status[1] & 0x2); physw_status 43 platform/ixus60_sd600/main.c return (physw_status[2] & 0x00002000); physw_status 43 platform/ixus65_sd630/main.c return (physw_status[2] & 0x00002000); physw_status 207 platform/ixus700_sd500/main.c return (physw_status[0]&0x0F)!=0x0B; physw_status 110 platform/ixus70_sd1000/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/ixus70_sd1000/main.c return (physw_status[2] & 0x4000); physw_status 102 platform/ixus750_sd550/kbd.c _kbd_read_keys_r2(physw_status); physw_status 39 platform/ixus750_sd550/main.c return (physw_status[1]&0x0F)!=0x0B; physw_status 111 platform/ixus75_sd750/kbd.c _kbd_read_keys_r2(physw_status); physw_status 40 platform/ixus75_sd750/main.c return (physw_status[2] & 0x4000); physw_status 88 platform/ixus800_sd700/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/ixus800_sd700/main.c return (physw_status[2] & 0x00002000); physw_status 115 platform/ixus80_sd1100/kbd.c _kbd_read_keys_r2(physw_status); physw_status 70 platform/ixus80_sd1100/main.c return !(physw_status[1] & 0x10000000); physw_status 113 platform/ixus850_sd800/kbd.c _kbd_read_keys_r2(physw_status); physw_status 38 platform/ixus850_sd800/main.c return (physw_status[2] & 0x4000); physw_status 110 platform/ixus85_sd770/kbd.c _kbd_read_keys_r2(physw_status); physw_status 60 platform/ixus85_sd770/main.c return (physw_status[1] & 0x00010000); physw_status 115 platform/ixus860_sd870/kbd.c _kbd_read_keys_r2(physw_status); physw_status 62 platform/ixus860_sd870/main.c return !(physw_status[1] & 0x08000000); physw_status 133 platform/ixus870_sd880/kbd.c _kbd_read_keys_r2(physw_status); physw_status 36 platform/ixus900_sd900/main.c return (physw_status[2] & 0x4000); physw_status 114 platform/ixus90_sd790/kbd.c _kbd_read_keys_r2(physw_status); physw_status 131 platform/ixus950_sd850/kbd.c _kbd_read_keys_r2(physw_status); physw_status 41 platform/ixus950_sd850/main.c return (physw_status[2] & 0x1000); physw_status 74 platform/ixus95_sd1200/kbd.c _kbd_read_keys_r2(physw_status); physw_status 114 platform/ixus960_sd950/kbd.c _kbd_read_keys_r2(physw_status); physw_status 60 platform/ixus960_sd950/main.c return (physw_status[0] & 0x00000040); physw_status 112 platform/ixus970_sd890/kbd.c _kbd_read_keys_r2(physw_status); physw_status 60 platform/ixus970_sd890/main.c return (physw_status[1] & 0x00010000); physw_status 83 platform/ixus980_sd990/kbd.c _kbd_read_keys_r2(physw_status); physw_status 63 platform/ixus980_sd990/main.c return (physw_status[0] & 0x00200000); physw_status 78 platform/ixus990_sd970/kbd.c _kbd_read_keys_r2(physw_status); physw_status 40 platform/ixusizoom_sd30/main.c return (physw_status[2] & 0x00002000); physw_status 57 platform/m10/kbd.c kbd_new_state[0] = physw_status[0] ^ KEYS_INV0; physw_status 58 platform/m10/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 59 platform/m10/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 140 platform/m10/kbd.c return physw_status[1] & 0x41fe9; // mask found @ 0xfc07f02a (110d fw), also in GetKbdState physw_status 156 platform/m10/kbd.c kbd_fetch_data(physw_status); // has to be physw_status physw_status 158 platform/m10/kbd.c kbd_new_state[0] = physw_status[0] ^ KEYS_INV0; // invert button(s) for CHDK use physw_status 159 platform/m10/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 160 platform/m10/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 172 platform/m10/kbd.c physw_status[0] = ((kbd_new_state[0] & (~KEYS_MASK0)) | (kbd_mod_state[0] & KEYS_MASK0)) ^ KEYS_INV0; physw_status 174 platform/m10/kbd.c physw_status[1] = (kbd_new_state[1] & (~KEYS_MASK1)) | (kbd_mod_state[1] & KEYS_MASK1); physw_status 176 platform/m10/kbd.c physw_status[2] = (kbd_new_state[2] & (~KEYS_MASK2)) | (kbd_mod_state[2] & KEYS_MASK2); physw_status 178 platform/s2is/kbd.c physw_status[0] = kbd_new_state[0]; physw_status 179 platform/s2is/kbd.c physw_status[1] = kbd_new_state[1]; physw_status 180 platform/s2is/kbd.c physw_status[2] = kbd_new_state[2]; physw_status 183 platform/s2is/kbd.c physw_status[0] = (kbd_new_state[0] & (~KEYS_MASK0)) | physw_status 186 platform/s2is/kbd.c physw_status[1] = (kbd_new_state[1] & (~KEYS_MASK1)) | physw_status 189 platform/s2is/kbd.c physw_status[2] = (kbd_new_state[2] & (~KEYS_MASK2)) | physw_status 195 platform/s2is/kbd.c canon_key_state[0] = physw_status[0]; physw_status 196 platform/s2is/kbd.c canon_key_state[1] = physw_status[1]; physw_status 197 platform/s2is/kbd.c canon_key_state[2] = physw_status[2]; physw_status 121 platform/s3is/kbd.c _kbd_read_keys_r2(physw_status); physw_status 59 platform/s3is/main.c return !(physw_status[1] & 0x00000001); physw_status 64 platform/s3is/main.c return !(physw_status[1] & 0x00000002); physw_status 32 platform/s5is/main.c return !(physw_status[1] & 0x00000100); physw_status 37 platform/s5is/main.c return !(physw_status[1] & 0x00000200); physw_status 134 platform/s80/kbd.c _kbd_read_keys_r2(physw_status); physw_status 118 platform/sx1/kbd.c _kbd_read_keys_r2(physw_status); physw_status 31 platform/sx1/main.c return !(physw_status[1] & 0x01000000); physw_status 36 platform/sx1/main.c return !(physw_status[1] & 0x00080000); physw_status 120 platform/sx10/kbd.c _kbd_read_keys_r2(physw_status); physw_status 31 platform/sx10/main.c return !(physw_status[1] & 0x01000000); physw_status 36 platform/sx10/main.c return !(physw_status[1] & 0x00080000); physw_status 54 platform/sx130is/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 55 platform/sx130is/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 56 platform/sx130is/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 84 platform/sx130is/kbd.c _kbd_read_keys_r2(physw_status); physw_status 56 platform/sx150is/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 57 platform/sx150is/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 58 platform/sx150is/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 91 platform/sx150is/kbd.c _kbd_read_keys_r2(physw_status); physw_status 137 platform/sx20/kbd.c _kbd_read_keys_r2(physw_status); physw_status 31 platform/sx20/main.c return !(physw_status[1] & 0x01000000); physw_status 36 platform/sx20/main.c return !(physw_status[1] & 0x00080000); physw_status 57 platform/sx200is/kbd.c kbd_new_state[0] = physw_status[0]; physw_status 58 platform/sx200is/kbd.c kbd_new_state[1] = physw_status[1]; physw_status 59 platform/sx200is/kbd.c kbd_new_state[2] = physw_status[2]; physw_status 122 platform/sx200is/kbd.c _kbd_read_keys_r2(physw_status); physw_status 126 platform/sx30/kbd.c physw_status[0] |= 0x00010000; physw_status 30 platform/sx30/main.c return (physw_status[1] & 0x02000000); physw_status 34 platform/sx30/main.c return !(physw_status[1] & 0x00800000); physw_status 80 platform/sx40hs/kbd.c physw_status[0] |= 0x00010000; physw_status 30 platform/sx40hs/main.c return (physw_status[2] & 0x00000200); physw_status 34 platform/sx40hs/main.c return !(physw_status[2] & 0x00000100); physw_status 76 platform/sx420is/kbd.c return physw_status[0] & 0xffff; // firmware specific value physw_status 74 platform/sx430is/kbd.c return physw_status[0] & 0xffff; // firmware specific value physw_status 103 platform/sx50hs/kbd.c physw_status[0] |= 0x00010000; physw_status 30 platform/sx50hs/main.c return (physw_status[2] & 0x00000200); physw_status 34 platform/sx50hs/main.c return !(physw_status[2] & 0x00000100); physw_status 27 platform/sx60hs/main.c return (physw_status[2] & 0x00000200); physw_status 31 platform/sx60hs/main.c return !(physw_status[2] & 0x00000100); physw_status 75 platform/sx620hs/kbd.c return physw_status[2] & 0xffff; // firmware specific value physw_status 105 platform/tx1/kbd.c physw_status[1] = physw_status[1] & ~ SCREEN_CLOSED_FLAG; physw_status 74 platform/tx1/main.c return (physw_status[1] & 0x08000000); physw_status 1780 tools/finsig_thumb2.c uint32_t physw_status=LDR_PC2val(fw,is->insn); physw_status 1781 tools/finsig_thumb2.c if(physw_status) { physw_status 1782 tools/finsig_thumb2.c save_misc_val("physw_status",physw_status,0,(uint32_t)is->insn->address);