This source file includes following definitions.
- capt_seq_task
- sub_FF86677C_my
- sub_FF960F8C_my
- exp_drv_task
- sub_FF8D1340_my
- sub_FF8B4890_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R9,LR} \n"
17 " LDR R6, =0x1AC98 \n"
18 " LDR R5, =0x5A14 \n"
19 " MOV R9, #1 \n"
20 " MOV R7, #0 \n"
21
22 "loc_FF866C94:\n"
23 " LDR R0, [R5, #0x14] \n"
24 " MOV R2, #0 \n"
25 " MOV R1, SP \n"
26 " BL sub_FF82A4F8 /*_ReceiveMessageQueue*/ \n"
27 " TST R0, #1 \n"
28 " BEQ loc_FF866CC0 \n"
29 " LDR R1, =0x415 \n"
30 " LDR R0, =0xFF866700 /*'SsShootTask.c'*/ \n"
31 " BL _DebugAssert \n"
32 " BL _ExitTask \n"
33 " LDMFD SP!, {R3-R9,PC} \n"
34
35 "loc_FF866CC0:\n"
36 " LDR R0, [SP] \n"
37 " LDR R1, [R0] \n"
38 " CMP R1, #0x1B \n"
39 " ADDLS PC, PC, R1, LSL#2 \n"
40 " B loc_FF866F10 \n"
41 " B loc_FF866D44 \n"
42 " B loc_FF866DB4 \n"
43 " B loc_FF866DBC \n"
44 " B loc_FF866DD4 \n"
45 " B loc_FF866DC8 \n"
46 " B loc_FF866DDC \n"
47 " B loc_FF866DE4 \n"
48 " B loc_FF866DEC \n"
49 " B loc_FF866E44 \n"
50 " B loc_FF866E50 \n"
51 " B loc_FF866E58 \n"
52 " B loc_FF866E60 \n"
53 " B loc_FF866E68 \n"
54 " B loc_FF866E70 \n"
55 " B loc_FF866E78 \n"
56 " B loc_FF866E80 \n"
57 " B loc_FF866E88 \n"
58 " B loc_FF866E90 \n"
59 " B loc_FF866E98 \n"
60 " B loc_FF866EA0 \n"
61 " B loc_FF866EA8 \n"
62 " B loc_FF866EB4 \n"
63 " B loc_FF866EC0 \n"
64 " B loc_FF866EC8 \n"
65 " B loc_FF866EF8 \n"
66 " B loc_FF866F00 \n"
67 " B loc_FF866F08 \n"
68 " B loc_FF866F1C \n"
69
70 "loc_FF866D44:\n"
71 " BL sub_FF95F0C8 \n"
72 " BL shooting_expo_param_override\n"
73 " BL sub_FF864B94 \n"
74 " LDR R0, [R6, #0x24] \n"
75 " CMP R0, #0 \n"
76 " BEQ loc_FF866F1C \n"
77 " BL sub_FF8663D8 \n"
78 " MOV R4, R0 \n"
79 " LDR R0, [R6, #0x24] \n"
80 " CMP R0, #0 \n"
81 " BEQ loc_FF866D8C \n"
82 " MOV R0, #0xC \n"
83 " BL sub_FF869B98 \n"
84 " TST R0, #1 \n"
85 " STRNE R9, [R5, #4] \n"
86 " LDRNE R0, [R4, #8] \n"
87 " ORRNE R0, R0, #0x40000000 \n"
88 " STRNE R0, [R4, #8] \n"
89 " BNE loc_FF866F1C \n"
90
91 "loc_FF866D8C:\n"
92 " MOV R0, R4 \n"
93 " BL sub_FF960A6C \n"
94 " BL sub_FF9733C8 \n"
95 " BL sub_FF87491C \n"
96 " STR R0, [R4, #0x14] \n"
97 " MOV R0, R4 \n"
98 " BL sub_FF960F8C \n"
99 " TST R0, #1 \n"
100 " STRNE R9, [R5, #4] \n"
101 " B loc_FF866F1C \n"
102
103 "loc_FF866DB4:\n"
104 " BL sub_FF86677C_my \n"
105 " B loc_FF866DCC \n"
106
107 "loc_FF866DBC:\n"
108 " MOV R0, #1 \n"
109 " BL sub_FF95F310 \n"
110 " B loc_FF866F1C \n"
111
112 "loc_FF866DC8:\n"
113 " BL sub_FF95EE64 \n"
114
115 "loc_FF866DCC:\n"
116 " STR R7, [R6, #0x24] \n"
117 " B loc_FF866F1C \n"
118
119 "loc_FF866DD4:\n"
120 " BL sub_FF95F094 \n"
121 " B loc_FF866DCC \n"
122
123 "loc_FF866DDC:\n"
124 " BL sub_FF95F09C \n"
125 " B loc_FF866F1C \n"
126
127 "loc_FF866DE4:\n"
128 " BL sub_FF95F1FC \n"
129 " B loc_FF866E48 \n"
130
131 "loc_FF866DEC:\n"
132 " LDR R4, [R0, #0xC] \n"
133 " BL sub_FF95F0A4 \n"
134 " MOV R0, R4 \n"
135 " BL sub_FF95FBD4 \n"
136 " TST R0, #1 \n"
137 " MOV R8, R0 \n"
138 " BNE loc_FF866E2C \n"
139 " BL sub_FF87491C \n"
140 " STR R0, [R4, #0x14] \n"
141 " MOV R0, R4 \n"
142 " BL sub_FF960EBC \n"
143 " MOV R0, R4 \n"
144 " BL sub_FF961374 \n"
145 " MOV R8, R0 \n"
146 " LDR R0, [R4, #0x14] \n"
147 " BL sub_FF874B10 \n"
148
149 "loc_FF866E2C:\n"
150 " BL sub_FF95F094 \n"
151 " MOV R2, R4 \n"
152 " MOV R1, #7 \n"
153 " MOV R0, R8 \n"
154 " BL sub_FF864FD0 \n"
155 " B loc_FF866F1C \n"
156
157 "loc_FF866E44:\n"
158 " BL sub_FF95F28C \n"
159
160 "loc_FF866E48:\n"
161 " BL sub_FF864B94 \n"
162 " B loc_FF866F1C \n"
163
164 "loc_FF866E50:\n"
165 " BL sub_FF95F094 \n"
166 " B loc_FF866F1C \n"
167
168 "loc_FF866E58:\n"
169 " BL sub_FF95FE20 \n"
170 " B loc_FF866F1C \n"
171
172 "loc_FF866E60:\n"
173 " BL sub_FF96001C \n"
174 " B loc_FF866F1C \n"
175
176 "loc_FF866E68:\n"
177 " BL sub_FF960100 \n"
178 " B loc_FF866F1C \n"
179
180 "loc_FF866E70:\n"
181 " BL sub_FF9601B4 \n"
182 " B loc_FF866F1C \n"
183
184 "loc_FF866E78:\n"
185 " BL sub_FF960618 \n"
186 " B loc_FF866F1C \n"
187
188 "loc_FF866E80:\n"
189 " BL sub_FF96065C \n"
190 " B loc_FF866F1C \n"
191
192 "loc_FF866E88:\n"
193 " MOV R0, #0 \n"
194 " B loc_FF866EAC \n"
195
196 "loc_FF866E90:\n"
197 " BL sub_FF9607D0 \n"
198 " B loc_FF866F1C \n"
199
200 "loc_FF866E98:\n"
201 " BL sub_FF960864 \n"
202 " B loc_FF866F1C \n"
203
204 "loc_FF866EA0:\n"
205 " BL sub_FF960918 \n"
206 " B loc_FF866F1C \n"
207
208 "loc_FF866EA8:\n"
209 " MOV R0, #1 \n"
210
211 "loc_FF866EAC:\n"
212 " BL sub_FF9606B0 \n"
213 " B loc_FF866F1C \n"
214
215 "loc_FF866EB4:\n"
216 " BL sub_FF95F4AC \n"
217 " BL sub_FF867034 \n"
218 " B loc_FF866F1C \n"
219
220 "loc_FF866EC0:\n"
221 " BL sub_FF96042C \n"
222 " B loc_FF866F1C \n"
223
224 "loc_FF866EC8:\n"
225 " MOV R2, #2 \n"
226 " ADD R1, R6, #0x58 \n"
227 " MOV R0, #0x6F \n"
228 " BL _GetPropertyCase \n"
229 " TST R0, #1 \n"
230 " LDRNE R0, =0xFF866700 /*'SsShootTask.c'*/ \n"
231 " MOVNE R1, #0x4D0 \n"
232 " BLNE _DebugAssert \n"
233 " LDRH R0, [R6, #0x58] \n"
234 " CMP R0, #1 \n"
235 " BLEQ sub_FF960420 \n"
236 " B loc_FF866F1C \n"
237
238 "loc_FF866EF8:\n"
239 " BL sub_FF960564 \n"
240 " B loc_FF866F1C \n"
241
242 "loc_FF866F00:\n"
243 " BL sub_FF866664 \n"
244 " B loc_FF866F1C \n"
245
246 "loc_FF866F08:\n"
247 " BL sub_FF8268FC \n"
248 " B loc_FF866F1C \n"
249
250 "loc_FF866F10:\n"
251 " LDR R1, =0x4F1 \n"
252 " LDR R0, =0xFF866700 /*'SsShootTask.c'*/ \n"
253 " BL _DebugAssert \n"
254
255 "loc_FF866F1C:\n"
256 " LDR R0, [SP] \n"
257 " LDR R1, [R0, #4] \n"
258 " LDR R0, [R5, #0x10] \n"
259 " BL sub_FF82A274 /*_SetEventFlag*/ \n"
260 " LDR R4, [SP] \n"
261 " LDR R0, [R4, #8] \n"
262 " CMP R0, #0 \n"
263 " LDREQ R0, =0xFF866700 /*'SsShootTask.c'*/ \n"
264 " MOVEQ R1, #0xF7 \n"
265 " BLEQ _DebugAssert \n"
266 " STR R7, [R4, #8] \n"
267 " B loc_FF866C94 \n"
268 );
269 }
270
271
272
273 void __attribute__((naked,noinline)) sub_FF86677C_my() {
274 asm volatile (
275 " STMFD SP!, {R4-R8,LR} \n"
276 " LDR R4, [R0, #0xC] \n"
277 " LDR R5, =0x1AC98 \n"
278 " LDR R0, [R4, #8] \n"
279 " LDR R6, =0x820A \n"
280 " ORR R0, R0, #1 \n"
281 " STR R0, [R4, #8] \n"
282 " LDRH R0, [R5] \n"
283 " LDR R8, =0x5A14 \n"
284 " MOV R7, #0 \n"
285 " CMP R0, R6 \n"
286 " BEQ loc_FF866820 \n"
287 " LDRH R0, [R5, #0x88] \n"
288 " CMP R0, #3 \n"
289 " BEQ loc_FF866874 \n"
290 " LDR R0, [R4, #0xC] \n"
291 " CMP R0, #1 \n"
292 " BLS loc_FF86682C \n"
293 " LDRH R0, [R5, #0x86] \n"
294 " CMP R0, #0 \n"
295 " BNE loc_FF866874 \n"
296 " LDRH R0, [R5, #0x82] \n"
297 " CMP R0, #2 \n"
298 " BNE loc_FF866838 \n"
299 " BL sub_FF95F560 \n"
300 " LDRH R0, [R5] \n"
301 " CMP R0, R6 \n"
302 " BEQ loc_FF866820 \n"
303 " LDRH R0, [R5, #0x88] \n"
304 " CMP R0, #3 \n"
305 " BEQ loc_FF866874 \n"
306 " LDR R0, [R4, #0xC] \n"
307 " CMP R0, #1 \n"
308 " BLS loc_FF86682C \n"
309 " LDRH R0, [R5, #0x86] \n"
310 " CMP R0, #0 \n"
311 " BNE loc_FF866874 \n"
312 " LDRH R0, [R5, #0x82] \n"
313 " CMP R0, #2 \n"
314 " BEQ loc_FF866864 \n"
315 " B loc_FF866838 \n"
316
317 "loc_FF866820:\n"
318 " LDRH R0, [R5, #0x88] \n"
319 " CMP R0, #3 \n"
320 " BEQ loc_FF866874 \n"
321
322 "loc_FF86682C:\n"
323 " LDRH R0, [R5, #0x86] \n"
324 " CMP R0, #0 \n"
325 " BNE loc_FF866874 \n"
326
327 "loc_FF866838:\n"
328 " LDRH R0, [R5, #0x82] \n"
329 " CMP R0, #1 \n"
330 " BNE loc_FF866874 \n"
331 " LDRH R0, [R5] \n"
332 " CMP R0, R6 \n"
333 " LDRNE R0, [R4, #0xC] \n"
334 " CMPNE R0, #1 \n"
335 " BLS loc_FF866874 \n"
336 " LDR R0, [R4, #0x10] \n"
337 " CMP R0, #1 \n"
338 " BNE loc_FF866874 \n"
339
340 "loc_FF866864:\n"
341 " LDR R2, =0xEA60 \n"
342 " LDR R0, [R8, #0x10] \n"
343 " MOV R1, #0x40000000 \n"
344 " BL sub_FF869EF8 \n"
345
346 "loc_FF866874:\n"
347 " BL sub_FF866664 \n"
348 " LDR R0, [R5, #0x24] \n"
349 " CMP R0, #0 \n"
350 " MOVEQ R0, #2 \n"
351 " BLEQ sub_FF85FC7C \n"
352 " BL sub_FF95F0A4 \n"
353 " LDR R0, [R4, #0x18] \n"
354 " CMP R0, #0 \n"
355 " BLNE sub_FF861F28 \n"
356 " LDR R0, [R5, #0x24] \n"
357 " CMP R0, #0 \n"
358 " BNE loc_FF8668F0 \n"
359 " MOV R0, R4 \n"
360 " BL sub_FF960A6C \n"
361 " MOV R0, R4 \n"
362 " BL sub_FF95F7F0 \n"
363 " TST R0, #1 \n"
364 " MOVNE R2, R4 \n"
365 " LDMNEFD SP!, {R4-R8,LR} \n"
366 " MOVNE R1, #1 \n"
367 " BNE sub_FF864FD0 \n"
368 " BL sub_FF9733C8 \n"
369 " BL sub_FF87491C \n"
370 " STR R0, [R4, #0x14] \n"
371 " MOV R0, R4 \n"
372 " BL sub_FF960EBC \n"
373 " BL sub_FF9617AC \n"
374 " MOV R0, R4 \n"
375 " BL sub_FF960F8C_my \n"
376 " MOV R7, R0 \n"
377 " BL capt_seq_hook_raw_here \n"
378 " B loc_FF8668FC \n"
379
380 "loc_FF8668F0:\n"
381 " LDR R0, [R8, #4] \n"
382 " CMP R0, #0 \n"
383 " MOVNE R7, #0x1D \n"
384
385 "loc_FF8668FC:\n"
386 " MOV R2, R4 \n"
387 " MOV R1, #1 \n"
388 " MOV R0, R7 \n"
389 " BL sub_FF864FD0 \n"
390 " BL sub_FF961314 \n"
391 " CMP R0, #0 \n"
392 " LDRNE R0, [R4, #8] \n"
393 " ORRNE R0, R0, #0x2000 \n"
394 " STRNE R0, [R4, #8] \n"
395 " LDR R0, [R4, #0x18] \n"
396 " CMP R0, #0 \n"
397 " BLNE sub_FF861F40 \n"
398 " LDRH R0, [R5, #0x88] \n"
399 " CMP R0, #3 \n"
400 " LDMEQFD SP!, {R4-R8,PC} \n"
401 " LDRH R0, [R5, #0x86] \n"
402 " CMP R0, #0 \n"
403 " LDREQH R0, [R5, #0x82] \n"
404 " CMPEQ R0, #2 \n"
405 " MOVEQ R0, R4 \n"
406 " LDMEQFD SP!, {R4-R8,LR} \n"
407 " BEQ sub_FF95F5A8 \n"
408 " LDMFD SP!, {R4-R8,PC} \n"
409 );
410 }
411
412
413
414 void __attribute__((naked,noinline)) sub_FF960F8C_my() {
415 asm volatile (
416 " STMFD SP!, {R0-R8,LR} \n"
417 " MOV R4, R0 \n"
418 " BL sub_FF9618E8 \n"
419 " MVN R1, #0 \n"
420 " BL sub_FF82A2A8 /*_ClearEventFlag*/ \n"
421 " MOV R2, #4 \n"
422 " ADD R1, SP, #8 \n"
423 " MOV R0, #0x8A \n"
424 " BL _GetPropertyCase \n"
425 " TST R0, #1 \n"
426 " LDRNE R1, =0x1D2 \n"
427 " LDRNE R0, =0xFF9611A4 /*'SsCaptureSeq.c'*/ \n"
428 " BLNE _DebugAssert \n"
429 " LDR R6, =0x1AD48 \n"
430 " LDR R7, =0x1AC98 \n"
431 " LDRSH R1, [R6, #0xE] \n"
432 " LDR R0, [R7, #0x7C] \n"
433
434 " BL _GetCCDTemperature \n"
435 " LDR R2, =0xB708 \n"
436 " ADD R3, R4, #0x78 \n"
437 " STRH R0, [R4, #0x74] \n"
438 " STRD R2, [SP] \n"
439 " MOV R1, R0 \n"
440 " LDRH R0, [R7, #0x54] \n"
441 " LDRSH R2, [R6, #0xC] \n"
442 " LDR R3, =0xB704 \n"
443 " BL sub_FFA402C0 \n"
444 " BL wait_until_remote_button_is_released\n"
445 " BL capt_seq_hook_set_nr\n"
446 " LDR PC, =0xFF960FFC \n"
447 );
448 }
449
450
451
452 void __attribute__((naked,noinline)) exp_drv_task() {
453 asm volatile (
454 " STMFD SP!, {R4-R8,LR} \n"
455 " LDR R8, =0xBB8 \n"
456 " LDR R6, =0x3F21C \n"
457 " LDR R5, =0x7B5C \n"
458 " SUB SP, SP, #0x20 \n"
459 " ADD R7, SP, #0x10 \n"
460
461 "loc_FF8D37D8:\n"
462 " LDR R0, [R5, #0x20] \n"
463 " MOV R2, #0 \n"
464 " ADD R1, SP, #0x1C \n"
465 " BL sub_FF82A4F8 /*_ReceiveMessageQueue*/ \n"
466 " LDR R0, [SP, #0x1C] \n"
467 " LDR R1, [R0] \n"
468 " CMP R1, #0x23 \n"
469 " BNE loc_FF8D3818 \n"
470 " LDR R0, [SP, #0x1C] \n"
471 " BL sub_FF8D4838 \n"
472 " LDR R0, [R5, #0x1C] \n"
473 " MOV R1, #1 \n"
474 " BL sub_FF82A274 /*_SetEventFlag*/ \n"
475 " BL _ExitTask \n"
476 " ADD SP, SP, #0x20 \n"
477 " LDMFD SP!, {R4-R8,PC} \n"
478
479 "loc_FF8D3818:\n"
480 " CMP R1, #0x22 \n"
481 " BNE loc_FF8D3834 \n"
482 " LDR R2, [R0, #0x88]! \n"
483 " LDR R1, [R0, #4] \n"
484 " MOV R0, R1 \n"
485 " BLX R2 \n"
486 " B loc_FF8D3D80 \n"
487
488 "loc_FF8D3834:\n"
489 " CMP R1, #0x1D \n"
490 " BNE loc_FF8D3884 \n"
491 " LDR R0, [R5, #0x1C] \n"
492 " MOV R1, #0x80 \n"
493 " BL sub_FF82A2A8 /*_ClearEventFlag*/ \n"
494 " LDR R0, =0xFF8D0328 \n"
495 " MOV R1, #0x80 \n"
496 " BL sub_FF9526DC \n"
497 " LDR R0, [R5, #0x1C] \n"
498 " MOV R2, R8 \n"
499 " MOV R1, #0x80 \n"
500 " BL sub_FF82A1AC /*_WaitForAllEventFlag*/ \n"
501 " TST R0, #1 \n"
502 " LDRNE R1, =0xCAE \n"
503 " BNE loc_FF8D391C \n"
504
505 "loc_FF8D3870:\n"
506 " LDR R1, [SP, #0x1C] \n"
507 " LDR R0, [R1, #0x8C] \n"
508 " LDR R1, [R1, #0x88] \n"
509 " BLX R1 \n"
510 " B loc_FF8D3D80 \n"
511
512 "loc_FF8D3884:\n"
513 " CMP R1, #0x1E \n"
514 " BNE loc_FF8D38C4 \n"
515 " LDR R0, [R5, #0x1C] \n"
516 " MOV R1, #0x100 \n"
517 " BL sub_FF82A2A8 /*_ClearEventFlag*/ \n"
518 " LDR R0, =0xFF8D0338 \n"
519 " MOV R1, #0x100 \n"
520 " BL sub_FF952E84 \n"
521 " LDR R0, [R5, #0x1C] \n"
522 " MOV R2, R8 \n"
523 " MOV R1, #0x100 \n"
524 " BL sub_FF82A1AC /*_WaitForAllEventFlag*/ \n"
525 " TST R0, #1 \n"
526 " BEQ loc_FF8D3870 \n"
527 " LDR R1, =0xCB8 \n"
528 " B loc_FF8D391C \n"
529
530 "loc_FF8D38C4:\n"
531 " CMP R1, #0x1F \n"
532 " CMPNE R1, #0x20 \n"
533 " BNE loc_FF8D396C \n"
534 " MOV R4, R0 \n"
535 " LDR R0, [R5, #0x1C] \n"
536 " MOV R1, #0x40 \n"
537 " BL sub_FF82A2A8 /*_ClearEventFlag*/ \n"
538 " LDR R0, [R4] \n"
539 " MOV R1, #0x40 \n"
540 " CMP R0, #0x1F \n"
541 " LDR R0, =0xFF8D0378 \n"
542 " BNE loc_FF8D38FC \n"
543 " BL sub_FF9533E8 \n"
544 " B loc_FF8D3900 \n"
545
546 "loc_FF8D38FC:\n"
547 " BL sub_FF953488 \n"
548
549 "loc_FF8D3900:\n"
550 " LDR R0, [R5, #0x1C] \n"
551 " MOV R2, R8 \n"
552 " MOV R1, #0x40 \n"
553 " BL sub_FF82A1AC /*_WaitForAllEventFlag*/ \n"
554 " TST R0, #1 \n"
555 " BEQ loc_FF8D3870 \n"
556 " LDR R1, =0xCC6 \n"
557
558 "loc_FF8D391C:\n"
559 " LDR R0, =0xFF8D0A4C /*'ExpDrv.c'*/ \n"
560 " BL _DebugAssert \n"
561 " B loc_FF8D3870 \n"
562 " ANDEQ R0, R0, R4, LSR R10 \n"
563
564 "loc_FF8D396C:\n"
565 " CMP R1, #0x21 \n"
566 " BNE loc_FF8D3984 \n"
567 " BL sub_FF8B4AEC \n"
568 " BL sub_FF8B57A0 \n"
569 " BL sub_FF8B52DC \n"
570 " B loc_FF8D3870 \n"
571
572 "loc_FF8D3984:\n"
573 " CMP R1, #0xD \n"
574 " MOV R4, #1 \n"
575 " BNE loc_FF8D39E8 \n"
576 " LDR R1, [R0, #0x7C] \n"
577 " ADD R1, R1, R1, LSL#1 \n"
578 " ADD R1, R0, R1, LSL#2 \n"
579 " SUB R1, R1, #8 \n"
580 " LDMIA R1, {R2,R3,R12} \n"
581 " STMIA R7, {R2,R3,R12} \n"
582 " BL sub_FF8D2318 \n"
583 " LDR R0, [SP, #0x1C] \n"
584 " LDR R1, [R0, #0x7C] \n"
585 " LDR R3, [R0, #0x88] \n"
586 " LDR R2, [R0, #0x8C] \n"
587 " ADD R0, R0, #4 \n"
588 " BLX R3 \n"
589 " LDR R0, [SP, #0x1C] \n"
590 " BL sub_FF8D4C00 \n"
591 " LDR R0, [SP, #0x1C] \n"
592 " LDR R1, [R0, #0x7C] \n"
593 " LDR R3, [R0, #0x90] \n"
594 " LDR R2, [R0, #0x94] \n"
595 " ADD R0, R0, #4 \n"
596 " BLX R3 \n"
597 " B loc_FF8D3CB8 \n"
598
599 "loc_FF8D39E8:\n"
600 " CMP R1, #0xE \n"
601 " CMPNE R1, #0xF \n"
602 " BNE loc_FF8D3A90 \n"
603 " ADD R2, SP, #4 \n"
604 " ADD R1, SP, #0x10 \n"
605 " BL sub_FF8D2550 \n"
606 " CMP R0, #1 \n"
607 " MOV R4, R0 \n"
608 " CMPNE R4, #5 \n"
609 " BNE loc_FF8D3A30 \n"
610 " LDR R0, [SP, #0x1C] \n"
611 " MOV R2, R4 \n"
612 " LDR R1, [R0, #0x7C]! \n"
613 " LDR R12, [R0, #0xC]! \n"
614 " LDR R3, [R0, #4] \n"
615 " ADD R0, SP, #4 \n"
616 " BLX R12 \n"
617 " B loc_FF8D3A68 \n"
618
619 "loc_FF8D3A30:\n"
620 " LDR R0, [SP, #0x1C] \n"
621 " CMP R4, #2 \n"
622 " LDR R3, [R0, #0x8C] \n"
623 " CMPNE R4, #6 \n"
624 " BNE loc_FF8D3A78 \n"
625 " LDR R12, [R0, #0x88] \n"
626 " ADD R0, SP, #4 \n"
627 " MOV R2, R4 \n"
628 " MOV R1, #1 \n"
629 " BLX R12 \n"
630 " LDR R0, [SP, #0x1C] \n"
631 " ADD R2, SP, #4 \n"
632 " ADD R1, SP, #0x10 \n"
633 " BL sub_FF8D3520 \n"
634
635 "loc_FF8D3A68:\n"
636 " LDR R0, [SP, #0x1C] \n"
637 " MOV R1, R4 \n"
638 " BL sub_FF8D376C \n"
639 " B loc_FF8D3CB8 \n"
640
641 "loc_FF8D3A78:\n"
642 " LDR R1, [R0, #0x7C] \n"
643 " LDR R12, [R0, #0x88] \n"
644 " ADD R0, R0, #4 \n"
645 " MOV R2, R4 \n"
646 " BLX R12 \n"
647 " B loc_FF8D3CB8 \n"
648
649 "loc_FF8D3A90:\n"
650 " CMP R1, #0x19 \n"
651 " CMPNE R1, #0x1A \n"
652 " BNE loc_FF8D3ADC \n"
653 " LDR R1, [R0, #0x7C] \n"
654 " ADD R1, R1, R1, LSL#1 \n"
655 " ADD R1, R0, R1, LSL#2 \n"
656 " SUB R1, R1, #8 \n"
657 " LDMIA R1, {R2-R4} \n"
658 " STMIA R7, {R2-R4} \n"
659 " BL sub_FF8D18F4 \n"
660 " LDR R0, [SP, #0x1C] \n"
661 " LDR R1, [R0, #0x7C] \n"
662 " LDR R3, [R0, #0x88] \n"
663 " LDR R2, [R0, #0x8C] \n"
664 " ADD R0, R0, #4 \n"
665 " BLX R3 \n"
666 " LDR R0, [SP, #0x1C] \n"
667 " BL sub_FF8D1BD8 \n"
668 " B loc_FF8D3CB8 \n"
669
670 "loc_FF8D3ADC:\n"
671 " ADD R1, R0, #4 \n"
672 " LDMIA R1, {R2,R3,R12} \n"
673 " STMIA R7, {R2,R3,R12} \n"
674 " LDR R1, [R0] \n"
675 " CMP R1, #0x1C \n"
676 " ADDLS PC, PC, R1, LSL#2 \n"
677 " B loc_FF8D3C98 \n"
678 " B loc_FF8D3B6C \n"
679 " B loc_FF8D3B74 \n"
680 " B loc_FF8D3B7C \n"
681 " B loc_FF8D3B7C \n"
682 " B loc_FF8D3B6C \n"
683 " B loc_FF8D3B74 \n"
684 " B loc_FF8D3B7C \n"
685 " B loc_FF8D3B7C \n"
686 " B loc_FF8D3B94 \n"
687 " B loc_FF8D3B94 \n"
688 " B loc_FF8D3C80 \n"
689 " B loc_FF8D3C88 \n"
690 " B loc_FF8D3C90 \n"
691 " B loc_FF8D3C98 \n"
692 " B loc_FF8D3C98 \n"
693 " B loc_FF8D3C98 \n"
694 " B loc_FF8D3B84 \n"
695 " B loc_FF8D3B8C \n"
696 " B loc_FF8D3BA0 \n"
697 " B loc_FF8D3BA8 \n"
698 " B loc_FF8D3BD8 \n"
699 " B loc_FF8D3C08 \n"
700 " B loc_FF8D3C38 \n"
701 " B loc_FF8D3C68 \n"
702 " B loc_FF8D3C68 \n"
703 " B loc_FF8D3C98 \n"
704 " B loc_FF8D3C98 \n"
705 " B loc_FF8D3C70 \n"
706 " B loc_FF8D3C78 \n"
707
708 "loc_FF8D3B6C:\n"
709 " BL sub_FF8D0830 \n"
710 " B loc_FF8D3C98 \n"
711
712 "loc_FF8D3B74:\n"
713 " BL sub_FF8D0AAC \n"
714 " B loc_FF8D3C98 \n"
715
716 "loc_FF8D3B7C:\n"
717 " BL sub_FF8D0CAC \n"
718 " B loc_FF8D3C98 \n"
719
720 "loc_FF8D3B84:\n"
721 " BL sub_FF8D0EFC \n"
722 " B loc_FF8D3C98 \n"
723
724 "loc_FF8D3B8C:\n"
725 " BL sub_FF8D10EC \n"
726 " B loc_FF8D3C98 \n"
727
728 "loc_FF8D3B94:\n"
729 " BL sub_FF8D1340_my \n"
730 " MOV R4, #0 \n"
731 " B loc_FF8D3C98 \n"
732
733 "loc_FF8D3BA0:\n"
734 " BL sub_FF8D1478 \n"
735 " B loc_FF8D3C98 \n"
736
737 "loc_FF8D3BA8:\n"
738 " LDRH R1, [R0, #4] \n"
739 " STRH R1, [SP, #0x10] \n"
740 " LDRH R1, [R6, #2] \n"
741 " STRH R1, [SP, #0x12] \n"
742 " LDRH R1, [R6, #4] \n"
743 " STRH R1, [SP, #0x14] \n"
744 " LDRH R1, [R6, #6] \n"
745 " STRH R1, [SP, #0x16] \n"
746 " LDRH R1, [R0, #0xC] \n"
747 " STRH R1, [SP, #0x18] \n"
748 " BL sub_FF8D48AC \n"
749 " B loc_FF8D3C98 \n"
750
751 "loc_FF8D3BD8:\n"
752 " LDRH R1, [R0, #4] \n"
753 " STRH R1, [SP, #0x10] \n"
754 " LDRH R1, [R6, #2] \n"
755 " STRH R1, [SP, #0x12] \n"
756 " LDRH R1, [R6, #4] \n"
757 " STRH R1, [SP, #0x14] \n"
758 " LDRH R1, [R6, #6] \n"
759 " STRH R1, [SP, #0x16] \n"
760 " LDRH R1, [R6, #8] \n"
761 " STRH R1, [SP, #0x18] \n"
762 " BL sub_FF8D4A20 \n"
763 " B loc_FF8D3C98 \n"
764
765 "loc_FF8D3C08:\n"
766 " LDRH R1, [R6] \n"
767 " STRH R1, [SP, #0x10] \n"
768 " LDRH R1, [R0, #6] \n"
769 " STRH R1, [SP, #0x12] \n"
770 " LDRH R1, [R6, #4] \n"
771 " STRH R1, [SP, #0x14] \n"
772 " LDRH R1, [R6, #6] \n"
773 " STRH R1, [SP, #0x16] \n"
774 " LDRH R1, [R6, #8] \n"
775 " STRH R1, [SP, #0x18] \n"
776 " BL sub_FF8D4AC8 \n"
777 " B loc_FF8D3C98 \n"
778
779 "loc_FF8D3C38:\n"
780 " LDRH R1, [R6] \n"
781 " STRH R1, [SP, #0x10] \n"
782 " LDRH R1, [R6, #2] \n"
783 " STRH R1, [SP, #0x12] \n"
784 " LDRH R1, [R6, #4] \n"
785 " STRH R1, [SP, #0x14] \n"
786 " LDRH R1, [R6, #6] \n"
787 " STRH R1, [SP, #0x16] \n"
788 " LDRH R1, [R0, #0xC] \n"
789 " STRH R1, [SP, #0x18] \n"
790 " BL sub_FF8D4B68 \n"
791 " B loc_FF8D3C98 \n"
792
793 "loc_FF8D3C68:\n"
794 " BL sub_FF8D16CC \n"
795 " B loc_FF8D3C98 \n"
796
797 "loc_FF8D3C70:\n"
798 " BL sub_FF8D1CDC \n"
799 " B loc_FF8D3C98 \n"
800
801 "loc_FF8D3C78:\n"
802 " BL sub_FF8D1F0C \n"
803 " B loc_FF8D3C98 \n"
804
805 "loc_FF8D3C80:\n"
806 " BL sub_FF8D2080 \n"
807 " B loc_FF8D3C98 \n"
808
809 "loc_FF8D3C88:\n"
810 " MOV R1, #0 \n"
811 " B loc_FF8D3C94 \n"
812
813 "loc_FF8D3C90:\n"
814 " MOV R1, #1 \n"
815
816 "loc_FF8D3C94:\n"
817 " BL sub_FF8D2214 \n"
818
819 "loc_FF8D3C98:\n"
820 " LDR R0, [SP, #0x1C] \n"
821 " LDR R1, [R0, #0x7C] \n"
822 " LDR R3, [R0, #0x88] \n"
823 " LDR R2, [R0, #0x8C] \n"
824 " ADD R0, R0, #4 \n"
825 " BLX R3 \n"
826 " CMP R4, #1 \n"
827 " BNE loc_FF8D3D00 \n"
828
829 "loc_FF8D3CB8:\n"
830 " LDR R0, [SP, #0x1C] \n"
831 " MOV R2, #0xC \n"
832 " LDR R1, [R0, #0x7C] \n"
833 " ADD R1, R1, R1, LSL#1 \n"
834 " ADD R0, R0, R1, LSL#2 \n"
835 " SUB R4, R0, #8 \n"
836 " LDR R0, =0x3F21C \n"
837 " ADD R1, SP, #0x10 \n"
838 " BL sub_FFA929B4 \n"
839 " LDR R0, =0x3F228 \n"
840 " MOV R2, #0xC \n"
841 " ADD R1, SP, #0x10 \n"
842 " BL sub_FFA929B4 \n"
843 " LDR R0, =0x3F234 \n"
844 " MOV R2, #0xC \n"
845 " MOV R1, R4 \n"
846 " BL sub_FFA929B4 \n"
847 " B loc_FF8D3D78 \n"
848
849 "loc_FF8D3D00:\n"
850 " LDR R0, [SP, #0x1C] \n"
851 " LDR R0, [R0] \n"
852 " CMP R0, #9 \n"
853 " BNE loc_FF8D3D48 \n"
854 " MOV R3, #0 \n"
855 " STR R3, [SP] \n"
856 " MOV R3, #1 \n"
857 " MOV R2, #1 \n"
858 " MOV R1, #1 \n"
859 " MOV R0, #0 \n"
860 " BL sub_FF8D062C \n"
861 " MOV R3, #0 \n"
862 " STR R3, [SP] \n"
863 " MOV R3, #1 \n"
864 " MOV R2, #1 \n"
865 " MOV R1, #1 \n"
866 " MOV R0, #0 \n"
867 " B loc_FF8D3D74 \n"
868
869 "loc_FF8D3D48:\n"
870 " MOV R3, #1 \n"
871 " MOV R2, #1 \n"
872 " MOV R1, #1 \n"
873 " MOV R0, #1 \n"
874 " STR R3, [SP] \n"
875 " BL sub_FF8D062C \n"
876 " MOV R3, #1 \n"
877 " MOV R2, #1 \n"
878 " MOV R1, #1 \n"
879 " MOV R0, #1 \n"
880 " STR R3, [SP] \n"
881
882 "loc_FF8D3D74:\n"
883 " BL sub_FF8D0778 \n"
884
885 "loc_FF8D3D78:\n"
886 " MOV R0, #0 \n"
887 " STR R0, [R5, #0x34] \n"
888
889 "loc_FF8D3D80:\n"
890 " LDR R0, [SP, #0x1C] \n"
891 " BL sub_FF8D4838 \n"
892 " B loc_FF8D37D8 \n"
893 );
894 }
895
896
897
898 void __attribute__((naked,noinline)) sub_FF8D1340_my() {
899 asm volatile (
900 " STMFD SP!, {R4-R8,LR} \n"
901 " LDR R7, =0x7B5C \n"
902 " MOV R4, R0 \n"
903 " LDR R0, [R7, #0x1C] \n"
904 " MOV R1, #0x3E \n"
905 " BL sub_FF82A2A8 /*_ClearEventFlag*/ \n"
906 " LDRSH R0, [R4, #4] \n"
907 " MOV R1, #0 \n"
908 " BL sub_FF8D0398 \n"
909 " MOV R6, R0 \n"
910 " LDRSH R0, [R4, #6] \n"
911 " BL sub_FF8D04CC \n"
912 " LDRSH R0, [R4, #8] \n"
913 " BL sub_FF8D0524 \n"
914 " LDRSH R0, [R4, #0xA] \n"
915 " BL sub_FF8D057C \n"
916 " LDRSH R0, [R4, #0xC] \n"
917 " BL sub_FF8D05D4 \n"
918 " MOV R5, R0 \n"
919 " LDR R0, [R4] \n"
920 " LDR R8, =0x3F234 \n"
921 " CMP R0, #9 \n"
922 " MOVEQ R6, #0 \n"
923 " MOVEQ R5, #0 \n"
924 " BEQ loc_FF8D13CC \n"
925 " CMP R6, #1 \n"
926 " BNE loc_FF8D13CC \n"
927 " LDRSH R0, [R4, #4] \n"
928 " LDR R1, =0xFF8D0318 \n"
929 " MOV R2, #2 \n"
930 " BL sub_FF9527E8 \n"
931 " STRH R0, [R4, #4] \n"
932 " MOV R0, #0 \n"
933 " STR R0, [R7, #0x28] \n"
934 " B loc_FF8D13D4 \n"
935
936 "loc_FF8D13CC:\n"
937 " LDRH R0, [R8] \n"
938 " STRH R0, [R4, #4] \n"
939
940 "loc_FF8D13D4:\n"
941 " CMP R5, #1 \n"
942 " LDRNEH R0, [R8, #8] \n"
943 " BNE loc_FF8D13F0 \n"
944 " LDRSH R0, [R4, #0xC] \n"
945 " LDR R1, =0xFF8D0388 \n"
946 " MOV R2, #0x20 \n"
947 " BL sub_FF8D4868 \n"
948
949 "loc_FF8D13F0:\n"
950 " STRH R0, [R4, #0xC] \n"
951 " LDRSH R0, [R4, #6] \n"
952 " BL sub_FF8B4890_my \n"
953 " LDR PC, =0xFF8D13FC \n"
954 );
955 }
956
957
958
959 void __attribute__((naked,noinline)) sub_FF8B4890_my() {
960 asm volatile (
961 " STMFD SP!, {R4-R6,LR} \n"
962 " LDR R5, =0x74CC \n"
963 " MOV R4, R0 \n"
964 " LDR R0, [R5, #4] \n"
965 " CMP R0, #1 \n"
966 " LDRNE R1, =0x16B \n"
967 " LDRNE R0, =0xFF8B4674 /*'Shutter.c'*/ \n"
968 " BLNE _DebugAssert \n"
969 " CMN R4, #0xC00 \n"
970 " LDREQSH R4, [R5, #2] \n"
971 " CMN R4, #0xC00 \n"
972 " LDREQ R1, =0x171 \n"
973 " LDREQ R0, =0xFF8B4674 /*'Shutter.c'*/ \n"
974 " STRH R4, [R5, #2] \n"
975 " BLEQ _DebugAssert \n"
976 " MOV R0, R4 \n"
977 " BL apex2us \n"
978 " MOV R4, R0 \n"
979
980 " MOV R0, R4 \n"
981 " BL sub_FF8E7C18 \n"
982 " TST R0, #1 \n"
983 " LDRNE R1, =0x176 \n"
984 " LDMNEFD SP!, {R4-R6,LR} \n"
985 " LDRNE R0, =0xFF8B4674 /*'Shutter.c'*/ \n"
986 " BNE _DebugAssert \n"
987 " LDMFD SP!, {R4-R6,PC} \n"
988 );
989 }