This source file includes following definitions.
- my_restart
1 #include "../generic/check_compat.c"
2
3 extern long *blob_chdk_core;
4 extern long blob_chdk_core_size;
5
6
7 #define DEBUG_LED ((volatile int *)0xC0223030)
8 #define DELAY 500000
9
10 void __attribute__((noreturn)) my_restart()
11 {
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20
21
22 long *dst = (long*)MEMISOSTART;
23 const long *src = blob_chdk_core;
24 long length = (blob_chdk_core_size + 3) >> 2;
25
26 core_copy(src, dst, length);
27
28
29
30
31 asm volatile (
32 "MRS R0, CPSR\n"
33 "BIC R0, R0, #0x3F\n"
34 "ORR R0, R0, #0xD3\n"
35 "MSR CPSR, R0\n"
36
37 "MOV R0, #0x78 \n"
38 "MCR p15, 0, R0, c1, c0 \n"
39 "MOV R0, #0 \n"
40 "MCR p15, 0, R0, c7, c10, 4 \n"
41 "MCR p15, 0, R0, c7, c5 \n"
42 "MCR p15, 0, R0, c7, c6 \n"
43 "MOV R0, #0x80000006 \n"
44 "MCR p15, 0, R0, c9, c1 \n"
45 "MCR p15, 0, R0, c9, c1, 1 \n"
46 "MRC p15, 0, R0, c1, c0 \n"
47 "ORR R0, R0, #0x50000 \n"
48 "MCR p15, 0, R0, c1, c0 \n"
49 "LDR R0, =0x12345678 \n"
50 "MOV R1, #0x80000000 \n"
51 "STR R0, [R1, #0xFFC] \n"
52
53
54 "MOV R0, %0\n"
55 "BX R0 \n"
56 : : "r"(MEMISOSTART) : "memory","r0","r1","r2","r3","r4");
57
58 while(1);
59 }
60