1 #include "../generic/check_compat.c"
2
3 // static void __attribute__((noreturn)) shutdown();
4 // static void __attribute__((noreturn)) panic(int cnt);
5
6 extern long *blob_chdk_core;
7 // extern long *blob_copy_and_reset;
8 extern long blob_chdk_core_size;
9 // extern long blob_copy_and_reset_size;
10
11
12
13 void __attribute__((noreturn)) my_restart()
14 {
15 // DEBUG: blink led
16 /*
17 #define DP (void *)0xC0220130 // RED led
18 #define DELAY 5000000
19 volatile unsigned *p = (void*)DP;
20
21 int counter;
22
23 counter = DELAY; *p = 0x46; while (counter--) { asm("nop\n nop\n"); };
24 counter = DELAY; *p = 0x44; while (counter--) { asm("nop\n nop\n"); };
25 */
26 {
27 // char *dst = dst_void;
28 // const char *src = src_void;
29 long *dst = (long*)MEMISOSTART;
30 const long *src = blob_chdk_core;
31 long length = (blob_chdk_core_size + 3) >> 2;
32
33 core_copy(src, dst, length);
34
35 }
36
37 //DEBUG: blink again
38 /*
39 counter = DELAY; *p = 0x46; while (counter--) { asm("nop\n nop\n"); };
40 counter = DELAY; *p = 0x44; while (counter--) { asm("nop\n nop\n"); };
41 */
42 // restart function
43 // from sub_FF828E54 via 0x12345678 and "FirmUpgrade.c"
44 asm volatile (
45 "MRS R0, CPSR\n"
46 "BIC R0, R0, #0x3F\n"
47 "ORR R0, R0, #0xD3\n"
48 "MSR CPSR, R0\n"
49 "LDR R1, =0xC0200000\n"
50 "MOV R0, #0xFFFFFFFF\n"
51 "STR R0, [R1,#0x10C]\n"
52 "STR R0, [R1,#0xC]\n"
53 "STR R0, [R1,#0x1C]\n"
54 "STR R0, [R1,#0x2C]\n"
55 "STR R0, [R1,#0x3C]\n"
56 "STR R0, [R1,#0x4C]\n"
57 "STR R0, [R1,#0x5C]\n"
58 "STR R0, [R1,#0x6C]\n"
59 "STR R0, [R1,#0x7C]\n"
60 "STR R0, [R1,#0x8C]\n"
61 "STR R0, [R1,#0x9C]\n"
62 "STR R0, [R1,#0xAC]\n"
63 "STR R0, [R1,#0xBC]\n"
64 "STR R0, [R1,#0xCC]\n"
65 "STR R0, [R1,#0xDC]\n"
66 "STR R0, [R1,#0xEC]\n"
67 // "CMP R4, #7\n"
68 "STR R0, [R1,#0xFC]\n"
69 // "LDMEQFD SP!, {R4,PC}\n"
70 "MOV R0, #0x78\n"
71 "MCR p15, 0, R0,c1,c0\n" // disable caches and TCM
72 "MOV R0, #0\n"
73 "MCR p15, 0, R0,c7,c10, 4\n" // drain write buffer
74 "MCR p15, 0, R0,c7,c5\n" // flush instruction cache
75 "MCR p15, 0, R0,c7,c6\n" // flushd data cache
76 "MOV R0, #0x80000006\n"
77 "MCR p15, 0, R0,c9,c1\n" // set data TCM at 0x80000000, 4kb
78 "MCR p15, 0, R0,c9,c1, 1\n" // instruction TCM (DDIO201D says should only write zero as base ...)
79 "MRC p15, 0, R0,c1,c0\n" // read control state
80 "ORR R0, R0, #0x50000\n" // enable both TCM
81 "MCR p15, 0, R0,c1,c0\n"
82 "LDR R0, =0x12345678\n" // marker value stored in TCM
83 "MOV R1, #0x80000000\n"
84 "STR R0, [R1,#0xFFC]\n"
85 // "LDR R0, =loc_FF810000\n"
86 "mov R0, %0\n"
87 // "LDMFD SP!, {R4,LR}\n"
88 "BX R0\n"
89 : : "r"(MEMISOSTART) : "memory","r0","r1","r2","r3","r4");
90
91 while(1);
92 }
93
94 // static void __attribute__((noreturn)) shutdown()
95 // {
96 // volatile long *p = (void*)0xC0220014; // from task_Bye (not really complete)
97 //
98 // asm(
99 // "MRS R1, CPSR\n"
100 // "AND R0, R1, #0x80\n"
101 // "ORR R1, R1, #0x80\n"
102 // "MSR CPSR_cf, R1\n"
103 // :::"r1","r0");
104 //
105 // *p = 0x44;
106 //
107 // while(1);
108 // }
109 //
110 // #define LED_PR 0xC0220130 // red led, from wiki
111 // static void __attribute__((noreturn)) panic(int cnt)
112 // {
113 // volatile long *p=(void*)LED_PR;
114 // int i;
115 //
116 // for(;cnt>0;cnt--){
117 // p[0]=0x46;
118 //
119 // for(i=0;i<0x200000;i++){
120 // asm ("nop\n");
121 // asm ("nop\n");
122 // }
123 // p[0]=0x44;
124 // for(i=0;i<0x200000;i++){
125 // asm ("nop\n");
126 // asm ("nop\n");
127 // }
128 // }
129 // shutdown();
130 // }