1 #include "../generic/check_compat.c"
2
3 extern long *blob_chdk_core;
4 extern long blob_chdk_core_size;
5
6 void __attribute__((noreturn)) my_restart()
7 {
8 check_compat();
9
10 long *dst = (long*)MEMISOSTART;
11 const long *src = blob_chdk_core;
12 long length = (blob_chdk_core_size + 3) >> 2;
13
14 core_copy(src, dst, length);
15
16 // light up green LED
17 *(volatile int*)0xd20b0994 = 0x4d0002;
18 // blinker
19 /*
20 while(1) {
21 int i;
22 *(volatile int*)0xd20b0994 = 0x4d0002;
23 for(i=0;i<1000000;i++) {
24 asm volatile(
25 "nop\n"
26 );
27 }
28 *(volatile int*)0xd20b0994 = 0x4c0003;
29 for(i=0;i<1000000;i++) {
30 asm volatile(
31 "nop\n"
32 );
33 }
34 }
35 */
36
37 // allows boot on short press without fiddling sub_fc075b56 values or modifying/replacing sub_fc0781f4 (100d addresses)
38 // not clear why not set after DISKBOOT.BIN reboot
39 *(volatile unsigned *)(0x4ffc)=0x12345678;
40 // Restart appears to be fc0bd9de (refs to 12345678, fc020001,)
41 // similar to sx280 fc095c40, but cp15 manipulation does not appear to be the same
42 // fc157748 called at equivalent location does some, but not equivalent to sx280 code
43 asm volatile (
44 "mov r1, %1\n"
45 "mov r0, %0\n"
46 "ldr r2, =0xfc133daf\n" // based on sx280, identical in 100b, 100c and 100d. function called in startup after ROM->RAM code copy
47 "blx r2\n" // doesn't appear to flush/clean instruction cache?
48
49 // start execution at MEMISOSTART in thumb mode
50 "mov r0, %0\n"
51 "add r0, r0, #1\n"
52 "bx r0\n"
53 : : "r"(MEMISOSTART), "r"(((blob_chdk_core_size+3)>>2)<<2) : "memory","r0","r1","r2","r3","r4"
54 );
55 while(1);
56 }
57