This source file includes following definitions.
- taskHook
- CreateTask_spytask
- boot
- sub_FF810354_my
- sub_FF811178_my
- sub_FF815E34_my
- taskcreate_Startup_my
- task_Startup_my
- taskcreatePhySw_my
- Battery_door_hack
- init_file_modules_task
- sub_FF885200_my
- sub_FF8683A0_my
- sub_FF867FD4_my
- sub_FF867CD0_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7 #include "dryos31.h"
8
9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
10
11 #define LED_GREEN 0xC0220130
12 #define LED_ORANGE 0xC0220134
13 #define LED_AF 0xC0223030
14
15 const char * const new_sa = &_end;
16
17
18 void Battery_door_hack();
19
20 extern void task_CaptSeq();
21 extern void task_InitFileModules();
22 extern void task_MovieRecord();
23 extern void task_ExpDrv();
24 extern void task_FileWrite();
25
26 void taskHook(context_t **context)
27 {
28 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
29
30
31 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
32 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
33 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
34 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
35 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
36 }
37
38
39
40
41 void CreateTask_spytask() {
42 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
43 };
44
45
46
47
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68
69
70 void __attribute__((naked,noinline)) boot() {
71 asm volatile (
72 " LDR R1, =0xC0410000 \n"
73 " MOV R0, #0 \n"
74 " STR R0, [R1] \n"
75 " MOV R1, #0x78 \n"
76 " MCR p15, 0, R1, c1, c0 \n"
77 " MOV R1, #0 \n"
78 " MCR p15, 0, R1, c7, c10, 4 \n"
79 " MCR p15, 0, R1, c7, c5 \n"
80 " MCR p15, 0, R1, c7, c6 \n"
81 " MOV R0, #0x3D \n"
82 " MCR p15, 0, R0, c6, c0 \n"
83 " MOV R0, #0xC000002F \n"
84 " MCR p15, 0, R0, c6, c1 \n"
85 " MOV R0, #0x33 \n"
86 " MCR p15, 0, R0, c6, c2 \n"
87 " MOV R0, #0x40000033 \n"
88 " MCR p15, 0, R0, c6, c3 \n"
89 " MOV R0, #0x80000017 \n"
90 " MCR p15, 0, R0, c6, c4 \n"
91 " LDR R0, =0xFF80002D \n"
92 " MCR p15, 0, R0, c6, c5 \n"
93 " MOV R0, #0x34 \n"
94 " MCR p15, 0, R0, c2, c0 \n"
95 " MOV R0, #0x34 \n"
96 " MCR p15, 0, R0, c2, c0, 1 \n"
97 " MOV R0, #0x34 \n"
98 " MCR p15, 0, R0, c3, c0 \n"
99 " LDR R0, =0x3333330 \n"
100 " MCR p15, 0, R0, c5, c0, 2 \n"
101 " LDR R0, =0x3333330 \n"
102 " MCR p15, 0, R0, c5, c0, 3 \n"
103 " MRC p15, 0, R0, c1, c0 \n"
104 " ORR R0, R0, #0x1000 \n"
105 " ORR R0, R0, #4 \n"
106 " ORR R0, R0, #1 \n"
107 " MCR p15, 0, R0, c1, c0 \n"
108 " MOV R1, #0x80000006 \n"
109 " MCR p15, 0, R1, c9, c1 \n"
110 " MOV R1, #6 \n"
111 " MCR p15, 0, R1, c9, c1, 1 \n"
112 " MRC p15, 0, R1, c1, c0 \n"
113 " ORR R1, R1, #0x50000 \n"
114 " MCR p15, 0, R1, c1, c0 \n"
115 " LDR R2, =0xC0200000 \n"
116 " MOV R1, #1 \n"
117 " STR R1, [R2, #0x10C] \n"
118 " MOV R1, #0xFF \n"
119 " STR R1, [R2, #0xC] \n"
120 " STR R1, [R2, #0x1C] \n"
121 " STR R1, [R2, #0x2C] \n"
122 " STR R1, [R2, #0x3C] \n"
123 " STR R1, [R2, #0x4C] \n"
124 " STR R1, [R2, #0x5C] \n"
125 " STR R1, [R2, #0x6C] \n"
126 " STR R1, [R2, #0x7C] \n"
127 " STR R1, [R2, #0x8C] \n"
128 " STR R1, [R2, #0x9C] \n"
129 " STR R1, [R2, #0xAC] \n"
130 " STR R1, [R2, #0xBC] \n"
131 " STR R1, [R2, #0xCC] \n"
132 " STR R1, [R2, #0xDC] \n"
133 " STR R1, [R2, #0xEC] \n"
134 " STR R1, [R2, #0xFC] \n"
135 " LDR R1, =0xC0400008 \n"
136 " LDR R2, =0x430005 \n"
137 " STR R2, [R1] \n"
138 " MOV R1, #1 \n"
139 " LDR R2, =0xC0243100 \n"
140 " STR R2, [R1] \n"
141 " LDR R2, =0xC0242010 \n"
142 " LDR R1, [R2] \n"
143 " ORR R1, R1, #1 \n"
144 " STR R1, [R2] \n"
145 " LDR R0, =0xFFBBEB18 \n"
146 " LDR R1, =0x1900 \n"
147 " LDR R3, =0xDF04 \n"
148
149 "loc_FF81013C:\n"
150 " CMP R1, R3 \n"
151 " LDRCC R2, [R0], #4 \n"
152 " STRCC R2, [R1], #4 \n"
153 " BCC loc_FF81013C \n"
154 " LDR R1, =0x13CA18 \n"
155 " MOV R2, #0 \n"
156
157 "loc_FF810154:\n"
158 " CMP R3, R1 \n"
159 " STRCC R2, [R3], #4 \n"
160 " BCC loc_FF810154 \n"
161 " B sub_FF810354_my \n"
162 );
163 }
164
165
166
167 void __attribute__((naked,noinline)) sub_FF810354_my() {
168
169 *(int*)0x1938=(int)taskHook;
170 *(int*)0x1940=(int)taskHook;
171
172
173 if ((*(int*) 0xC0220128) & 1)
174 *(int*)(0x22FC) = 0x400000;
175 else
176 *(int*)(0x22FC) = 0x200000;
177
178 asm volatile (
179 " LDR R0, =0xFF8103CC \n"
180 " MOV R1, #0 \n"
181 " LDR R3, =0xFF810404 \n"
182
183 "loc_FF810360:\n"
184 " CMP R0, R3 \n"
185 " LDRCC R2, [R0], #4 \n"
186 " STRCC R2, [R1], #4 \n"
187 " BCC loc_FF810360 \n"
188 " LDR R0, =0xFF810404 \n"
189 " MOV R1, #0x4B0 \n"
190 " LDR R3, =0xFF810618 \n"
191
192 "loc_FF81037C:\n"
193 " CMP R0, R3 \n"
194 " LDRCC R2, [R0], #4 \n"
195 " STRCC R2, [R1], #4 \n"
196 " BCC loc_FF81037C \n"
197 " MOV R0, #0xD2 \n"
198 " MSR CPSR_cxsf, R0 \n"
199 " MOV SP, #0x1000 \n"
200 " MOV R0, #0xD3 \n"
201 " MSR CPSR_cxsf, R0 \n"
202 " MOV SP, #0x1000 \n"
203 " LDR R0, =0x6C4 \n"
204 " LDR R2, =0xEEEEEEEE \n"
205 " MOV R3, #0x1000 \n"
206
207 "loc_FF8103B0:\n"
208 " CMP R0, R3 \n"
209 " STRCC R2, [R0], #4 \n"
210 " BCC loc_FF8103B0 \n"
211 " BL sub_FF811178_my \n"
212 );
213 }
214
215
216
217 void __attribute__((naked,noinline)) sub_FF811178_my() {
218 asm volatile (
219 " STR LR, [SP, #-4]! \n"
220 " SUB SP, SP, #0x74 \n"
221 " MOV R0, SP \n"
222 " MOV R1, #0x74 \n"
223 " BL sub_FFB07A44 \n"
224 " MOV R0, #0x53000 \n"
225 " STR R0, [SP, #4] \n"
226
227 #if defined(CHDK_NOT_IN_CANON_HEAP)
228 " LDR R0, =0x13CA18 \n"
229 #else
230 " LDR R0, =new_sa\n"
231 " LDR R0, [R0]\n"
232 #endif
233
234 " LDR R2, =0x2F9C00 \n"
235 " LDR R1, =0x2F24A8 \n"
236 " STR R0, [SP, #8] \n"
237 " SUB R0, R1, R0 \n"
238 " ADD R3, SP, #0xC \n"
239 " STR R2, [SP] \n"
240 " STMIA R3, {R0-R2} \n"
241 " MOV R0, #0x22 \n"
242 " STR R0, [SP, #0x18] \n"
243 " MOV R0, #0x68 \n"
244 " STR R0, [SP, #0x1C] \n"
245 " LDR R0, =0x19B \n"
246 " LDR R1, =sub_FF815E34_my \n"
247 " STR R0, [SP, #0x20] \n"
248 " MOV R0, #0x96 \n"
249 " STR R0, [SP, #0x24] \n"
250 " MOV R0, #0x78 \n"
251 " STR R0, [SP, #0x28] \n"
252 " MOV R0, #0x64 \n"
253 " STR R0, [SP, #0x2C] \n"
254 " MOV R0, #0 \n"
255 " STR R0, [SP, #0x30] \n"
256 " STR R0, [SP, #0x34] \n"
257 " MOV R0, #0x10 \n"
258 " STR R0, [SP, #0x5C] \n"
259 " MOV R0, #0x800 \n"
260 " STR R0, [SP, #0x60] \n"
261 " MOV R0, #0xA0 \n"
262 " STR R0, [SP, #0x64] \n"
263 " MOV R0, #0x280 \n"
264 " STR R0, [SP, #0x68] \n"
265 " MOV R0, SP \n"
266 " MOV R2, #0 \n"
267 " BL sub_FF8133E4 \n"
268 " ADD SP, SP, #0x74 \n"
269 " LDR PC, [SP], #4 \n"
270 );
271 }
272
273
274
275 void __attribute__((naked,noinline)) sub_FF815E34_my() {
276 asm volatile (
277 " STMFD SP!, {R4,LR} \n"
278 " BL sub_FF810B08 \n"
279 " BL sub_FF81A148 \n"
280 " CMP R0, #0 \n"
281 " LDRLT R0, =0xFF815F48 /*'dmSetup'*/ \n"
282 " BLLT _err_init_task \n"
283 " BL sub_FF815A70 \n"
284 " CMP R0, #0 \n"
285 " LDRLT R0, =0xFF815F50 /*'termDriverInit'*/ \n"
286 " BLLT _err_init_task \n"
287 " LDR R0, =0xFF815F60 /*'/_term'*/ \n"
288 " BL sub_FF815B58 \n"
289 " CMP R0, #0 \n"
290 " LDRLT R0, =0xFF815F68 /*'termDeviceCreate'*/ \n"
291 " BLLT _err_init_task \n"
292 " LDR R0, =0xFF815F60 /*'/_term'*/ \n"
293 " BL sub_FF813BE0 \n"
294 " CMP R0, #0 \n"
295 " LDRLT R0, =0xFF815F7C /*'stdioSetup'*/ \n"
296 " BLLT _err_init_task \n"
297 " BL sub_FF819B5C \n"
298 " CMP R0, #0 \n"
299 " LDRLT R0, =0xFF815F88 /*'stdlibSetup'*/ \n"
300 " BLLT _err_init_task \n"
301 " BL sub_FF81165C \n"
302 " CMP R0, #0 \n"
303 " LDRLT R0, =0xFF815F94 /*'armlib_setup'*/ \n"
304 " BLLT _err_init_task \n"
305 " LDMFD SP!, {R4,LR} \n"
306 " B taskcreate_Startup_my \n"
307 );
308 }
309
310
311
312 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
313 asm volatile (
314 " STMFD SP!, {R3,LR} \n"
315
316 " BL sub_FF83A0E4 \n"
317 " CMP R0, #0 \n"
318 " BNE loc_FF81F8A0 \n"
319 " BL sub_FF8586B8 \n"
320 " CMP R0, #0 \n"
321 " BNE loc_FF81F8A0 \n"
322 " BL sub_FF8329A4 \n"
323 " LDR R1, =0xC0220000 \n"
324 " MOV R0, #0x44 \n"
325 " STR R0, [R1, #0x1C] \n"
326 " BL sub_FF832B94 \n"
327
328 "loc_FF81F89C:\n"
329 " B loc_FF81F89C \n"
330
331 "loc_FF81F8A0:\n"
332
333
334 " BL sub_FF838394 \n"
335 " LDR R1, =0x34E000 \n"
336 " MOV R0, #0 \n"
337 " BL sub_FF8387DC \n"
338 " BL sub_FF838588 /*_EnableDispatch*/ \n"
339 " MOV R3, #0 \n"
340 " STR R3, [SP] \n"
341 " LDR R3, =task_Startup_my \n"
342 " MOV R2, #0 \n"
343 " MOV R1, #0x19 \n"
344 " LDR R0, =0xFF81F8E8 /*'Startup'*/ \n"
345 " BL _CreateTask \n"
346 " MOV R0, #0 \n"
347 " LDMFD SP!, {R12,PC} \n"
348 );
349 }
350
351
352
353 void __attribute__((naked,noinline)) task_Startup_my() {
354 asm volatile (
355 " STMFD SP!, {R4,LR} \n"
356 " BL sub_FF816490 \n"
357 " BL sub_FF8343EC \n"
358 " BL sub_FF832660 \n"
359
360 " BL sub_FF83A308 \n"
361
362 " BL sub_FF88AC9C \n"
363 " BL sub_FF83135C \n"
364 " BL sub_FF83A338 \n"
365 " BL sub_FF837B38 \n"
366 " BL sub_FF83A4AC \n"
367
368 " BL CreateTask_spytask\n"
369
370 " BL taskcreatePhySw_my \n"
371 " BL sub_FF835FB4 \n"
372 " BL sub_FF83A4C4 \n"
373
374
375 #if defined(OPT_RUN_WITH_BATT_COVER_OPEN)
376 " BL Battery_door_hack\n"
377 #endif
378
379 " BL sub_FF831FB8 \n"
380 " BL sub_FF839EC0 \n"
381 " BL sub_FF832614 \n"
382 " BL sub_FF831EC4 \n"
383 " BL sub_FF831390 \n"
384 " BL sub_FF83AF44 \n"
385 " BL sub_FF831E9C \n"
386 " LDMFD SP!, {R4,LR} \n"
387 " B sub_FF8165B0 \n"
388 );
389 }
390
391
392
393 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
394 asm volatile (
395 " STMFD SP!, {R3-R5,LR} \n"
396 " LDR R4, =0x1C38 \n"
397 " LDR R0, [R4, #0x10] \n"
398 " CMP R0, #0 \n"
399 " BNE sub_FF83322C \n"
400 " MOV R3, #0 \n"
401 " STR R3, [SP] \n"
402 " LDR R3, =mykbd_task \n"
403 " MOV R2, #0x2000 \n"
404 " LDR PC, =0xFF83321C \n"
405 );
406 }
407
408
409 #if defined(OPT_RUN_WITH_BATT_COVER_OPEN)
410 void __attribute__((naked,noinline)) Battery_door_hack() {
411 asm volatile (
412 " STMFD SP!, {R4-R6,LR} \n"
413 " LDR R0, =0x400000 \n"
414 "loop1: \n"
415 " nop\n"
416 " SUBS R0,R0,#1 \n"
417 " BNE loop1 \n"
418 " LDMFD SP!, {R4-R6,PC} \n"
419 );
420 }
421 #endif
422
423
424
425 void __attribute__((naked,noinline)) init_file_modules_task() {
426 asm volatile (
427 " STMFD SP!, {R4-R6,LR} \n"
428 " BL sub_FF8851D4 \n"
429 " LDR R5, =0x5006 \n"
430 " MOVS R4, R0 \n"
431 " MOVNE R1, #0 \n"
432 " MOVNE R0, R5 \n"
433 " BLNE _PostLogicalEventToUI \n"
434 " BL sub_FF885200_my \n"
435 " BL core_spytask_can_start\n"
436 " CMP R4, #0 \n"
437 " MOVEQ R0, R5 \n"
438 " LDMEQFD SP!, {R4-R6,LR} \n"
439 " MOVEQ R1, #0 \n"
440 " BEQ _PostLogicalEventToUI \n"
441 " LDMFD SP!, {R4-R6,PC} \n"
442 );
443 }
444
445
446
447 void __attribute__((naked,noinline)) sub_FF885200_my() {
448 asm volatile (
449 " STMFD SP!, {R4,LR} \n"
450 " MOV R0, #3 \n"
451 " BL sub_FF8683A0_my \n"
452 " LDR PC, =0xFF88520C \n"
453 );
454 }
455
456
457
458 void __attribute__((naked,noinline)) sub_FF8683A0_my() {
459 asm volatile (
460 " STMFD SP!, {R4-R8,LR} \n"
461 " MOV R8, R0 \n"
462 " BL sub_FF868320 \n"
463 " LDR R1, =0x366A0 \n"
464 " MOV R6, R0 \n"
465 " ADD R4, R1, R0, LSL#7 \n"
466 " LDR R0, [R4, #0x6C] \n"
467 " CMP R0, #4 \n"
468 " LDREQ R1, =0x804 \n"
469 " LDREQ R0, =0xFF867E6C /*'Mounter.c'*/ \n"
470 " BLEQ _DebugAssert \n"
471 " MOV R1, R8 \n"
472 " MOV R0, R6 \n"
473 " BL sub_FF867BC0 \n"
474 " LDR R0, [R4, #0x38] \n"
475 " BL sub_FF8689BC \n"
476 " CMP R0, #0 \n"
477 " STREQ R0, [R4, #0x6C] \n"
478 " MOV R0, R6 \n"
479 " BL sub_FF867C50 \n"
480 " MOV R0, R6 \n"
481 " BL sub_FF867FD4_my \n"
482 " LDR PC, =0xFF8683F8 \n"
483 );
484 }
485
486
487
488 void __attribute__((naked,noinline)) sub_FF867FD4_my() {
489 asm volatile (
490 " STMFD SP!, {R4-R6,LR} \n"
491 " MOV R5, R0 \n"
492 " LDR R0, =0x366A0 \n"
493 " ADD R4, R0, R5, LSL#7 \n"
494 " LDR R0, [R4, #0x6C] \n"
495 " TST R0, #2 \n"
496 " MOVNE R0, #1 \n"
497 " LDMNEFD SP!, {R4-R6,PC} \n"
498 " LDR R0, [R4, #0x38] \n"
499 " MOV R1, R5 \n"
500 " BL sub_FF867CD0_my \n"
501 " LDR PC, =0xFF868000 \n"
502 );
503 }
504
505
506
507 void __attribute__((naked,noinline)) sub_FF867CD0_my() {
508 asm volatile (
509 " STMFD SP!, {R4-R10,LR} \n"
510 " MOV R9, R0 \n"
511 " LDR R0, =0x366A0 \n"
512 " MOV R8, #0 \n"
513 " ADD R5, R0, R1, LSL#7 \n"
514 " LDR R0, [R5, #0x3C] \n"
515 " MOV R7, #0 \n"
516 " CMP R0, #7 \n"
517 " MOV R6, #0 \n"
518 " ADDLS PC, PC, R0, LSL#2 \n"
519 " B loc_FF867E28 \n"
520 " B loc_FF867D34 \n"
521 " B loc_FF867D1C \n"
522 " B loc_FF867D1C \n"
523 " B loc_FF867D1C \n"
524 " B loc_FF867D1C \n"
525 " B loc_FF867E20 \n"
526 " B loc_FF867D1C \n"
527 " B loc_FF867D1C \n"
528
529 "loc_FF867D1C:\n"
530 " MOV R2, #0 \n"
531 " MOV R1, #0x200 \n"
532 " MOV R0, #2 \n"
533 " BL _exmem_ualloc \n"
534 " MOVS R4, R0 \n"
535 " BNE loc_FF867D3C \n"
536
537 "loc_FF867D34:\n"
538 " MOV R0, #0 \n"
539 " LDMFD SP!, {R4-R10,PC} \n"
540
541 "loc_FF867D3C:\n"
542 " LDR R12, [R5, #0x50] \n"
543 " MOV R3, R4 \n"
544 " MOV R2, #1 \n"
545 " MOV R1, #0 \n"
546 " MOV R0, R9 \n"
547 " BLX R12 \n"
548 " CMP R0, #1 \n"
549 " BNE loc_FF867D68 \n"
550 " MOV R0, #2 \n"
551 " BL _exmem_ufree \n"
552 " B loc_FF867D34 \n"
553
554 "loc_FF867D68:\n"
555 " LDR R1, [R5, #0x64] \n"
556 " MOV R0, R9 \n"
557 " BLX R1 \n"
558
559 " MOV R1, R4\n"
560 " BL mbr_read_dryos\n"
561
562
563
564
565
566
567 " MOV R12, R4\n"
568 " MOV LR, R4\n"
569 " MOV R1, #1\n"
570 " B dg_sd_fat32_enter\n"
571 "dg_sd_fat32:\n"
572 " CMP R1, #4\n"
573 " BEQ dg_sd_fat32_end\n"
574 " ADD R12, R12, #0x10\n"
575 " ADD R1, R1, #1\n"
576 "dg_sd_fat32_enter:\n"
577 " LDRB R2, [R12, #0x1BE]\n"
578 " LDRB R3, [R12, #0x1C2]\n"
579 " CMP R3, #0xB\n"
580 " CMPNE R3, #0xC\n"
581 " CMPNE R3, #0x7\n"
582 " BNE dg_sd_fat32\n"
583 " CMP R2, #0x00\n"
584 " CMPNE R2, #0x80\n"
585 " BNE dg_sd_fat32\n"
586
587 " MOV R4, R12\n"
588
589 "dg_sd_fat32_end:\n"
590
591
592 " LDRB R1, [R4, #0x1C9] \n"
593 " LDRB R3, [R4, #0x1C8] \n"
594 " LDRB R12, [R4, #0x1CC] \n"
595 " MOV R1, R1, LSL#24 \n"
596 " ORR R1, R1, R3, LSL#16 \n"
597 " LDRB R3, [R4, #0x1C7] \n"
598 " LDRB R2, [R4, #0x1BE] \n"
599
600 " ORR R1, R1, R3, LSL#8 \n"
601 " LDRB R3, [R4, #0x1C6] \n"
602 " CMP R2, #0 \n"
603 " CMPNE R2, #0x80 \n"
604 " ORR R1, R1, R3 \n"
605 " LDRB R3, [R4, #0x1CD] \n"
606 " MOV R3, R3, LSL#24 \n"
607 " ORR R3, R3, R12, LSL#16 \n"
608 " LDRB R12, [R4, #0x1CB] \n"
609 " ORR R3, R3, R12, LSL#8 \n"
610 " LDRB R12, [R4, #0x1CA] \n"
611 " ORR R3, R3, R12 \n"
612
613 " LDRB R12, [LR,#0x1FE]\n"
614 " LDRB LR, [LR,#0x1FF]\n"
615 " BNE loc_FF867DF4 \n"
616 " CMP R0, R1 \n"
617 " BCC loc_FF867DF4 \n"
618 " ADD R2, R1, R3 \n"
619 " CMP R2, R0 \n"
620 " CMPLS R12, #0x55 \n"
621 " CMPEQ LR, #0xAA \n"
622 " MOVEQ R7, R1 \n"
623 " MOVEQ R6, R3 \n"
624 " MOVEQ R4, #1 \n"
625 " BEQ loc_FF867DF8 \n"
626
627 "loc_FF867DF4:\n"
628 " MOV R4, R8 \n"
629
630 "loc_FF867DF8:\n"
631 " MOV R0, #2 \n"
632 " BL _exmem_ufree \n"
633 " CMP R4, #0 \n"
634 " BNE loc_FF867E34 \n"
635 " LDR R1, [R5, #0x64] \n"
636 " MOV R7, #0 \n"
637 " MOV R0, R9 \n"
638 " BLX R1 \n"
639 " MOV R6, R0 \n"
640 " B loc_FF867E34 \n"
641
642 "loc_FF867E20:\n"
643 " MOV R6, #0x40 \n"
644 " B loc_FF867E34 \n"
645
646 "loc_FF867E28:\n"
647 " LDR R1, =0x568 \n"
648 " LDR R0, =0xFF867E6C /*'Mounter.c'*/ \n"
649 " BL _DebugAssert \n"
650
651 "loc_FF867E34:\n"
652 " STR R7, [R5, #0x44]! \n"
653 " STMIB R5, {R6,R8} \n"
654 " MOV R0, #1 \n"
655 " LDMFD SP!, {R4-R10,PC} \n"
656 );
657 }