This source file includes following definitions.
- filewritetask
- sub_FFA48C40_my
- sub_FFA48D74_my
- sub_FFA487EC_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6
7 typedef struct {
8 unsigned int address;
9 unsigned int length;
10 } cam_ptp_data_chunk;
11
12 #define MAX_CHUNKS_FOR_FWT 4
13
14
15
16
17
18
19
20 typedef struct
21 {
22 int unkn1[5];
23 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
24 int unkn6;
25 char name[32];
26 } fwt_data_struct;
27
28 #include "../../../generic/filewrite.c"
29
30
31
32 void __attribute__((naked,noinline)) filewritetask() {
33 asm volatile (
34 " STMFD SP!, {R1-R5,LR} \n"
35 " LDR R4, =0x9C40 \n"
36
37 "loc_FFA4895C:\n"
38 " LDR R0, [R4, #0x10] \n"
39 " MOV R2, #0 \n"
40 " ADD R1, SP, #8 \n"
41 " BL sub_FF837DC8 /*_ReceiveMessageQueue*/ \n"
42 " CMP R0, #0 \n"
43 " BNE loc_FFA4898C \n"
44 " LDR R0, [SP, #8] \n"
45 " LDR R1, [R0] \n"
46 " CMP R1, #1 \n"
47 " BNE loc_FFA48994 \n"
48 " LDR R0, [R4, #8] \n"
49 " BL _GiveSemaphore \n"
50
51 "loc_FFA4898C:\n"
52 " BL _ExitTask \n"
53 " LDMFD SP!, {R1-R5,PC} \n"
54
55 "loc_FFA48994:\n"
56 " SUB R1, R1, #2 \n"
57 " CMP R1, #6 \n"
58 " ADDLS PC, PC, R1, LSL#2 \n"
59 " B loc_FFA4895C \n"
60 " B loc_FFA489C0 \n"
61 " B loc_FFA48A24 \n"
62 " B loc_FFA48A2C \n"
63 " B loc_FFA48A2C \n"
64 " B loc_FFA48A2C \n"
65 " B loc_FFA48A2C \n"
66 " B loc_FFA48A34 \n"
67
68 "loc_FFA489C0:\n"
69 " MOV R0, #0 \n"
70 " STR R0, [SP] \n"
71
72 "loc_FFA489C8:\n"
73 " LDR R0, [R4, #0x10] \n"
74 " MOV R1, SP \n"
75 " BL sub_FF83800C /*_GetNumberOfPostedMessages*/ \n"
76 " LDR R0, [SP] \n"
77 " CMP R0, #0 \n"
78 " BEQ loc_FFA489F4 \n"
79 " LDR R0, [R4, #0x10] \n"
80 " MOV R2, #0 \n"
81 " ADD R1, SP, #4 \n"
82 " BL sub_FF837DC8 /*_ReceiveMessageQueue*/ \n"
83 " B loc_FFA489C8 \n"
84
85 "loc_FFA489F4:\n"
86 " LDR R0, [R4] \n"
87 " CMN R0, #1 \n"
88 " BEQ loc_FFA48A18 \n"
89 " BL fwt_close \n"
90 " MVN R0, #0 \n"
91 " STR R0, [R4] \n"
92 " LDR R0, =0xC151C \n"
93 " BL sub_FF868934 \n"
94 " BL sub_FF866D18 \n"
95
96 "loc_FFA48A18:\n"
97 " LDR R0, [R4, #0xC] \n"
98 " BL _GiveSemaphore \n"
99 " B loc_FFA4895C \n"
100
101 "loc_FFA48A24:\n"
102 " BL sub_FFA48C40_my \n"
103 " B loc_FFA4895C \n"
104
105 "loc_FFA48A2C:\n"
106 " BL sub_FFA48D74_my \n"
107 " B loc_FFA4895C \n"
108
109 "loc_FFA48A34:\n"
110 " BL sub_FFA487EC_my \n"
111 " B loc_FFA4895C \n"
112 );
113 }
114
115
116
117 void __attribute__((naked,noinline)) sub_FFA48C40_my() {
118 asm volatile (
119 " STMFD SP!, {R4-R8,LR} \n"
120 " MOV R4, R0 \n"
121 " ADD R0, R0, #0x38 \n"
122 " SUB SP, SP, #0x38 \n"
123 " BL sub_FF868934 \n"
124 " MOV R1, #0 \n"
125 " BL sub_FF866CC8 \n"
126 " LDR R0, [R4, #0xC] \n"
127 " BL sub_FF810338 \n"
128 " LDR R7, [R4, #8] \n"
129 " LDR R8, =0x1B6 \n"
130 " ADD R6, R4, #0x38 \n"
131 " LDR R5, [R4, #0xC] \n"
132
133 " MOV R0, R4\n"
134 " BL filewrite_main_hook\n"
135
136 " MOV R0, R6 \n"
137 " MOV R1, R7 \n"
138 " MOV R2, R8 \n"
139 " BL fwt_open \n"
140 " LDR PC, =0xFFA48C84 \n"
141 );
142 }
143
144
145
146 void __attribute__((naked,noinline)) sub_FFA48D74_my() {
147 asm volatile (
148 " STMFD SP!, {R4-R10,LR} \n"
149 " MOV R4, R0 \n"
150 " LDR R0, [R0] \n"
151 " CMP R0, #4 \n"
152 " LDREQ R6, [R4, #0x18] \n"
153 " LDREQ R7, [R4, #0x14] \n"
154 " BEQ loc_FFA48DC0 \n"
155 " CMP R0, #5 \n"
156 " LDREQ R6, [R4, #0x20] \n"
157 " LDREQ R7, [R4, #0x1C] \n"
158 " BEQ loc_FFA48DC0 \n"
159 " CMP R0, #6 \n"
160 " LDREQ R6, [R4, #0x28] \n"
161 " LDREQ R7, [R4, #0x24] \n"
162 " BEQ loc_FFA48DC0 \n"
163 " CMP R0, #7 \n"
164 " BNE loc_FFA48DD4 \n"
165 " LDR R6, [R4, #0x30] \n"
166 " LDR R7, [R4, #0x2C] \n"
167
168 "loc_FFA48DC0:\n"
169 " CMP R6, #0 \n"
170 " BNE loc_FFA48DE4 \n"
171
172 "loc_FFA48DC8:\n"
173 " MOV R1, R4 \n"
174 " MOV R0, #8 \n"
175 " B loc_FFA48E78 \n"
176
177 "loc_FFA48DD4:\n"
178 " LDR R1, =0x297 \n"
179 " LDR R0, =0xFFA48A48 /*'dwFWrite.c'*/ \n"
180 " BL _DebugAssert \n"
181 " B loc_FFA48DC8 \n"
182
183 "loc_FFA48DE4:\n"
184 " LDR R9, =0x9C40 \n"
185 " MOV R5, R6 \n"
186
187 "loc_FFA48DEC:\n"
188 " LDR R0, [R4, #4] \n"
189 " CMP R5, #0x1000000 \n"
190 " MOVLS R8, R5 \n"
191 " MOVHI R8, #0x1000000 \n"
192 " BIC R1, R0, #0xFF000000 \n"
193 " CMP R1, #0 \n"
194 " BICNE R0, R0, #0xFF000000 \n"
195 " RSBNE R0, R0, #0x1000000 \n"
196 " CMPNE R8, R0 \n"
197 " MOVHI R8, R0 \n"
198 " LDR R0, [R9] \n"
199 " MOV R2, R8 \n"
200 " MOV R1, R7 \n"
201 " BL fwt_write \n"
202 " LDR R1, [R4, #4] \n"
203 " CMP R8, R0 \n"
204 " ADD R1, R1, R0 \n"
205 " STR R1, [R4, #4] \n"
206 " BEQ loc_FFA48E4C \n"
207 " CMN R0, #1 \n"
208 " LDRNE R0, =0x9200015 \n"
209 " LDREQ R0, =0x9200005 \n"
210 " STR R0, [R4, #0x10] \n"
211 " B loc_FFA48DC8 \n"
212
213 "loc_FFA48E4C:\n"
214 " SUB R5, R5, R0 \n"
215 " CMP R5, R6 \n"
216 " ADD R7, R7, R0 \n"
217 " LDRCS R0, =0xFFA48A48 /*'dwFWrite.c'*/ \n"
218 " LDRCS R1, =0x2C2 \n"
219 " BLCS _DebugAssert \n"
220 " CMP R5, #0 \n"
221 " BNE loc_FFA48DEC \n"
222 " LDR R0, [R4] \n"
223 " MOV R1, R4 \n"
224 " ADD R0, R0, #1 \n"
225
226 "loc_FFA48E78:\n"
227 " LDMFD SP!, {R4-R10,LR} \n"
228 " B sub_FFA4872C \n"
229 );
230 }
231
232
233
234 void __attribute__((naked,noinline)) sub_FFA487EC_my() {
235 asm volatile (
236 " STMFD SP!, {R4-R6,LR} \n"
237 " LDR R5, =0x9C40 \n"
238 " MOV R4, R0 \n"
239 " LDR R0, [R5] \n"
240 " SUB SP, SP, #0x38 \n"
241 " CMN R0, #1 \n"
242 " BEQ sub_FFA48834 \n"
243 " LDR R1, [R4, #8] \n"
244 " LDR R6, =0x9200003 \n"
245 " TST R1, #0x8000 \n"
246 " BEQ loc_FFA48820 \n"
247
248 " LDR R3, =current_write_ignored\n"
249 " LDR R3, [R3]\n"
250 " CMP R3, #0\n"
251 " BNE loc_D\n"
252
253
254 " BL sub_FF865D78 \n"
255 " B sub_FFA48824 \n"
256
257 "loc_FFA48820:\n"
258 "loc_D:\n"
259 " BL fwt_close \n"
260 " LDR PC, =0xFFA48824 \n"
261 );
262 }