This source file includes following definitions.
- capt_seq_task
- sub_FFC4A3B8_my
- sub_FFCFC540_my
- exp_drv_task
- sub_FFC7C7F8_my
- sub_FFC6E244_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R9,LR} \n"
17 " LDR R6, =0x2850 \n"
18 " LDR R4, =0x11F70 \n"
19 " MOV R9, #1 \n"
20 " MOV R7, #0 \n"
21
22 "loc_FFC49FF4:\n"
23 " LDR R0, [R6, #4] \n"
24 " MOV R2, #0 \n"
25 " MOV R1, SP \n"
26 " BL sub_FFC167B8 /*_ReceiveMessageQueue*/ \n"
27 " TST R0, #1 \n"
28 " BEQ loc_FFC4A020 \n"
29 " LDR R1, =0x588 \n"
30 " LDR R0, =0xFFC49B94 /*'SsShootTask.c'*/ \n"
31 " BL _DebugAssert \n"
32 " BL _ExitTask \n"
33 " LDMFD SP!, {R3-R9,PC} \n"
34
35 "loc_FFC4A020:\n"
36 " LDR R0, [SP] \n"
37 " LDR R1, [R0] \n"
38 " CMP R1, #0x1D \n"
39 " ADDLS PC, PC, R1, LSL#2 \n"
40 " B loc_FFC4A294 \n"
41 " B loc_FFC4A0AC \n"
42 " B loc_FFC4A110 \n"
43 " B loc_FFC4A14C \n"
44 " B loc_FFC4A160 \n"
45 " B loc_FFC4A158 \n"
46 " B loc_FFC4A168 \n"
47 " B loc_FFC4A170 \n"
48 " B loc_FFC4A178 \n"
49 " B loc_FFC4A1D0 \n"
50 " B loc_FFC4A1F8 \n"
51 " B loc_FFC4A1DC \n"
52 " B loc_FFC4A1E8 \n"
53 " B loc_FFC4A1F0 \n"
54 " B loc_FFC4A200 \n"
55 " B loc_FFC4A208 \n"
56 " B loc_FFC4A210 \n"
57 " B loc_FFC4A218 \n"
58 " B loc_FFC4A220 \n"
59 " B loc_FFC4A22C \n"
60 " B loc_FFC4A234 \n"
61 " B loc_FFC4A23C \n"
62 " B loc_FFC4A244 \n"
63 " B loc_FFC4A24C \n"
64 " B loc_FFC4A258 \n"
65 " B loc_FFC4A260 \n"
66 " B loc_FFC4A268 \n"
67 " B loc_FFC4A270 \n"
68 " B loc_FFC4A278 \n"
69 " B loc_FFC4A284 \n"
70 " B loc_FFC4A2A0 \n"
71
72 "loc_FFC4A0AC:\n"
73 " BL sub_FFC4A8B8 \n"
74
75 " BL captseq_hack_override_active\n"
76 " STR R0,[SP,#-4]!\n"
77 " BL shooting_expo_param_override\n"
78 " BL sub_FFC47F08 \n"
79 " LDR R0,[SP],#4\n"
80 " CMP R0, #1\n"
81 " MOVEQ R0, #0\n"
82 " STREQ R0, [R4,#0x24]\n"
83 " LDRNE R0, [R4,#0x24]\n"
84 " CMPNE R0, #0\n"
85
86
87 " BEQ loc_FFC4A2A0 \n"
88 " BL sub_FFC49870 \n"
89 " MOV R5, R0 \n"
90 " LDR R0, [R4, #0x24] \n"
91 " CMP R0, #0 \n"
92 " BEQ loc_FFC4A0F4 \n"
93 " MOV R0, #0xC \n"
94 " BL sub_FFC4E41C \n"
95 " TST R0, #1 \n"
96 " STRNE R9, [R6, #0x10] \n"
97 " LDRNE R0, [R5, #8] \n"
98 " ORRNE R0, R0, #0x40000000 \n"
99 " STRNE R0, [R5, #8] \n"
100 " BNE loc_FFC4A2A0 \n"
101
102 "loc_FFC4A0F4:\n"
103 " MOV R0, R5 \n"
104 " BL sub_FFC49B14 \n"
105 " MOV R0, R5 \n"
106 " BL sub_FFCFC540 \n"
107 " TST R0, #1 \n"
108 " STRNE R9, [R6, #0x10] \n"
109 " B loc_FFC4A2A0 \n"
110
111 "loc_FFC4A110:\n"
112 " LDR R0, [R4, #0x24] \n"
113 " CMP R0, #0 \n"
114 " BNE loc_FFC4A13C \n"
115 " MOV R0, #0xC \n"
116 " BL sub_FFC4E41C \n"
117 " TST R0, #1 \n"
118 " LDRNE R0, [SP] \n"
119 " MOVNE R1, #1 \n"
120 " LDRNE R2, [R0, #0xC] \n"
121 " MOVNE R0, #1 \n"
122 " BNE loc_FFC4A1C8 \n"
123
124 "loc_FFC4A13C:\n"
125 " LDR R0, [SP] \n"
126 " BL sub_FFC4A3B8_my \n"
127
128 "loc_FFC4A144:\n"
129 " STR R7, [R4, #0x24] \n"
130 " B loc_FFC4A2A0 \n"
131
132 "loc_FFC4A14C:\n"
133 " MOV R0, #1 \n"
134 " BL sub_FFC4AAC4 \n"
135 " B loc_FFC4A2A0 \n"
136
137 "loc_FFC4A158:\n"
138 " BL sub_FFC4A528 \n"
139 " B loc_FFC4A144 \n"
140
141 "loc_FFC4A160:\n"
142 " BL sub_FFC4A898 \n"
143 " B loc_FFC4A144 \n"
144
145 "loc_FFC4A168:\n"
146 " BL sub_FFC4A8A0 \n"
147 " B loc_FFC4A2A0 \n"
148
149 "loc_FFC4A170:\n"
150 " BL sub_FFC4A9E4 \n"
151 " B loc_FFC4A1D4 \n"
152
153 "loc_FFC4A178:\n"
154 " LDR R5, [R0, #0xC] \n"
155 " BL sub_FFC4A8A8 \n"
156 " MOV R0, R5 \n"
157 " BL sub_FFCFB5EC \n"
158 " TST R0, #1 \n"
159 " MOV R8, R0 \n"
160 " BNE loc_FFC4A1B8 \n"
161 " BL sub_FFC5A478 \n"
162 " STR R0, [R5, #0x18] \n"
163 " MOV R0, R5 \n"
164 " BL sub_FFCFC478 \n"
165 " MOV R0, R5 \n"
166 " BL sub_FFCFC824 \n"
167 " MOV R8, R0 \n"
168 " LDR R0, [R5, #0x18] \n"
169 " BL sub_FFC5A68C \n"
170
171 "loc_FFC4A1B8:\n"
172 " BL sub_FFC4A898 \n"
173 " MOV R2, R5 \n"
174 " MOV R1, #9 \n"
175 " MOV R0, R8 \n"
176
177 "loc_FFC4A1C8:\n"
178 " BL sub_FFC483E8 \n"
179 " B loc_FFC4A2A0 \n"
180
181 "loc_FFC4A1D0:\n"
182 " BL sub_FFC4AA44 \n"
183
184 "loc_FFC4A1D4:\n"
185 " BL sub_FFC47F08 \n"
186 " B loc_FFC4A2A0 \n"
187
188 "loc_FFC4A1DC:\n"
189 " LDR R0, [R4, #0x54] \n"
190 " BL sub_FFC4AE20 \n"
191 " B loc_FFC4A2A0 \n"
192
193 "loc_FFC4A1E8:\n"
194 " BL sub_FFC4B0C8 \n"
195 " B loc_FFC4A2A0 \n"
196
197 "loc_FFC4A1F0:\n"
198 " BL sub_FFC4B15C \n"
199 " B loc_FFC4A2A0 \n"
200
201 "loc_FFC4A1F8:\n"
202 " BL sub_FFC4A898 \n"
203 " B loc_FFC4A2A0 \n"
204
205 "loc_FFC4A200:\n"
206 " BL sub_FFCFB7FC \n"
207 " B loc_FFC4A2A0 \n"
208
209 "loc_FFC4A208:\n"
210 " BL sub_FFCFB9DC \n"
211 " B loc_FFC4A2A0 \n"
212
213 "loc_FFC4A210:\n"
214 " BL sub_FFCFBA6C \n"
215 " B loc_FFC4A2A0 \n"
216
217 "loc_FFC4A218:\n"
218 " BL sub_FFCFBB14 \n"
219 " B loc_FFC4A2A0 \n"
220
221 "loc_FFC4A220:\n"
222 " MOV R0, #0 \n"
223 " BL sub_FFCFBCD0 \n"
224 " B loc_FFC4A2A0 \n"
225
226 "loc_FFC4A22C:\n"
227 " BL sub_FFCFBE08 \n"
228 " B loc_FFC4A2A0 \n"
229
230 "loc_FFC4A234:\n"
231 " BL sub_FFCFBE98 \n"
232 " B loc_FFC4A2A0 \n"
233
234 "loc_FFC4A23C:\n"
235 " BL sub_FFCFBF58 \n"
236 " B loc_FFC4A2A0 \n"
237
238 "loc_FFC4A244:\n"
239 " BL sub_FFC4AC24 \n"
240 " B loc_FFC4A2A0 \n"
241
242 "loc_FFC4A24C:\n"
243 " BL sub_FFC4ACB0 \n"
244 " BL sub_FFC1498C \n"
245 " B loc_FFC4A2A0 \n"
246
247 "loc_FFC4A258:\n"
248 " BL sub_FFCFBBD0 \n"
249 " B loc_FFC4A2A0 \n"
250
251 "loc_FFC4A260:\n"
252 " BL sub_FFCFBC14 \n"
253 " B loc_FFC4A2A0 \n"
254
255 "loc_FFC4A268:\n"
256 " BL sub_FFC4CC98 \n"
257 " B loc_FFC4A2A0 \n"
258
259 "loc_FFC4A270:\n"
260 " BL sub_FFC4CCF4 \n"
261 " B loc_FFC4A2A0 \n"
262
263 "loc_FFC4A278:\n"
264 " BL sub_FFC4CD50 \n"
265 " BL sub_FFC4CD10 \n"
266 " B loc_FFC4A2A0 \n"
267
268 "loc_FFC4A284:\n"
269 " LDRH R0, [R4, #0x98] \n"
270 " CMP R0, #4 \n"
271 " BLNE sub_FFC4CFBC \n"
272 " B loc_FFC4A2A0 \n"
273
274 "loc_FFC4A294:\n"
275 " LDR R1, =0x6C9 \n"
276 " LDR R0, =0xFFC49B94 /*'SsShootTask.c'*/ \n"
277 " BL _DebugAssert \n"
278
279 "loc_FFC4A2A0:\n"
280 " LDR R0, [SP] \n"
281 " LDR R1, [R0, #4] \n"
282 " LDR R0, [R6] \n"
283 " BL sub_FFC524CC /*_SetEventFlag*/ \n"
284 " LDR R5, [SP] \n"
285 " LDR R0, [R5, #8] \n"
286 " CMP R0, #0 \n"
287 " LDREQ R1, =0x12B \n"
288 " LDREQ R0, =0xFFC49B94 /*'SsShootTask.c'*/ \n"
289 " BLEQ _DebugAssert \n"
290 " STR R7, [R5, #8] \n"
291 " B loc_FFC49FF4 \n"
292 );
293 }
294
295
296
297 void __attribute__((naked,noinline)) sub_FFC4A3B8_my() {
298 asm volatile (
299 " STMFD SP!, {R4-R6,LR} \n"
300 " LDR R4, [R0, #0xC] \n"
301 " LDR R6, =0x11F70 \n"
302 " LDR R0, [R4, #8] \n"
303 " MOV R5, #0 \n"
304 " ORR R0, R0, #1 \n"
305 " STR R0, [R4, #8] \n"
306 " LDR R0, [R6, #0x24] \n"
307 " CMP R0, #0 \n"
308 " MOVEQ R0, #2 \n"
309 " BLEQ sub_FFC45BD0 \n"
310 " BL sub_FFC4A8A8 \n"
311 " LDR R0, [R6, #0x24] \n"
312 " CMP R0, #0 \n"
313 " BNE loc_FFC4A454 \n"
314 " MOV R0, R4 \n"
315 " BL sub_FFC4ABD8 \n"
316 " MOV R0, R4 \n"
317 " BL sub_FFCFB294 \n"
318 " CMP R0, #0 \n"
319 " MOV R0, R4 \n"
320 " BEQ loc_FFC4A42C \n"
321 " BL sub_FFCFB320 \n"
322 " TST R0, #1 \n"
323 " MOVNE R2, R4 \n"
324 " LDMNEFD SP!, {R4-R6,LR} \n"
325 " MOVNE R1, #1 \n"
326 " BNE sub_FFC483E8 \n"
327 " B loc_FFC4A430 \n"
328
329 "loc_FFC4A42C:\n"
330 " BL sub_FFCFB2E4 \n"
331
332 "loc_FFC4A430:\n"
333 " MOV R0, R4 \n"
334 " BL sub_FFC49B14 \n"
335 " MOV R0, R4 \n"
336 " BL sub_FFCFC478 \n"
337 " BL sub_FFCFCEA0 \n"
338 " MOV R0, R4 \n"
339 " BL sub_FFCFC540_my \n"
340 " BL capt_seq_hook_raw_here\n"
341 " MOV R5, R0 \n"
342 " B loc_FFC4A464 \n"
343
344 "loc_FFC4A454:\n"
345 " LDR R0, =0x2850 \n"
346 " LDR R0, [R0, #0x10] \n"
347 " CMP R0, #0 \n"
348 " MOVNE R5, #0x1D \n"
349
350 "loc_FFC4A464:\n"
351 " BL sub_FFC4CCF4 \n"
352 " BL sub_FFC4CD3C \n"
353 " BL sub_FFC4CD7C \n"
354 " MOV R2, R4 \n"
355 " MOV R1, #1 \n"
356 " MOV R0, R5 \n"
357 " BL sub_FFC483E8 \n"
358 " BL sub_FFCFC7C8 \n"
359 " CMP R0, #0 \n"
360 " LDRNE R0, [R4, #8] \n"
361 " ORRNE R0, R0, #0x2000 \n"
362 " STRNE R0, [R4, #8] \n"
363 " LDMFD SP!, {R4-R6,PC} \n"
364 );
365 }
366
367
368
369 void __attribute__((naked,noinline)) sub_FFCFC540_my() {
370 asm volatile (
371 " STMFD SP!, {R0-R8,LR} \n"
372 " MOV R4, R0 \n"
373 " BL sub_FFCFD00C \n"
374 " MVN R1, #0 \n"
375 " BL sub_FFC52500 /*_ClearEventFlag*/ \n"
376 " LDR R5, =0x5B30 \n"
377 " LDR R0, [R5, #0xC] \n"
378 " CMP R0, #0 \n"
379 " BNE loc_FFCFC590 \n"
380 " MOV R1, #1 \n"
381 " MOV R0, #0 \n"
382 " BL sub_FFC17000 /*_CreateMessageQueueStrictly*/ \n"
383 " STR R0, [R5, #0xC] \n"
384 " MOV R3, #0 \n"
385 " STR R3, [SP] \n"
386 " LDR R3, =0xFFCFC048 \n"
387 " LDR R0, =0xFFCFC798 /*'ShutterSoundTask'*/ \n"
388 " MOV R2, #0x400 \n"
389 " MOV R1, #0x17 \n"
390 " BL sub_FFC16FCC /*_CreateTaskStrictly*/ \n"
391
392 "loc_FFCFC590:\n"
393 " MOV R2, #4 \n"
394 " ADD R1, SP, #8 \n"
395 " MOV R0, #0x8A \n"
396 " BL _GetPropertyCase \n"
397 " TST R0, #1 \n"
398 " LDRNE R1, =0x3A7 \n"
399 " LDRNE R0, =0xFFCFC2B4 /*'SsCaptureSeq.c'*/ \n"
400 " BLNE _DebugAssert \n"
401 " LDR R7, =0x12034 \n"
402 " LDR R8, =0x11F70 \n"
403 " LDRSH R1, [R7, #0xE] \n"
404 " LDR R0, [R8, #0x8C] \n"
405 " BL sub_FFCC3CD0 \n"
406 " BL _GetCCDTemperature \n"
407 " LDR R3, =0x5B38 \n"
408 " STRH R0, [R4, #0x9C] \n"
409 " SUB R2, R3, #4 \n"
410 " STRD R2, [SP] \n"
411 " MOV R1, R0 \n"
412 " LDRH R0, [R8, #0x5C] \n"
413 " LDRSH R2, [R7, #0xC] \n"
414 " SUB R3, R3, #8 \n"
415 " BL sub_FFCFD5F8 \n"
416 " BL wait_until_remote_button_is_released\n"
417 " BL capt_seq_hook_set_nr\n"
418 " LDR PC, =0xFFCFC5EC \n"
419 );
420 }
421
422
423
424 void __attribute__((naked,noinline)) exp_drv_task() {
425 asm volatile (
426 " STMFD SP!, {R4-R8,LR} \n"
427 " SUB SP, SP, #0x20 \n"
428 " LDR R8, =0xBB8 \n"
429 " LDR R7, =0x38EC \n"
430 " LDR R5, =0x16AD4 \n"
431 " MOV R0, #0 \n"
432 " ADD R6, SP, #0x10 \n"
433 " STR R0, [SP, #0xC] \n"
434
435 "loc_FFC7EEA8:\n"
436 " LDR R0, [R7, #0x20] \n"
437 " MOV R2, #0 \n"
438 " ADD R1, SP, #0x1C \n"
439 " BL sub_FFC167B8 /*_ReceiveMessageQueue*/ \n"
440 " LDR R0, [SP, #0xC] \n"
441 " CMP R0, #1 \n"
442 " BNE loc_FFC7EEF4 \n"
443 " LDR R0, [SP, #0x1C] \n"
444 " LDR R0, [R0] \n"
445 " CMP R0, #0x13 \n"
446 " CMPNE R0, #0x14 \n"
447 " CMPNE R0, #0x15 \n"
448 " CMPNE R0, #0x16 \n"
449 " BEQ loc_FFC7F010 \n"
450 " CMP R0, #0x28 \n"
451 " BEQ loc_FFC7EFE8 \n"
452 " ADD R1, SP, #0xC \n"
453 " MOV R0, #0 \n"
454 " BL sub_FFC7EE38 \n"
455
456 "loc_FFC7EEF4:\n"
457 " LDR R0, [SP, #0x1C] \n"
458 " LDR R1, [R0] \n"
459 " CMP R1, #0x2D \n"
460 " BNE loc_FFC7EF24 \n"
461 " LDR R0, [SP, #0x1C] \n"
462 " BL sub_FFC8013C \n"
463 " LDR R0, [R7, #0x1C] \n"
464 " MOV R1, #1 \n"
465 " BL sub_FFC524CC /*_SetEventFlag*/ \n"
466 " BL _ExitTask \n"
467 " ADD SP, SP, #0x20 \n"
468 " LDMFD SP!, {R4-R8,PC} \n"
469
470 "loc_FFC7EF24:\n"
471 " CMP R1, #0x2C \n"
472 " BNE loc_FFC7EF40 \n"
473 " LDR R2, [R0, #0x88]! \n"
474 " LDR R1, [R0, #4] \n"
475 " MOV R0, R1 \n"
476 " BLX R2 \n"
477 " B loc_FFC7F438 \n"
478
479 "loc_FFC7EF40:\n"
480 " CMP R1, #0x26 \n"
481 " BNE loc_FFC7EF90 \n"
482 " LDR R0, [R7, #0x1C] \n"
483 " MOV R1, #0x80 \n"
484 " BL sub_FFC52500 /*_ClearEventFlag*/ \n"
485 " LDR R0, =0xFFC7B7A8 \n"
486 " MOV R1, #0x80 \n"
487 " BL sub_FFCF1080 \n"
488 " LDR R0, [R7, #0x1C] \n"
489 " MOV R2, R8 \n"
490 " MOV R1, #0x80 \n"
491 " BL sub_FFC5240C /*_WaitForAllEventFlag*/ \n"
492 " TST R0, #1 \n"
493 " LDRNE R1, =0xDC6 \n"
494 " BNE loc_FFC7EFD4 \n"
495
496 "loc_FFC7EF7C:\n"
497 " LDR R1, [SP, #0x1C] \n"
498 " LDR R0, [R1, #0x8C] \n"
499 " LDR R1, [R1, #0x88] \n"
500 " BLX R1 \n"
501 " B loc_FFC7F438 \n"
502
503 "loc_FFC7EF90:\n"
504 " CMP R1, #0x27 \n"
505 " BNE loc_FFC7EFE0 \n"
506 " ADD R1, SP, #0xC \n"
507 " BL sub_FFC7EE38 \n"
508 " LDR R0, [R7, #0x1C] \n"
509 " MOV R1, #0x100 \n"
510 " BL sub_FFC52500 /*_ClearEventFlag*/ \n"
511 " MOV R1, #0x100 \n"
512 " LDR R0, =0xFFC7B7B8 \n"
513 " BL sub_FFCF1308 \n"
514 " LDR R0, [R7, #0x1C] \n"
515 " MOV R2, R8 \n"
516 " MOV R1, #0x100 \n"
517 " BL sub_FFC5240C /*_WaitForAllEventFlag*/ \n"
518 " TST R0, #1 \n"
519 " BEQ loc_FFC7EF7C \n"
520 " MOV R1, #0xDD0 \n"
521
522 "loc_FFC7EFD4:\n"
523 " LDR R0, =0xFFC7BDE8 /*'ExpDrv.c'*/ \n"
524 " BL _DebugAssert \n"
525 " B loc_FFC7EF7C \n"
526
527 "loc_FFC7EFE0:\n"
528 " CMP R1, #0x28 \n"
529 " BNE loc_FFC7EFF8 \n"
530
531 "loc_FFC7EFE8:\n"
532 " LDR R0, [SP, #0x1C] \n"
533 " ADD R1, SP, #0xC \n"
534 " BL sub_FFC7EE38 \n"
535 " B loc_FFC7EF7C \n"
536
537 "loc_FFC7EFF8:\n"
538 " CMP R1, #0x2B \n"
539 " BNE loc_FFC7F010 \n"
540 " BL sub_FFC6E4D4 \n"
541 " BL sub_FFC6F160 \n"
542 " BL sub_FFC6EC98 \n"
543 " B loc_FFC7EF7C \n"
544
545 "loc_FFC7F010:\n"
546 " LDR R0, [SP, #0x1C] \n"
547 " MOV R4, #1 \n"
548 " LDR R1, [R0] \n"
549 " CMP R1, #0x11 \n"
550 " CMPNE R1, #0x12 \n"
551 " BNE loc_FFC7F080 \n"
552 " LDR R1, [R0, #0x7C] \n"
553 " ADD R1, R1, R1, LSL#1 \n"
554 " ADD R1, R0, R1, LSL#2 \n"
555 " SUB R1, R1, #8 \n"
556 " LDMIA R1, {R2-R4} \n"
557 " STMIA R6, {R2-R4} \n"
558 " BL sub_FFC7D880 \n"
559 " LDR R0, [SP, #0x1C] \n"
560 " LDR R1, [R0, #0x7C] \n"
561 " LDR R3, [R0, #0x88] \n"
562 " LDR R2, [R0, #0x8C] \n"
563 " ADD R0, R0, #4 \n"
564 " BLX R3 \n"
565 " LDR R0, [SP, #0x1C] \n"
566 " BL sub_FFC804F4 \n"
567 " LDR R0, [SP, #0x1C] \n"
568 " LDR R1, [R0, #0x7C] \n"
569 " LDR R3, [R0, #0x90] \n"
570 " LDR R2, [R0, #0x94] \n"
571 " ADD R0, R0, #4 \n"
572 " BLX R3 \n"
573 " B loc_FFC7F378 \n"
574
575 "loc_FFC7F080:\n"
576 " CMP R1, #0x13 \n"
577 " CMPNE R1, #0x14 \n"
578 " CMPNE R1, #0x15 \n"
579 " CMPNE R1, #0x16 \n"
580 " BNE loc_FFC7F138 \n"
581 " ADD R3, SP, #0xC \n"
582 " MOV R2, SP \n"
583 " ADD R1, SP, #0x10 \n"
584 " BL sub_FFC7DAC4 \n"
585 " CMP R0, #1 \n"
586 " MOV R4, R0 \n"
587 " CMPNE R4, #5 \n"
588 " BNE loc_FFC7F0D4 \n"
589 " LDR R0, [SP, #0x1C] \n"
590 " MOV R2, R4 \n"
591 " LDR R1, [R0, #0x7C]! \n"
592 " LDR R12, [R0, #0xC]! \n"
593 " LDR R3, [R0, #4] \n"
594 " MOV R0, SP \n"
595 " BLX R12 \n"
596 " B loc_FFC7F10C \n"
597
598 "loc_FFC7F0D4:\n"
599 " LDR R0, [SP, #0x1C] \n"
600 " CMP R4, #2 \n"
601 " LDR R3, [R0, #0x8C] \n"
602 " CMPNE R4, #6 \n"
603 " BNE loc_FFC7F120 \n"
604 " LDR R12, [R0, #0x88] \n"
605 " MOV R0, SP \n"
606 " MOV R2, R4 \n"
607 " MOV R1, #1 \n"
608 " BLX R12 \n"
609 " LDR R0, [SP, #0x1C] \n"
610 " MOV R2, SP \n"
611 " ADD R1, SP, #0x10 \n"
612 " BL sub_FFC7EB20 \n"
613
614 "loc_FFC7F10C:\n"
615 " LDR R0, [SP, #0x1C] \n"
616 " LDR R2, [SP, #0xC] \n"
617 " MOV R1, R4 \n"
618 " BL sub_FFC7EDD8 \n"
619 " B loc_FFC7F378 \n"
620
621 "loc_FFC7F120:\n"
622 " LDR R1, [R0, #0x7C] \n"
623 " LDR R12, [R0, #0x88] \n"
624 " ADD R0, R0, #4 \n"
625 " MOV R2, R4 \n"
626 " BLX R12 \n"
627 " B loc_FFC7F378 \n"
628
629 "loc_FFC7F138:\n"
630 " CMP R1, #0x22 \n"
631 " CMPNE R1, #0x23 \n"
632 " BNE loc_FFC7F184 \n"
633 " LDR R1, [R0, #0x7C] \n"
634 " ADD R1, R1, R1, LSL#1 \n"
635 " ADD R1, R0, R1, LSL#2 \n"
636 " SUB R1, R1, #8 \n"
637 " LDMIA R1, {R2-R4} \n"
638 " STMIA R6, {R2-R4} \n"
639 " BL sub_FFC7CE0C \n"
640 " LDR R0, [SP, #0x1C] \n"
641 " LDR R1, [R0, #0x7C] \n"
642 " LDR R3, [R0, #0x88] \n"
643 " LDR R2, [R0, #0x8C] \n"
644 " ADD R0, R0, #4 \n"
645 " BLX R3 \n"
646 " LDR R0, [SP, #0x1C] \n"
647 " BL sub_FFC7D0FC \n"
648 " B loc_FFC7F378 \n"
649
650 "loc_FFC7F184:\n"
651 " ADD R1, R0, #4 \n"
652 " LDMIA R1, {R2,R3,R12} \n"
653 " STMIA R6, {R2,R3,R12} \n"
654 " LDR R1, [R0] \n"
655 " CMP R1, #0x25 \n"
656 " ADDLS PC, PC, R1, LSL#2 \n"
657 " B loc_FFC7F358 \n"
658 " B loc_FFC7F238 \n"
659 " B loc_FFC7F238 \n"
660 " B loc_FFC7F240 \n"
661 " B loc_FFC7F248 \n"
662 " B loc_FFC7F248 \n"
663 " B loc_FFC7F248 \n"
664 " B loc_FFC7F238 \n"
665 " B loc_FFC7F240 \n"
666 " B loc_FFC7F248 \n"
667 " B loc_FFC7F248 \n"
668 " B loc_FFC7F260 \n"
669 " B loc_FFC7F260 \n"
670 " B loc_FFC7F34C \n"
671 " B loc_FFC7F354 \n"
672 " B loc_FFC7F354 \n"
673 " B loc_FFC7F354 \n"
674 " B loc_FFC7F354 \n"
675 " B loc_FFC7F358 \n"
676 " B loc_FFC7F358 \n"
677 " B loc_FFC7F358 \n"
678 " B loc_FFC7F358 \n"
679 " B loc_FFC7F358 \n"
680 " B loc_FFC7F358 \n"
681 " B loc_FFC7F250 \n"
682 " B loc_FFC7F258 \n"
683 " B loc_FFC7F258 \n"
684 " B loc_FFC7F26C \n"
685 " B loc_FFC7F26C \n"
686 " B loc_FFC7F274 \n"
687 " B loc_FFC7F2A4 \n"
688 " B loc_FFC7F2D4 \n"
689 " B loc_FFC7F304 \n"
690 " B loc_FFC7F334 \n"
691 " B loc_FFC7F334 \n"
692 " B loc_FFC7F358 \n"
693 " B loc_FFC7F358 \n"
694 " B loc_FFC7F33C \n"
695 " B loc_FFC7F344 \n"
696
697 "loc_FFC7F238:\n"
698 " BL sub_FFC7BC94 \n"
699 " B loc_FFC7F358 \n"
700
701 "loc_FFC7F240:\n"
702 " BL sub_FFC7BF08 \n"
703 " B loc_FFC7F358 \n"
704
705 "loc_FFC7F248:\n"
706 " BL sub_FFC7C10C \n"
707 " B loc_FFC7F358 \n"
708
709 "loc_FFC7F250:\n"
710 " BL sub_FFC7C374 \n"
711 " B loc_FFC7F358 \n"
712
713 "loc_FFC7F258:\n"
714 " BL sub_FFC7C568 \n"
715 " B loc_FFC7F358 \n"
716
717 "loc_FFC7F260:\n"
718 " BL sub_FFC7C7F8_my \n"
719 " MOV R4, #0 \n"
720 " B loc_FFC7F358 \n"
721
722 "loc_FFC7F26C:\n"
723 " BL sub_FFC7C934 \n"
724 " B loc_FFC7F358 \n"
725
726 "loc_FFC7F274:\n"
727 " LDRH R1, [R0, #4] \n"
728 " STRH R1, [SP, #0x10] \n"
729 " LDRH R1, [R5, #2] \n"
730 " STRH R1, [SP, #0x12] \n"
731 " LDRH R1, [R5, #4] \n"
732 " STRH R1, [SP, #0x14] \n"
733 " LDRH R1, [R5, #6] \n"
734 " STRH R1, [SP, #0x16] \n"
735 " LDRH R1, [R0, #0xC] \n"
736 " STRH R1, [SP, #0x18] \n"
737 " BL sub_FFC801B0 \n"
738 " B loc_FFC7F358 \n"
739
740 "loc_FFC7F2A4:\n"
741 " LDRH R1, [R0, #4] \n"
742 " STRH R1, [SP, #0x10] \n"
743 " LDRH R1, [R5, #2] \n"
744 " STRH R1, [SP, #0x12] \n"
745 " LDRH R1, [R5, #4] \n"
746 " STRH R1, [SP, #0x14] \n"
747 " LDRH R1, [R5, #6] \n"
748 " STRH R1, [SP, #0x16] \n"
749 " LDRH R1, [R5, #8] \n"
750 " STRH R1, [SP, #0x18] \n"
751 " BL sub_FFC80310 \n"
752 " B loc_FFC7F358 \n"
753
754 "loc_FFC7F2D4:\n"
755 " LDRH R1, [R5] \n"
756 " STRH R1, [SP, #0x10] \n"
757 " LDRH R1, [R0, #6] \n"
758 " STRH R1, [SP, #0x12] \n"
759 " LDRH R1, [R5, #4] \n"
760 " STRH R1, [SP, #0x14] \n"
761 " LDRH R1, [R5, #6] \n"
762 " STRH R1, [SP, #0x16] \n"
763 " LDRH R1, [R5, #8] \n"
764 " STRH R1, [SP, #0x18] \n"
765 " BL sub_FFC803BC \n"
766 " B loc_FFC7F358 \n"
767
768 "loc_FFC7F304:\n"
769 " LDRH R1, [R5] \n"
770 " STRH R1, [SP, #0x10] \n"
771 " LDRH R1, [R5, #2] \n"
772 " STRH R1, [SP, #0x12] \n"
773 " LDRH R1, [R5, #4] \n"
774 " STRH R1, [SP, #0x14] \n"
775 " LDRH R1, [R5, #6] \n"
776 " STRH R1, [SP, #0x16] \n"
777 " LDRH R1, [R0, #0xC] \n"
778 " STRH R1, [SP, #0x18] \n"
779 " BL sub_FFC8045C \n"
780 " B loc_FFC7F358 \n"
781
782 "loc_FFC7F334:\n"
783 " BL sub_FFC7CBD4 \n"
784 " B loc_FFC7F358 \n"
785
786 "loc_FFC7F33C:\n"
787 " BL sub_FFC7D200 \n"
788 " B loc_FFC7F358 \n"
789
790 "loc_FFC7F344:\n"
791 " BL sub_FFC7D438 \n"
792 " B loc_FFC7F358 \n"
793
794 "loc_FFC7F34C:\n"
795 " BL sub_FFC7D5B0 \n"
796 " B loc_FFC7F358 \n"
797
798 "loc_FFC7F354:\n"
799 " BL sub_FFC7D748 \n"
800
801 "loc_FFC7F358:\n"
802 " LDR R0, [SP, #0x1C] \n"
803 " LDR R1, [R0, #0x7C] \n"
804 " LDR R3, [R0, #0x88] \n"
805 " LDR R2, [R0, #0x8C] \n"
806 " ADD R0, R0, #4 \n"
807 " BLX R3 \n"
808 " CMP R4, #1 \n"
809 " BNE loc_FFC7F3C0 \n"
810
811 "loc_FFC7F378:\n"
812 " LDR R0, [SP, #0x1C] \n"
813 " MOV R2, #0xC \n"
814 " LDR R1, [R0, #0x7C] \n"
815 " ADD R1, R1, R1, LSL#1 \n"
816 " ADD R0, R0, R1, LSL#2 \n"
817 " SUB R4, R0, #8 \n"
818 " LDR R0, =0x16AD4 \n"
819 " ADD R1, SP, #0x10 \n"
820 " BL sub_FFE605E0 \n"
821 " LDR R0, =0x16AE0 \n"
822 " MOV R2, #0xC \n"
823 " ADD R1, SP, #0x10 \n"
824 " BL sub_FFE605E0 \n"
825 " LDR R0, =0x16AEC \n"
826 " MOV R2, #0xC \n"
827 " MOV R1, R4 \n"
828 " BL sub_FFE605E0 \n"
829 " B loc_FFC7F438 \n"
830
831 "loc_FFC7F3C0:\n"
832 " LDR R0, [SP, #0x1C] \n"
833 " LDR R0, [R0] \n"
834 " CMP R0, #0xB \n"
835 " BNE loc_FFC7F408 \n"
836 " MOV R3, #0 \n"
837 " STR R3, [SP] \n"
838 " MOV R3, #1 \n"
839 " MOV R2, #1 \n"
840 " MOV R1, #1 \n"
841 " MOV R0, #0 \n"
842 " BL sub_FFC7BA9C \n"
843 " MOV R3, #0 \n"
844 " STR R3, [SP] \n"
845 " MOV R3, #1 \n"
846 " MOV R2, #1 \n"
847 " MOV R1, #1 \n"
848 " MOV R0, #0 \n"
849 " B loc_FFC7F434 \n"
850
851 "loc_FFC7F408:\n"
852 " MOV R3, #1 \n"
853 " MOV R2, #1 \n"
854 " MOV R1, #1 \n"
855 " MOV R0, #1 \n"
856 " STR R3, [SP] \n"
857 " BL sub_FFC7BA9C \n"
858 " MOV R3, #1 \n"
859 " MOV R2, #1 \n"
860 " MOV R1, #1 \n"
861 " MOV R0, #1 \n"
862 " STR R3, [SP] \n"
863
864 "loc_FFC7F434:\n"
865 " BL sub_FFC7BBDC \n"
866
867 "loc_FFC7F438:\n"
868 " LDR R0, [SP, #0x1C] \n"
869 " BL sub_FFC8013C \n"
870 " B loc_FFC7EEA8 \n"
871 );
872 }
873
874
875
876 void __attribute__((naked,noinline)) sub_FFC7C7F8_my() {
877 asm volatile (
878 " STMFD SP!, {R4-R8,LR} \n"
879 " LDR R7, =0x38EC \n"
880 " MOV R4, R0 \n"
881 " LDR R0, [R7, #0x1C] \n"
882 " MOV R1, #0x3E \n"
883 " BL sub_FFC52500 /*_ClearEventFlag*/ \n"
884 " LDRSH R0, [R4, #4] \n"
885 " MOV R2, #0 \n"
886 " MOV R1, #0 \n"
887 " BL sub_FFC7B82C \n"
888 " MOV R6, R0 \n"
889 " LDRSH R0, [R4, #6] \n"
890 " BL sub_FFC7B93C \n"
891 " LDRSH R0, [R4, #8] \n"
892 " BL sub_FFC7B994 \n"
893 " LDRSH R0, [R4, #0xA] \n"
894 " BL sub_FFC7B9EC \n"
895 " LDRSH R0, [R4, #0xC] \n"
896 " BL sub_FFC7BA44 \n"
897 " MOV R5, R0 \n"
898 " LDR R0, [R4] \n"
899 " LDR R8, =0x16AEC \n"
900 " CMP R0, #0xB \n"
901 " MOVEQ R6, #0 \n"
902 " MOVEQ R5, #0 \n"
903 " BEQ loc_FFC7C888 \n"
904 " CMP R6, #1 \n"
905 " BNE loc_FFC7C888 \n"
906 " LDRSH R0, [R4, #4] \n"
907 " LDR R1, =0xFFC7B798 \n"
908 " MOV R2, #2 \n"
909 " BL sub_FFCF11D4 \n"
910 " STRH R0, [R4, #4] \n"
911 " MOV R0, #0 \n"
912 " STR R0, [R7, #0x28] \n"
913 " B loc_FFC7C890 \n"
914
915 "loc_FFC7C888:\n"
916 " LDRH R0, [R8] \n"
917 " STRH R0, [R4, #4] \n"
918
919 "loc_FFC7C890:\n"
920 " CMP R5, #1 \n"
921 " LDRNEH R0, [R8, #8] \n"
922 " BNE loc_FFC7C8AC \n"
923 " LDRSH R0, [R4, #0xC] \n"
924 " LDR R1, =0xFFC7B81C \n"
925 " MOV R2, #0x20 \n"
926 " BL sub_FFC8016C \n"
927
928 "loc_FFC7C8AC:\n"
929 " STRH R0, [R4, #0xC] \n"
930 " LDRSH R0, [R4, #6] \n"
931 " BL sub_FFC6E244_my \n"
932 " LDR PC, =0xFFC7C8B8 \n"
933 );
934 }
935
936
937
938 void __attribute__((naked,noinline)) sub_FFC6E244_my() {
939 asm volatile (
940 " STMFD SP!, {R4-R6,LR} \n"
941 " LDR R5, =0x35E8 \n"
942 " MOV R4, R0 \n"
943 " LDR R0, [R5, #4] \n"
944 " CMP R0, #1 \n"
945 " MOVNE R1, #0x140 \n"
946 " LDRNE R0, =0xFFC6E048 /*'Shutter.c'*/ \n"
947 " BLNE _DebugAssert \n"
948 " CMN R4, #0xC00 \n"
949 " LDREQSH R4, [R5, #2] \n"
950 " CMN R4, #0xC00 \n"
951 " LDREQ R1, =0x146 \n"
952 " LDREQ R0, =0xFFC6E048 /*'Shutter.c'*/ \n"
953 " STRH R4, [R5, #2] \n"
954 " BLEQ _DebugAssert \n"
955 " MOV R0, R4 \n"
956 " BL apex2us \n"
957 " MOV R4, R0 \n"
958
959 " MOV R0, R4 \n"
960 " BL sub_FFC97798 \n"
961 " TST R0, #1 \n"
962 " LDRNE R1, =0x14B \n"
963 " LDMNEFD SP!, {R4-R6,LR} \n"
964 " LDRNE R0, =0xFFC6E048 /*'Shutter.c'*/ \n"
965 " BNE _DebugAssert \n"
966 " LDMFD SP!, {R4-R6,PC} \n"
967 );
968 }