root/platform/ixus95_sd1200/sub/100c/filewrite.c

DEFINITIONS

1. filewritetask
2. sub_FFDD380C_my
3. sub_FFDD3958_my
4. sub_FFDD3A54_my

   1 /*
   2  * filewrite.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   7 typedef struct {
   8     unsigned int address;
   9     unsigned int length;
  10 } cam_ptp_data_chunk; //camera specific structure
  12 #define MAX_CHUNKS_FOR_JPEG 3 // filewritetask is prepared for this many chunks
  13 /*
  14  * fwt_data_struct: defined here as it's camera dependent
  15  * unneeded members are designated with unkn
  16  * file_offset, full_size, seek_flag only needs to be defined for DryOS>=r50 generation cameras
  17  * pdc is always required
  18  * name is not currently used
  19  */
  20 typedef struct
  21 {
  22     int unkn1[5];
cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_JPEG];
  24     char name[32];
  25 } fwt_data_struct;
  27 #include "../../../generic/filewrite.c"
  29 /*************************************************************/
  30 //** filewritetask @ 0xFFDD3558 - 0xFFDD3638, length=57
  31 void __attribute__((naked,noinline)) filewritetask() {
  32 asm volatile (
  33 "    STMFD   SP!, {R1-R5,LR} \n"
  34 "    LDR     R4, =0x84D0 \n"
  36 "loc_FFDD3560:\n"
  37 "    LDR     R0, [R4, #0x10] \n"
  38 "    MOV     R2, #0 \n"
  39 "    ADD     R1, SP, #8 \n"
  40 "    BL      sub_FFC167B8 /*_ReceiveMessageQueue*/ \n"
  41 "    CMP     R0, #0 \n"
  42 "    BNE     loc_FFDD3590 \n"
  43 "    LDR     R0, [SP, #8] \n"
  44 "    LDR     R1, [R0] \n"
  45 "    CMP     R1, #1 \n"
  46 "    BNE     loc_FFDD3598 \n"
  47 "    LDR     R0, [R4, #8] \n"
  48 "    BL      _GiveSemaphore \n"
  50 "loc_FFDD3590:\n"
  51 "    BL      _ExitTask \n"
  52 "    LDMFD   SP!, {R1-R5,PC} \n"
  54 "loc_FFDD3598:\n"
  55 "    SUB     R1, R1, #2 \n"
  56 "    CMP     R1, #5 \n"
  57 "    ADDLS   PC, PC, R1, LSL#2 \n"
  58 "    B       loc_FFDD3560 \n"
  59 "    B       loc_FFDD35C0 \n"
  60 "    B       loc_FFDD3624 \n"
  61 "    B       loc_FFDD362C \n"
  62 "    B       loc_FFDD362C \n"
  63 "    B       loc_FFDD362C \n"
  64 "    B       loc_FFDD3634 \n"
  66 "loc_FFDD35C0:\n"
  67 "    MOV     R0, #0 \n"
  68 "    STR     R0, [SP] \n"
  70 "loc_FFDD35C8:\n"
  71 "    LDR     R0, [R4, #0x10] \n"
  72 "    MOV     R1, SP \n"
  73 "    BL      sub_FFC169FC /*_GetNumberOfPostedMessages*/ \n"
  74 "    LDR     R0, [SP] \n"
  75 "    CMP     R0, #0 \n"
  76 "    BEQ     loc_FFDD35F4 \n"
  77 "    LDR     R0, [R4, #0x10] \n"
  78 "    MOV     R2, #0 \n"
  79 "    ADD     R1, SP, #4 \n"
  80 "    BL      sub_FFC167B8 /*_ReceiveMessageQueue*/ \n"
  81 "    B       loc_FFDD35C8 \n"
  83 "loc_FFDD35F4:\n"
  84 "    LDR     R0, [R4] \n"
  85 "    CMN     R0, #1 \n"
  86 "    BEQ     loc_FFDD3618 \n"
  87 "    BL      fwt_close \n"  // --> Patched. Old value = _Close.
  88 "    MVN     R0, #0 \n"
  89 "    STR     R0, [R4] \n"
  90 "    LDR     R0, =0xB3F28 \n"
  91 "    BL      sub_FFC3F8F8 \n"
  92 "    BL      sub_FFC3DE84 \n"
  94 "loc_FFDD3618:\n"
  95 "    LDR     R0, [R4, #0xC] \n"
  96 "    BL      _GiveSemaphore \n"
  97 "    B       loc_FFDD3560 \n"
  99 "loc_FFDD3624:\n"
 100 "    BL      sub_FFDD380C_my \n"  // --> Patched. Old value = 0xFFDD380C. Open stage
 101 "    B       loc_FFDD3560 \n"
 103 "loc_FFDD362C:\n"
 104 "    BL      sub_FFDD3958_my \n"  // --> Patched. Old value = 0xFFDD3958. Write stage
 105 "    B       loc_FFDD3560 \n"
 107 "loc_FFDD3634:\n"
 108 "    BL      sub_FFDD3A54_my \n"  // --> Patched. Old value = 0xFFDD3A54. Close stage
 109 "    B       loc_FFDD3560 \n"
 110 );
 111 }
 113 /*************************************************************/
 114 //** sub_FFDD380C_my @ 0xFFDD380C - 0xFFDD384C, length=17
 115 void __attribute__((naked,noinline)) sub_FFDD380C_my() {
 116 asm volatile (
 117 "    STMFD   SP!, {R4-R8,LR} \n"
 118 "    MOV     R4, R0 \n"
 119 "    ADD     R0, R0, #0x2C \n"
 120 "    SUB     SP, SP, #0x38 \n"
 121 "    BL      sub_FFC3F8F8 \n"
 122 "    MOV     R1, #0 \n"
 123 "    BL      sub_FFC3DE34 \n"
 124 "    LDR     R0, [R4, #0xC] \n"
 125 "    BL      sub_FFC3C2DC \n"
 126 "    LDR     R7, [R4, #8] \n"
 127 "    LDR     R8, =0x1B6 \n"
 128 "    ADD     R6, R4, #0x2C \n"
 129 "    LDR     R5, [R4, #0xC] \n"
 130 //hook start
 131 "    STMFD SP!, {R4-R12,LR}\n"
 132 "    MOV R0, R4\n"
 133 "    BL filewrite_main_hook\n"
 134 "    LDMFD SP!, {R4-R12,LR}\n"
 135 //hook end
 136 "    MOV     R0, R6 \n"
 137 "    MOV     R1, R7 \n"
 138 "    MOV     R2, R8 \n"
 139 "    BL      fwt_open \n"  // --> Patched. Old value = _Open.
 140 "    LDR     PC, =0xFFDD3850 \n"  // Continue in firmware
 141 );
 142 }
 144 /*************************************************************/
 145 //** sub_FFDD3958_my @ 0xFFDD3958 - 0xFFDD3A50, length=63
 146 void __attribute__((naked,noinline)) sub_FFDD3958_my() {
 147 asm volatile (
 148 "    STMFD   SP!, {R4-R10,LR} \n"
 149 "    MOV     R4, R0 \n"
 150 "    LDR     R0, [R0] \n"
 151 "    CMP     R0, #4 \n"
 152 "    LDREQ   R6, [R4, #0x18] \n"
 153 "    LDREQ   R7, [R4, #0x14] \n"
 154 "    BEQ     loc_FFDD3994 \n"
 155 "    CMP     R0, #5 \n"
 156 "    LDREQ   R6, [R4, #0x20] \n"
 157 "    LDREQ   R7, [R4, #0x1C] \n"
 158 "    BEQ     loc_FFDD3994 \n"
 159 "    CMP     R0, #6 \n"
 160 "    BNE     loc_FFDD39A8 \n"
 161 "    LDR     R6, [R4, #0x28] \n"
 162 "    LDR     R7, [R4, #0x24] \n"
 164 "loc_FFDD3994:\n"
 165 "    CMP     R6, #0 \n"
 166 "    BNE     loc_FFDD39B8 \n"
 168 "loc_FFDD399C:\n"
 169 "    MOV     R1, R4 \n"
 170 "    MOV     R0, #7 \n"
 171 "    B       loc_FFDD3A4C \n"
 173 "loc_FFDD39A8:\n"
 174 "    LDR     R1, =0x20D \n"
 175 "    LDR     R0, =0xFFDD3938 /*'dwFWrite.c'*/ \n"
 176 "    BL      _DebugAssert \n"
 177 "    B       loc_FFDD399C \n"
 179 "loc_FFDD39B8:\n"
 180 "    LDR     R9, =0x84D0 \n"
 181 "    MOV     R5, R6 \n"
 183 "loc_FFDD39C0:\n"
 184 "    LDR     R0, [R4, #4] \n"
 185 "    CMP     R5, #0x1000000 \n"
 186 "    MOVLS   R8, R5 \n"
 187 "    MOVHI   R8, #0x1000000 \n"
 188 "    BIC     R1, R0, #0xFF000000 \n"
 189 "    CMP     R1, #0 \n"
 190 "    BICNE   R0, R0, #0xFF000000 \n"
 191 "    RSBNE   R0, R0, #0x1000000 \n"
 192 "    CMPNE   R8, R0 \n"
 193 "    MOVHI   R8, R0 \n"
 194 "    LDR     R0, [R9] \n"
 195 "    MOV     R2, R8 \n"
 196 "    MOV     R1, R7 \n"
 197 "    BL      fwt_write \n"  // --> Patched. Old value = _Write.
 198 "    LDR     R1, [R4, #4] \n"
 199 "    CMP     R8, R0 \n"
 200 "    ADD     R1, R1, R0 \n"
 201 "    STR     R1, [R4, #4] \n"
 202 "    BEQ     loc_FFDD3A20 \n"
 203 "    LDR     R0, =0x10B1 \n"
 204 "    BL      sub_FFC5D8DC /*_IsControlEventActive_FW*/ \n"
 205 "    LDR     R1, =0x9200005 \n"
 206 "    STR     R1, [R4, #0x10] \n"
 207 "    B       loc_FFDD399C \n"
 209 "loc_FFDD3A20:\n"
 210 "    SUB     R5, R5, R0 \n"
 211 "    CMP     R5, R6 \n"
 212 "    ADD     R7, R7, R0 \n"
 213 "    LDRCS   R0, =0xFFDD3938 /*'dwFWrite.c'*/ \n"
 214 "    MOVCS   R1, #0x23C \n"
 215 "    BLCS    _DebugAssert \n"
 216 "    CMP     R5, #0 \n"
 217 "    BNE     loc_FFDD39C0 \n"
 218 "    LDR     R0, [R4] \n"
 219 "    MOV     R1, R4 \n"
 220 "    ADD     R0, R0, #1 \n"
 222 "loc_FFDD3A4C:\n"
 223 "    LDMFD   SP!, {R4-R10,LR} \n"
 224 "    B       sub_FFDD34B0 \n"
 225 );
 226 }
 228 /*************************************************************/
 229 //** sub_FFDD3A54_my @ 0xFFDD3A54 - 0xFFDD3A70, length=8
 230 void __attribute__((naked,noinline)) sub_FFDD3A54_my() {
 231 asm volatile (
 232 "    STMFD   SP!, {R4,R5,LR} \n"
 233 "    LDR     R5, =0x84D0 \n"
 234 "    MOV     R4, R0 \n"
 235 "    LDR     R0, [R5] \n"
 236 "    SUB     SP, SP, #0x1C \n"
 237 "    CMN     R0, #1 \n"
 238 "    BEQ     sub_FFDD3A88 \n"
 239 "    BL      fwt_close \n"  // --> Patched. Old value = _Close.
 240 "    LDR     PC, =0xFFDD3A74 \n"  // Continue in firmware
 241 );
 242 }