This source file includes following definitions.
- taskHook
- CreateTask_spytask
- boot
- sub_FFC00358_my
- sub_FFC0119C_my
- sub_FFC05E5C_my
- taskcreate_Startup_my
- task_Startup_my
- taskcreatePhySw_my
- init_file_modules_task
- sub_FFC69E24_my
- sub_FFC50E94_my
- sub_FFC50ABC_my
- sub_FFC507DC_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7 #include "dryos31.h"
8
9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
10
11 const char * const new_sa = &_end;
12
13 extern void task_CaptSeq();
14 extern void task_InitFileModules();
15 extern void task_MovieRecord();
16 extern void task_ExpDrv();
17 extern void task_FileWrite();
18
19 void taskHook(context_t **context)
20 {
21 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
22
23
24 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
25 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
26 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
27 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
28 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
29 }
30
31
32
33
34 void CreateTask_spytask() {
35 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
36 };
37
38
39
40
41
42
43
44
45
46 void __attribute__((naked,noinline)) boot() {
47 asm volatile (
48 " LDR R1, =0xC0410000 \n"
49 " MOV R0, #0 \n"
50 " STR R0, [R1] \n"
51 " MOV R1, #0x78 \n"
52 " MCR p15, 0, R1, c1, c0 \n"
53 " MOV R1, #0 \n"
54 " MCR p15, 0, R1, c7, c10, 4 \n"
55 " MCR p15, 0, R1, c7, c5 \n"
56 " MCR p15, 0, R1, c7, c6 \n"
57 " MOV R0, #0x3D \n"
58 " MCR p15, 0, R0, c6, c0 \n"
59 " MOV R0, #0xC000002F \n"
60 " MCR p15, 0, R0, c6, c1 \n"
61 " MOV R0, #0x31 \n"
62 " MCR p15, 0, R0, c6, c2 \n"
63 " LDR R0, =0x10000031 \n"
64 " MCR p15, 0, R0, c6, c3 \n"
65 " MOV R0, #0x40000017 \n"
66 " MCR p15, 0, R0, c6, c4 \n"
67 " LDR R0, =0xFFC0002B \n"
68 " MCR p15, 0, R0, c6, c5 \n"
69 " MOV R0, #0x34 \n"
70 " MCR p15, 0, R0, c2, c0 \n"
71 " MOV R0, #0x34 \n"
72 " MCR p15, 0, R0, c2, c0, 1 \n"
73 " MOV R0, #0x34 \n"
74 " MCR p15, 0, R0, c3, c0 \n"
75 " LDR R0, =0x3333330 \n"
76 " MCR p15, 0, R0, c5, c0, 2 \n"
77 " LDR R0, =0x3333330 \n"
78 " MCR p15, 0, R0, c5, c0, 3 \n"
79 " MRC p15, 0, R0, c1, c0 \n"
80 " ORR R0, R0, #0x1000 \n"
81 " ORR R0, R0, #4 \n"
82 " ORR R0, R0, #1 \n"
83 " MCR p15, 0, R0, c1, c0 \n"
84 " MOV R1, #0x40000006 \n"
85 " MCR p15, 0, R1, c9, c1 \n"
86 " MOV R1, #6 \n"
87 " MCR p15, 0, R1, c9, c1, 1 \n"
88 " MRC p15, 0, R1, c1, c0 \n"
89 " ORR R1, R1, #0x50000 \n"
90 " MCR p15, 0, R1, c1, c0 \n"
91 " LDR R2, =0xC0200000 \n"
92 " MOV R1, #1 \n"
93 " STR R1, [R2, #0x10C] \n"
94 " MOV R1, #0xFF \n"
95 " STR R1, [R2, #0xC] \n"
96 " STR R1, [R2, #0x1C] \n"
97 " STR R1, [R2, #0x2C] \n"
98 " STR R1, [R2, #0x3C] \n"
99 " STR R1, [R2, #0x4C] \n"
100 " STR R1, [R2, #0x5C] \n"
101 " STR R1, [R2, #0x6C] \n"
102 " STR R1, [R2, #0x7C] \n"
103 " STR R1, [R2, #0x8C] \n"
104 " STR R1, [R2, #0x9C] \n"
105 " STR R1, [R2, #0xAC] \n"
106 " STR R1, [R2, #0xBC] \n"
107 " STR R1, [R2, #0xCC] \n"
108 " STR R1, [R2, #0xDC] \n"
109 " STR R1, [R2, #0xEC] \n"
110 " STR R1, [R2, #0xFC] \n"
111 " LDR R1, =0xC0400008 \n"
112 " LDR R2, =0x430005 \n"
113 " STR R2, [R1] \n"
114 " MOV R1, #1 \n"
115 " LDR R2, =0xC0243100 \n"
116 " STR R2, [R1] \n"
117 " LDR R2, =0xC0242010 \n"
118 " LDR R1, [R2] \n"
119 " ORR R1, R1, #1 \n"
120 " STR R1, [R2] \n"
121 " LDR R0, =0xFFEEB7F8 \n"
122 " LDR R1, =0x1900 \n"
123 " LDR R3, =0xABA4 \n"
124
125 "loc_FFC0013C:\n"
126 " CMP R1, R3 \n"
127 " LDRCC R2, [R0], #4 \n"
128 " STRCC R2, [R1], #4 \n"
129 " BCC loc_FFC0013C \n"
130 " LDR R1, =0x128E90 \n"
131 " MOV R2, #0 \n"
132
133 "loc_FFC00154:\n"
134 " CMP R3, R1 \n"
135 " STRCC R2, [R3], #4 \n"
136 " BCC loc_FFC00154 \n"
137 " B sub_FFC00358_my \n"
138 );
139 }
140
141
142
143 void __attribute__((naked,noinline)) sub_FFC00358_my() {
144
145
146 *(int*)0x1934=(int)taskHook;
147 *(int*)0x1938=(int)taskHook;
148
149
150
151 *(int*)(0x20F8)= (*(int*)0xC022005C) & 1 ? 0x4000000 : 0x2000000;
152
153 asm volatile (
154 " LDR R0, =0xFFC003D0 \n"
155 " MOV R1, #0 \n"
156 " LDR R3, =0xFFC00408 \n"
157
158 "loc_FFC00364:\n"
159 " CMP R0, R3 \n"
160 " LDRCC R2, [R0], #4 \n"
161 " STRCC R2, [R1], #4 \n"
162 " BCC loc_FFC00364 \n"
163 " LDR R0, =0xFFC00408 \n"
164 " MOV R1, #0x4B0 \n"
165 " LDR R3, =0xFFC0061C \n"
166
167 "loc_FFC00380:\n"
168 " CMP R0, R3 \n"
169 " LDRCC R2, [R0], #4 \n"
170 " STRCC R2, [R1], #4 \n"
171 " BCC loc_FFC00380 \n"
172 " MOV R0, #0xD2 \n"
173 " MSR CPSR_cxsf, R0 \n"
174 " MOV SP, #0x1000 \n"
175 " MOV R0, #0xD3 \n"
176 " MSR CPSR_cxsf, R0 \n"
177 " MOV SP, #0x1000 \n"
178 " LDR R0, =0x6C4 \n"
179 " LDR R2, =0xEEEEEEEE \n"
180 " MOV R3, #0x1000 \n"
181
182 "loc_FFC003B4:\n"
183 " CMP R0, R3 \n"
184 " STRCC R2, [R0], #4 \n"
185 " BCC loc_FFC003B4 \n"
186 " BL sub_FFC0119C_my \n"
187 );
188 }
189
190
191
192 void __attribute__((naked,noinline)) sub_FFC0119C_my() {
193 asm volatile (
194 " STR LR, [SP, #-4]! \n"
195 " SUB SP, SP, #0x74 \n"
196 " MOV R0, SP \n"
197 " MOV R1, #0x74 \n"
198 " BL sub_FFE8106C \n"
199 " MOV R0, #0x53000 \n"
200 " STR R0, [SP, #4] \n"
201
202 #if defined(CHDK_NOT_IN_CANON_HEAP)
203 " LDR R0, =0x128E90 \n"
204 #else
205 " LDR R0, =new_sa\n"
206 " LDR R0, [R0]\n"
207 #endif
208
209 " LDR R2, =0x279C00 \n"
210 " LDR R1, =0x2724A8 \n"
211 " STR R0, [SP, #8] \n"
212 " SUB R0, R1, R0 \n"
213 " ADD R3, SP, #0xC \n"
214 " STR R2, [SP] \n"
215 " STMIA R3, {R0-R2} \n"
216 " MOV R0, #0x22 \n"
217 " STR R0, [SP, #0x18] \n"
218 " MOV R0, #0x68 \n"
219 " STR R0, [SP, #0x1C] \n"
220 " LDR R0, =0x19B \n"
221 " LDR R1, =sub_FFC05E5C_my \n"
222 " STR R0, [SP, #0x20] \n"
223 " MOV R0, #0x96 \n"
224 " STR R0, [SP, #0x24] \n"
225 " MOV R0, #0x78 \n"
226 " STR R0, [SP, #0x28] \n"
227 " MOV R0, #0x64 \n"
228 " STR R0, [SP, #0x2C] \n"
229 " MOV R0, #0 \n"
230 " STR R0, [SP, #0x30] \n"
231 " STR R0, [SP, #0x34] \n"
232 " MOV R0, #0x10 \n"
233 " STR R0, [SP, #0x5C] \n"
234 " MOV R0, #0x800 \n"
235 " STR R0, [SP, #0x60] \n"
236 " MOV R0, #0xA0 \n"
237 " STR R0, [SP, #0x64] \n"
238 " MOV R0, #0x280 \n"
239 " STR R0, [SP, #0x68] \n"
240 " MOV R0, SP \n"
241 " MOV R2, #0 \n"
242 " BL sub_FFC03408 \n"
243 " ADD SP, SP, #0x74 \n"
244 " LDR PC, [SP], #4 \n"
245 );
246 }
247
248
249
250 void __attribute__((naked,noinline)) sub_FFC05E5C_my() {
251 asm volatile (
252 " STMFD SP!, {R4,LR} \n"
253 " BL sub_FFC00B24 \n"
254 " BL sub_FFC0A8D0 \n"
255 " CMP R0, #0 \n"
256 " LDRLT R0, =0xFFC05F70 /*'dmSetup'*/ \n"
257 " BLLT _err_init_task \n"
258 " BL sub_FFC05A98 \n"
259 " CMP R0, #0 \n"
260 " LDRLT R0, =0xFFC05F78 /*'termDriverInit'*/ \n"
261 " BLLT _err_init_task \n"
262 " LDR R0, =0xFFC05F88 /*'/_term'*/ \n"
263 " BL sub_FFC05B80 \n"
264 " CMP R0, #0 \n"
265 " LDRLT R0, =0xFFC05F90 /*'termDeviceCreate'*/ \n"
266 " BLLT _err_init_task \n"
267 " LDR R0, =0xFFC05F88 /*'/_term'*/ \n"
268 " BL sub_FFC03BF4 \n"
269 " CMP R0, #0 \n"
270 " LDRLT R0, =0xFFC05FA4 /*'stdioSetup'*/ \n"
271 " BLLT _err_init_task \n"
272 " BL sub_FFC0A2C8 \n"
273 " CMP R0, #0 \n"
274 " LDRLT R0, =0xFFC05FB0 /*'stdlibSetup'*/ \n"
275 " BLLT _err_init_task \n"
276 " BL sub_FFC01680 \n"
277 " CMP R0, #0 \n"
278 " LDRLT R0, =0xFFC05FBC /*'armlib_setup'*/ \n"
279 " BLLT _err_init_task \n"
280 " LDMFD SP!, {R4,LR} \n"
281 " B taskcreate_Startup_my \n"
282 );
283 }
284
285
286
287 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
288 asm volatile (
289 " STMFD SP!, {R3,LR} \n"
290
291 " BL sub_FFC2ABA4 \n"
292 " CMP R0, #0 \n"
293 " BNE loc_FFC10690 \n"
294 " BL sub_FFC250BC /*_IsNormalCameraMode_FW*/ \n"
295 " CMP R0, #0 \n"
296 " BEQ loc_FFC10690 \n"
297 " BL sub_FFC42F0C \n"
298 " CMP R0, #0 \n"
299 " BNE loc_FFC10690 \n"
300 " LDR R1, =0xC0220000 \n"
301 " MOV R0, #0x44 \n"
302 " STR R0, [R1, #0x20] \n"
303
304 "loc_FFC1068C:\n"
305 " B loc_FFC1068C \n"
306
307 "loc_FFC10690:\n"
308
309
310 " BL sub_FFC28FD4 \n"
311 " LDR R1, =0x2CE000 \n"
312 " MOV R0, #0 \n"
313 " BL sub_FFC2921C \n"
314 " BL sub_FFC291C8 /*_EnableDispatch*/ \n"
315 " MOV R3, #0 \n"
316 " STR R3, [SP] \n"
317 " LDR R3, =task_Startup_my \n"
318 " MOV R2, #0 \n"
319 " MOV R1, #0x19 \n"
320 " LDR R0, =0xFFC106D8 /*'Startup'*/ \n"
321 " BL _CreateTask \n"
322 " MOV R0, #0 \n"
323 " LDMFD SP!, {R12,PC} \n"
324 );
325 }
326
327
328
329 void __attribute__((naked,noinline)) task_Startup_my() {
330 asm volatile (
331 " STMFD SP!, {R4,LR} \n"
332 " BL sub_FFC06278 \n"
333 " BL sub_FFC249CC \n"
334 " BL sub_FFC2326C \n"
335
336 " BL sub_FFC2ADD0 \n"
337
338 " BL sub_FFC6D074 \n"
339 " BL sub_FFC2AE00 \n"
340 " BL sub_FFC2846C \n"
341 " BL sub_FFC2AF70 \n"
342
343 " BL CreateTask_spytask\n"
344
345 " BL taskcreatePhySw_my \n"
346 " BL sub_FFC26CF8 \n"
347 " BL sub_FFC7B758 \n"
348
349 " BL sub_FFC22D48 \n"
350 " BL sub_FFC2A97C \n"
351 " BL sub_FFC23220 \n"
352 " BL sub_FFC22CE8 \n"
353 " BL sub_FFC2B9B4 \n"
354 " BL sub_FFC22CC0 \n"
355 " LDMFD SP!, {R4,LR} \n"
356 " B sub_FFC06128 \n"
357 );
358 }
359
360
361
362 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
363 asm volatile (
364 " STMFD SP!, {R3-R5,LR} \n"
365 " LDR R4, =0x1BE4 \n"
366 " LDR R0, [R4, #0x10] \n"
367 " CMP R0, #0 \n"
368 " BNE sub_FFC237F4 \n"
369 " MOV R3, #0 \n"
370 " STR R3, [SP] \n"
371 " LDR R3, =mykbd_task \n"
372 " MOV R2, #0x2000 \n"
373 " LDR PC, =0xFFC237E4 \n"
374 );
375 }
376
377
378
379 void __attribute__((naked,noinline)) init_file_modules_task() {
380 asm volatile (
381 " STMFD SP!, {R4-R6,LR} \n"
382 " BL sub_FFC69DF8 \n"
383 " LDR R5, =0x5006 \n"
384 " MOVS R4, R0 \n"
385 " MOVNE R1, #0 \n"
386 " MOVNE R0, R5 \n"
387 " BLNE _PostLogicalEventToUI \n"
388 " BL sub_FFC69E24_my \n"
389 " BL core_spytask_can_start\n"
390 " CMP R4, #0 \n"
391 " MOVEQ R0, R5 \n"
392 " LDMEQFD SP!, {R4-R6,LR} \n"
393 " MOVEQ R1, #0 \n"
394 " BEQ _PostLogicalEventToUI \n"
395 " LDMFD SP!, {R4-R6,PC} \n"
396 );
397 }
398
399
400
401 void __attribute__((naked,noinline)) sub_FFC69E24_my() {
402 asm volatile (
403 " STMFD SP!, {R4,LR} \n"
404 " MOV R0, #3 \n"
405 " BL sub_FFC50E94_my \n"
406 " LDR PC, =0xFFC69E30 \n"
407 );
408 }
409
410
411
412 void __attribute__((naked,noinline)) sub_FFC50E94_my() {
413 asm volatile (
414 " STMFD SP!, {R4-R8,LR} \n"
415 " MOV R8, R0 \n"
416 " BL sub_FFC50E14 \n"
417 " LDR R1, =0x32350 \n"
418 " MOV R6, R0 \n"
419 " ADD R4, R1, R0, LSL#7 \n"
420 " LDR R0, [R4, #0x6C] \n"
421 " CMP R0, #4 \n"
422 " LDREQ R1, =0x817 \n"
423 " LDREQ R0, =0xFFC50954 /*'Mounter.c'*/ \n"
424 " BLEQ _DebugAssert \n"
425 " MOV R1, R8 \n"
426 " MOV R0, R6 \n"
427 " BL sub_FFC506CC \n"
428 " LDR R0, [R4, #0x38] \n"
429 " BL sub_FFC51534 \n"
430 " CMP R0, #0 \n"
431 " STREQ R0, [R4, #0x6C] \n"
432 " MOV R0, R6 \n"
433 " BL sub_FFC5075C \n"
434 " MOV R0, R6 \n"
435 " BL sub_FFC50ABC_my \n"
436 " LDR PC, =0xFFC50EEC \n"
437 );
438 }
439
440
441
442 void __attribute__((naked,noinline)) sub_FFC50ABC_my() {
443 asm volatile (
444 " STMFD SP!, {R4-R6,LR} \n"
445 " MOV R5, R0 \n"
446 " LDR R0, =0x32350 \n"
447 " ADD R4, R0, R5, LSL#7 \n"
448 " LDR R0, [R4, #0x6C] \n"
449 " TST R0, #2 \n"
450 " MOVNE R0, #1 \n"
451 " LDMNEFD SP!, {R4-R6,PC} \n"
452 " LDR R0, [R4, #0x38] \n"
453 " MOV R1, R5 \n"
454 " BL sub_FFC507DC_my \n"
455 " LDR PC, =0xFFC50AE8 \n"
456 );
457 }
458
459
460
461 void __attribute__((naked,noinline)) sub_FFC507DC_my() {
462 asm volatile (
463 " STMFD SP!, {R4-R10,LR} \n"
464 " MOV R9, R0 \n"
465 " LDR R0, =0x32350 \n"
466 " MOV R8, #0 \n"
467 " ADD R5, R0, R1, LSL#7 \n"
468 " LDR R0, [R5, #0x3C] \n"
469 " MOV R7, #0 \n"
470 " CMP R0, #7 \n"
471 " MOV R6, #0 \n"
472 " ADDLS PC, PC, R0, LSL#2 \n"
473 " B loc_FFC50934 \n"
474 " B loc_FFC50840 \n"
475 " B loc_FFC50828 \n"
476 " B loc_FFC50828 \n"
477 " B loc_FFC50828 \n"
478 " B loc_FFC50828 \n"
479 " B loc_FFC5092C \n"
480 " B loc_FFC50828 \n"
481 " B loc_FFC50828 \n"
482
483 "loc_FFC50828:\n"
484 " MOV R2, #0 \n"
485 " MOV R1, #0x200 \n"
486 " MOV R0, #2 \n"
487 " BL _exmem_ualloc \n"
488 " MOVS R4, R0 \n"
489 " BNE loc_FFC50848 \n"
490
491 "loc_FFC50840:\n"
492 " MOV R0, #0 \n"
493 " LDMFD SP!, {R4-R10,PC} \n"
494
495 "loc_FFC50848:\n"
496 " LDR R12, [R5, #0x50] \n"
497 " MOV R3, R4 \n"
498 " MOV R2, #1 \n"
499 " MOV R1, #0 \n"
500 " MOV R0, R9 \n"
501 " BLX R12 \n"
502 " CMP R0, #1 \n"
503 " BNE loc_FFC50874 \n"
504 " MOV R0, #2 \n"
505 " BL _exmem_ufree \n"
506 " B loc_FFC50840 \n"
507
508 "loc_FFC50874:\n"
509 " LDR R1, [R5, #0x64] \n"
510 " MOV R0, R9 \n"
511 " BLX R1 \n"
512
513 " MOV R1, R4\n"
514 " BL mbr_read_dryos\n"
515
516
517
518
519
520
521 " MOV R12, R4\n"
522 " MOV LR, R4\n"
523 " MOV R1, #1\n"
524 " B dg_sd_fat32_enter\n"
525 "dg_sd_fat32:\n"
526 " CMP R1, #4\n"
527 " BEQ dg_sd_fat32_end\n"
528 " ADD R12, R12, #0x10\n"
529 " ADD R1, R1, #1\n"
530 "dg_sd_fat32_enter:\n"
531 " LDRB R2, [R12, #0x1BE]\n"
532 " LDRB R3, [R12, #0x1C2]\n"
533 " CMP R3, #0xB\n"
534 " CMPNE R3, #0xC\n"
535 " CMPNE R3, #0x7\n"
536 " BNE dg_sd_fat32\n"
537 " CMP R2, #0x00\n"
538 " CMPNE R2, #0x80\n"
539 " BNE dg_sd_fat32\n"
540
541 " MOV R4, R12\n"
542
543 "dg_sd_fat32_end:\n"
544
545
546 " LDRB R1, [R4, #0x1C9] \n"
547 " LDRB R3, [R4, #0x1C8] \n"
548 " LDRB R12, [R4, #0x1CC] \n"
549 " MOV R1, R1, LSL#24 \n"
550 " ORR R1, R1, R3, LSL#16 \n"
551 " LDRB R3, [R4, #0x1C7] \n"
552 " LDRB R2, [R4, #0x1BE] \n"
553
554 " ORR R1, R1, R3, LSL#8 \n"
555 " LDRB R3, [R4, #0x1C6] \n"
556 " CMP R2, #0 \n"
557 " CMPNE R2, #0x80 \n"
558 " ORR R1, R1, R3 \n"
559 " LDRB R3, [R4, #0x1CD] \n"
560 " MOV R3, R3, LSL#24 \n"
561 " ORR R3, R3, R12, LSL#16 \n"
562 " LDRB R12, [R4, #0x1CB] \n"
563 " ORR R3, R3, R12, LSL#8 \n"
564 " LDRB R12, [R4, #0x1CA] \n"
565 " ORR R3, R3, R12 \n"
566
567 " LDRB R12, [LR,#0x1FE]\n"
568 " LDRB LR, [LR,#0x1FF]\n"
569 " BNE loc_FFC50900 \n"
570 " CMP R0, R1 \n"
571 " BCC loc_FFC50900 \n"
572 " ADD R2, R1, R3 \n"
573 " CMP R2, R0 \n"
574 " CMPLS R12, #0x55 \n"
575 " CMPEQ LR, #0xAA \n"
576 " MOVEQ R7, R1 \n"
577 " MOVEQ R6, R3 \n"
578 " MOVEQ R4, #1 \n"
579 " BEQ loc_FFC50904 \n"
580
581 "loc_FFC50900:\n"
582 " MOV R4, R8 \n"
583
584 "loc_FFC50904:\n"
585 " MOV R0, #2 \n"
586 " BL _exmem_ufree \n"
587 " CMP R4, #0 \n"
588 " BNE loc_FFC50940 \n"
589 " LDR R1, [R5, #0x64] \n"
590 " MOV R7, #0 \n"
591 " MOV R0, R9 \n"
592 " BLX R1 \n"
593 " MOV R6, R0 \n"
594 " B loc_FFC50940 \n"
595
596 "loc_FFC5092C:\n"
597 " MOV R6, #0x40 \n"
598 " B loc_FFC50940 \n"
599
600 "loc_FFC50934:\n"
601 " LDR R1, =0x572 \n"
602 " LDR R0, =0xFFC50954 /*'Mounter.c'*/ \n"
603 " BL _DebugAssert \n"
604
605 "loc_FFC50940:\n"
606 " STR R7, [R5, #0x44]! \n"
607 " STMIB R5, {R6,R8} \n"
608 " MOV R0, #1 \n"
609 " LDMFD SP!, {R4-R10,PC} \n"
610 );
611 }