This source file includes following definitions.
- capt_seq_task
- sub_FFC493BC_my
- sub_FFCFC44C_my
- exp_drv_task
- sub_FFC7B7A8_my
- sub_FFC6CFE8_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R7,LR} \n"
17 " LDR R7, =0x1217C \n"
18 " LDR R6, =0x2820 \n"
19
20 "loc_FFC4906C:\n"
21 " LDR R0, [R6, #4] \n"
22 " MOV R2, #0 \n"
23 " MOV R1, SP \n"
24 " BL sub_FFC16370 /*_ReceiveMessageQueue*/ \n"
25 " TST R0, #1 \n"
26 " BEQ loc_FFC49098 \n"
27 " LDR R1, =0x588 \n"
28 " LDR R0, =0xFFC48C68 /*'SsShootTask.c'*/ \n"
29 " BL _DebugAssert \n"
30 " BL _ExitTask \n"
31 " LDMFD SP!, {R3-R7,PC} \n"
32
33 "loc_FFC49098:\n"
34 " LDR R0, [SP] \n"
35 " LDR R1, [R0] \n"
36 " CMP R1, #0x1D \n"
37 " ADDLS PC, PC, R1, LSL#2 \n"
38 " B loc_FFC49294 \n"
39 " B loc_FFC49124 \n"
40 " B loc_FFC4912C \n"
41 " B loc_FFC49154 \n"
42 " B loc_FFC49168 \n"
43 " B loc_FFC49160 \n"
44 " B loc_FFC49170 \n"
45 " B loc_FFC49178 \n"
46 " B loc_FFC49184 \n"
47 " B loc_FFC491DC \n"
48 " B loc_FFC49168 \n"
49 " B loc_FFC491E4 \n"
50 " B loc_FFC491F0 \n"
51 " B loc_FFC491F8 \n"
52 " B loc_FFC49200 \n"
53 " B loc_FFC49208 \n"
54 " B loc_FFC49210 \n"
55 " B loc_FFC49218 \n"
56 " B loc_FFC49220 \n"
57 " B loc_FFC4922C \n"
58 " B loc_FFC49234 \n"
59 " B loc_FFC4923C \n"
60 " B loc_FFC49244 \n"
61 " B loc_FFC4924C \n"
62 " B loc_FFC49258 \n"
63 " B loc_FFC49260 \n"
64 " B loc_FFC49268 \n"
65 " B loc_FFC49270 \n"
66 " B loc_FFC49278 \n"
67 " B loc_FFC49284 \n"
68 " B loc_FFC492A0 \n"
69
70 "loc_FFC49124:\n"
71 " BL sub_FFC4993C \n"
72 " BL shooting_expo_param_override\n"
73 " B loc_FFC4917C \n"
74
75 "loc_FFC4912C:\n"
76 " MOV R0, #0xC \n"
77 " BL sub_FFC4D434 \n"
78 " TST R0, #1 \n"
79 " LDR R0, [SP] \n"
80 " MOVNE R1, #1 \n"
81 " LDRNE R2, [R0, #0xC] \n"
82 " MOVNE R0, #1 \n"
83 " BNE loc_FFC491D4 \n"
84 " BL sub_FFC493BC_my \n"
85 " B loc_FFC492A0 \n"
86
87 "loc_FFC49154:\n"
88 " MOV R0, #1 \n"
89 " BL sub_FFC49B48 \n"
90 " B loc_FFC492A0 \n"
91
92 "loc_FFC49160:\n"
93 " BL sub_FFC495A0 \n"
94 " B loc_FFC492A0 \n"
95
96 "loc_FFC49168:\n"
97 " BL sub_FFC4991C \n"
98 " B loc_FFC492A0 \n"
99
100 "loc_FFC49170:\n"
101 " BL sub_FFC49924 \n"
102 " B loc_FFC492A0 \n"
103
104 "loc_FFC49178:\n"
105 " BL sub_FFC49A68 \n"
106
107 "loc_FFC4917C:\n"
108 " BL sub_FFC47158 \n"
109 " B loc_FFC492A0 \n"
110
111 "loc_FFC49184:\n"
112 " LDR R4, [R0, #0xC] \n"
113 " BL sub_FFC4992C \n"
114 " MOV R0, R4 \n"
115 " BL sub_FFCFB4E8 \n"
116 " TST R0, #1 \n"
117 " MOV R5, R0 \n"
118 " BNE loc_FFC491C4 \n"
119 " BL sub_FFC5958C \n"
120 " STR R0, [R4, #0x18] \n"
121 " MOV R0, R4 \n"
122 " BL sub_FFCFC384 \n"
123 " MOV R0, R4 \n"
124 " BL sub_FFCFC758 \n"
125 " MOV R5, R0 \n"
126 " LDR R0, [R4, #0x18] \n"
127 " BL sub_FFC597A0 \n"
128
129 "loc_FFC491C4:\n"
130 " BL sub_FFC4991C \n"
131 " MOV R2, R4 \n"
132 " MOV R1, #9 \n"
133 " MOV R0, R5 \n"
134
135 "loc_FFC491D4:\n"
136 " BL sub_FFC475A0 \n"
137 " B loc_FFC492A0 \n"
138
139 "loc_FFC491DC:\n"
140 " BL sub_FFC49AC8 \n"
141 " B loc_FFC4917C \n"
142
143 "loc_FFC491E4:\n"
144 " LDR R0, [R7, #0x4C] \n"
145 " BL sub_FFC49E58 \n"
146 " B loc_FFC492A0 \n"
147
148 "loc_FFC491F0:\n"
149 " BL sub_FFC4A100 \n"
150 " B loc_FFC492A0 \n"
151
152 "loc_FFC491F8:\n"
153 " BL sub_FFC4A194 \n"
154 " B loc_FFC492A0 \n"
155
156 "loc_FFC49200:\n"
157 " BL sub_FFCFB708 \n"
158 " B loc_FFC492A0 \n"
159
160 "loc_FFC49208:\n"
161 " BL sub_FFCFB8E8 \n"
162 " B loc_FFC492A0 \n"
163
164 "loc_FFC49210:\n"
165 " BL sub_FFCFB978 \n"
166 " B loc_FFC492A0 \n"
167
168 "loc_FFC49218:\n"
169 " BL sub_FFCFBA20 \n"
170 " B loc_FFC492A0 \n"
171
172 "loc_FFC49220:\n"
173 " MOV R0, #0 \n"
174 " BL sub_FFCFBBDC \n"
175 " B loc_FFC492A0 \n"
176
177 "loc_FFC4922C:\n"
178 " BL sub_FFCFBD14 \n"
179 " B loc_FFC492A0 \n"
180
181 "loc_FFC49234:\n"
182 " BL sub_FFCFBDA4 \n"
183 " B loc_FFC492A0 \n"
184
185 "loc_FFC4923C:\n"
186 " BL sub_FFCFBE64 \n"
187 " B loc_FFC492A0 \n"
188
189 "loc_FFC49244:\n"
190 " BL sub_FFC49CB0 \n"
191 " B loc_FFC492A0 \n"
192
193 "loc_FFC4924C:\n"
194 " BL sub_FFC49CDC \n"
195 " BL sub_FFC14634 \n"
196 " B loc_FFC492A0 \n"
197
198 "loc_FFC49258:\n"
199 " BL sub_FFCFBADC \n"
200 " B loc_FFC492A0 \n"
201
202 "loc_FFC49260:\n"
203 " BL sub_FFCFBB20 \n"
204 " B loc_FFC492A0 \n"
205
206 "loc_FFC49268:\n"
207 " BL sub_FFC4BCA0 \n"
208 " B loc_FFC492A0 \n"
209
210 "loc_FFC49270:\n"
211 " BL sub_FFC4BCFC \n"
212 " B loc_FFC492A0 \n"
213
214 "loc_FFC49278:\n"
215 " BL sub_FFC4BD58 \n"
216 " BL sub_FFC4BD18 \n"
217 " B loc_FFC492A0 \n"
218
219 "loc_FFC49284:\n"
220 " LDRH R0, [R7, #0x90] \n"
221 " CMP R0, #4 \n"
222 " BLNE sub_FFC4BFC4 \n"
223 " B loc_FFC492A0 \n"
224
225 "loc_FFC49294:\n"
226 " LDR R1, =0x6C9 \n"
227 " LDR R0, =0xFFC48C68 /*'SsShootTask.c'*/ \n"
228 " BL _DebugAssert \n"
229
230 "loc_FFC492A0:\n"
231 " LDR R0, [SP] \n"
232 " LDR R1, [R0, #4] \n"
233 " LDR R0, [R6] \n"
234 " BL sub_FFC514E4 /*_SetEventFlag*/ \n"
235 " LDR R4, [SP] \n"
236 " LDR R0, [R4, #8] \n"
237 " CMP R0, #0 \n"
238 " LDREQ R1, =0x12B \n"
239 " LDREQ R0, =0xFFC48C68 /*'SsShootTask.c'*/ \n"
240 " BLEQ _DebugAssert \n"
241 " MOV R0, #0 \n"
242 " STR R0, [R4, #8] \n"
243 " B loc_FFC4906C \n"
244 );
245 }
246
247
248
249 void __attribute__((naked,noinline)) sub_FFC493BC_my() {
250 asm volatile (
251 " STMFD SP!, {R3-R5,LR} \n"
252 " LDR R4, [R0, #0xC] \n"
253 " LDR R0, [R4, #8] \n"
254 " ORR R0, R0, #1 \n"
255 " STR R0, [R4, #8] \n"
256 " MOV R0, #2 \n"
257 " BL sub_FFC450E0 \n"
258 " BL sub_FFC4992C \n"
259 " MOV R0, R4 \n"
260 " BL sub_FFC49C64 \n"
261 " MOV R0, R4 \n"
262 " BL sub_FFCFB158 \n"
263 " CMP R0, #0 \n"
264 " MOV R0, R4 \n"
265 " BEQ loc_FFC49414 \n"
266 " BL sub_FFCFB1E4 \n"
267 " TST R0, #1 \n"
268 " MOVNE R2, R4 \n"
269 " LDMNEFD SP!, {R3-R5,LR} \n"
270 " MOVNE R1, #1 \n"
271 " BNE sub_FFC475A0 \n"
272 " B loc_FFC49418 \n"
273
274 "loc_FFC49414:\n"
275 " BL sub_FFCFB1A8 \n"
276
277 "loc_FFC49418:\n"
278 " MOV R0, #0 \n"
279 " STR R0, [SP] \n"
280 " LDR R0, =0x1217C \n"
281 " MOV R2, #2 \n"
282 " LDRH R0, [R0, #0x8E] \n"
283 " MOV R1, SP \n"
284 " CMP R0, #3 \n"
285 " LDRNE R0, [R4, #0xC] \n"
286 " CMPNE R0, #1 \n"
287 " MOVHI R0, #1 \n"
288 " STRHI R0, [SP] \n"
289 " LDR R0, =0x123 \n"
290 " BL _SetPropertyCase \n"
291 " BL sub_FFD1D100 \n"
292 " BL sub_FFC5958C \n"
293 " STR R0, [R4, #0x18] \n"
294 " MOV R0, R4 \n"
295 " BL sub_FFCFC384 \n"
296 " BL sub_FFCFCEC0 \n"
297 " MOV R0, R4 \n"
298 " BL sub_FFCFC44C_my \n"
299 " MOV R5, R0 \n"
300 " BL capt_seq_hook_raw_here\n"
301 " BL sub_FFC4BCFC \n"
302 " BL sub_FFC4BD44 \n"
303 " BL sub_FFC4BD84 \n"
304 " MOV R2, R4 \n"
305 " MOV R1, #1 \n"
306 " MOV R0, R5 \n"
307 " BL sub_FFC475A0 \n"
308 " BL sub_FFCFC6FC \n"
309 " CMP R0, #0 \n"
310 " LDRNE R0, [R4, #8] \n"
311 " ORRNE R0, R0, #0x2000 \n"
312 " STRNE R0, [R4, #8] \n"
313 " LDMFD SP!, {R3-R5,PC} \n"
314 );
315 }
316
317
318
319 void __attribute__((naked,noinline)) sub_FFCFC44C_my() {
320 asm volatile (
321 " STMFD SP!, {R0-R8,LR} \n"
322 " MOV R4, R0 \n"
323 " BL sub_FFCFD02C \n"
324 " MVN R1, #0 \n"
325 " BL sub_FFC51518 /*_ClearEventFlag*/ \n"
326 " LDR R5, =0x5AD8 \n"
327 " LDR R0, [R5, #0xC] \n"
328 " CMP R0, #0 \n"
329 " BNE loc_FFCFC49C \n"
330 " MOV R1, #1 \n"
331 " MOV R0, #0 \n"
332 " BL sub_FFC16BB8 /*_CreateMessageQueueStrictly*/ \n"
333 " STR R0, [R5, #0xC] \n"
334 " MOV R3, #0 \n"
335 " STR R3, [SP] \n"
336 " LDR R3, =0xFFCFBF54 \n"
337 " LDR R0, =0xFFCFC6C4 /*'ShutterSoundTask'*/ \n"
338 " MOV R2, #0x400 \n"
339 " MOV R1, #0x17 \n"
340 " BL sub_FFC16B84 /*_CreateTaskStrictly*/ \n"
341
342 "loc_FFCFC49C:\n"
343 " MOV R2, #4 \n"
344 " ADD R1, SP, #8 \n"
345 " MOV R0, #0x8A \n"
346 " BL _GetPropertyCase \n"
347 " TST R0, #1 \n"
348 " LDRNE R1, =0x3A7 \n"
349 " LDRNE R0, =0xFFCFC1C0 /*'SsCaptureSeq.c'*/ \n"
350 " BLNE _DebugAssert \n"
351 " LDR R7, =0x12238 \n"
352 " LDR R8, =0x1217C \n"
353 " LDRSH R1, [R7, #0xE] \n"
354 " LDR R0, [R8, #0x84] \n"
355 " BL sub_FFCC34D8 \n"
356 " BL _GetCCDTemperature \n"
357 " LDR R3, =0x5AE0 \n"
358 " STRH R0, [R4, #0x9C] \n"
359 " SUB R2, R3, #4 \n"
360 " STRD R2, [SP] \n"
361 " MOV R1, R0 \n"
362 " LDRH R0, [R8, #0x54] \n"
363 " LDRSH R2, [R7, #0xC] \n"
364 " SUB R3, R3, #8 \n"
365 " BL sub_FFCFD610 \n"
366 " BL wait_until_remote_button_is_released\n"
367 " BL capt_seq_hook_set_nr\n"
368 " LDR PC, =0xFFCFC4F8 \n"
369 );
370 }
371
372
373
374 void __attribute__((naked,noinline)) exp_drv_task() {
375 asm volatile (
376 " STMFD SP!, {R4-R8,LR} \n"
377 " SUB SP, SP, #0x20 \n"
378 " LDR R8, =0xBB8 \n"
379 " LDR R7, =0x38A8 \n"
380 " LDR R5, =0x16CD8 \n"
381 " MOV R0, #0 \n"
382 " ADD R6, SP, #0x10 \n"
383 " STR R0, [SP, #0xC] \n"
384
385 "loc_FFC7DDEC:\n"
386 " LDR R0, [R7, #0x20] \n"
387 " MOV R2, #0 \n"
388 " ADD R1, SP, #0x1C \n"
389 " BL sub_FFC16370 /*_ReceiveMessageQueue*/ \n"
390 " LDR R0, [SP, #0xC] \n"
391 " CMP R0, #1 \n"
392 " BNE loc_FFC7DE38 \n"
393 " LDR R0, [SP, #0x1C] \n"
394 " LDR R0, [R0] \n"
395 " CMP R0, #0x13 \n"
396 " CMPNE R0, #0x14 \n"
397 " CMPNE R0, #0x15 \n"
398 " CMPNE R0, #0x16 \n"
399 " BEQ loc_FFC7DF54 \n"
400 " CMP R0, #0x28 \n"
401 " BEQ loc_FFC7DF2C \n"
402 " ADD R1, SP, #0xC \n"
403 " MOV R0, #0 \n"
404 " BL sub_FFC7DD7C \n"
405
406 "loc_FFC7DE38:\n"
407 " LDR R0, [SP, #0x1C] \n"
408 " LDR R1, [R0] \n"
409 " CMP R1, #0x2D \n"
410 " BNE loc_FFC7DE68 \n"
411 " LDR R0, [SP, #0x1C] \n"
412 " BL sub_FFC7F080 \n"
413 " LDR R0, [R7, #0x1C] \n"
414 " MOV R1, #1 \n"
415 " BL sub_FFC514E4 /*_SetEventFlag*/ \n"
416 " BL _ExitTask \n"
417 " ADD SP, SP, #0x20 \n"
418 " LDMFD SP!, {R4-R8,PC} \n"
419
420 "loc_FFC7DE68:\n"
421 " CMP R1, #0x2C \n"
422 " BNE loc_FFC7DE84 \n"
423 " LDR R2, [R0, #0x88]! \n"
424 " LDR R1, [R0, #4] \n"
425 " MOV R0, R1 \n"
426 " BLX R2 \n"
427 " B loc_FFC7E37C \n"
428
429 "loc_FFC7DE84:\n"
430 " CMP R1, #0x26 \n"
431 " BNE loc_FFC7DED4 \n"
432 " LDR R0, [R7, #0x1C] \n"
433 " MOV R1, #0x80 \n"
434 " BL sub_FFC51518 /*_ClearEventFlag*/ \n"
435 " LDR R0, =0xFFC7A758 \n"
436 " MOV R1, #0x80 \n"
437 " BL sub_FFCF15A4 \n"
438 " LDR R0, [R7, #0x1C] \n"
439 " MOV R2, R8 \n"
440 " MOV R1, #0x80 \n"
441 " BL sub_FFC51424 /*_WaitForAllEventFlag*/ \n"
442 " TST R0, #1 \n"
443 " LDRNE R1, =0xDC6 \n"
444 " BNE loc_FFC7DF18 \n"
445
446 "loc_FFC7DEC0:\n"
447 " LDR R1, [SP, #0x1C] \n"
448 " LDR R0, [R1, #0x8C] \n"
449 " LDR R1, [R1, #0x88] \n"
450 " BLX R1 \n"
451 " B loc_FFC7E37C \n"
452
453 "loc_FFC7DED4:\n"
454 " CMP R1, #0x27 \n"
455 " BNE loc_FFC7DF24 \n"
456 " ADD R1, SP, #0xC \n"
457 " BL sub_FFC7DD7C \n"
458 " LDR R0, [R7, #0x1C] \n"
459 " MOV R1, #0x100 \n"
460 " BL sub_FFC51518 /*_ClearEventFlag*/ \n"
461 " LDR R0, =0xFFC7A768 \n"
462 " MOV R1, #0x100 \n"
463 " BL sub_FFCF182C \n"
464 " LDR R0, [R7, #0x1C] \n"
465 " MOV R2, R8 \n"
466 " MOV R1, #0x100 \n"
467 " BL sub_FFC51424 /*_WaitForAllEventFlag*/ \n"
468 " TST R0, #1 \n"
469 " BEQ loc_FFC7DEC0 \n"
470 " MOV R1, #0xDD0 \n"
471
472 "loc_FFC7DF18:\n"
473 " LDR R0, =0xFFC7AD98 /*'ExpDrv.c'*/ \n"
474 " BL _DebugAssert \n"
475 " B loc_FFC7DEC0 \n"
476
477 "loc_FFC7DF24:\n"
478 " CMP R1, #0x28 \n"
479 " BNE loc_FFC7DF3C \n"
480
481 "loc_FFC7DF2C:\n"
482 " LDR R0, [SP, #0x1C] \n"
483 " ADD R1, SP, #0xC \n"
484 " BL sub_FFC7DD7C \n"
485 " B loc_FFC7DEC0 \n"
486
487 "loc_FFC7DF3C:\n"
488 " CMP R1, #0x2B \n"
489 " BNE loc_FFC7DF54 \n"
490 " BL sub_FFC6D278 \n"
491 " BL sub_FFC6DF04 \n"
492 " BL sub_FFC6DA3C \n"
493 " B loc_FFC7DEC0 \n"
494
495 "loc_FFC7DF54:\n"
496 " LDR R0, [SP, #0x1C] \n"
497 " MOV R4, #1 \n"
498 " LDR R1, [R0] \n"
499 " CMP R1, #0x11 \n"
500 " CMPNE R1, #0x12 \n"
501 " BNE loc_FFC7DFC4 \n"
502 " LDR R1, [R0, #0x7C] \n"
503 " ADD R1, R1, R1, LSL#1 \n"
504 " ADD R1, R0, R1, LSL#2 \n"
505 " SUB R1, R1, #8 \n"
506 " LDMIA R1, {R2-R4} \n"
507 " STMIA R6, {R2-R4} \n"
508 " BL sub_FFC7C830 \n"
509 " LDR R0, [SP, #0x1C] \n"
510 " LDR R1, [R0, #0x7C] \n"
511 " LDR R3, [R0, #0x88] \n"
512 " LDR R2, [R0, #0x8C] \n"
513 " ADD R0, R0, #4 \n"
514 " BLX R3 \n"
515 " LDR R0, [SP, #0x1C] \n"
516 " BL sub_FFC7F438 \n"
517 " LDR R0, [SP, #0x1C] \n"
518 " LDR R1, [R0, #0x7C] \n"
519 " LDR R3, [R0, #0x90] \n"
520 " LDR R2, [R0, #0x94] \n"
521 " ADD R0, R0, #4 \n"
522 " BLX R3 \n"
523 " B loc_FFC7E2BC \n"
524
525 "loc_FFC7DFC4:\n"
526 " CMP R1, #0x13 \n"
527 " CMPNE R1, #0x14 \n"
528 " CMPNE R1, #0x15 \n"
529 " CMPNE R1, #0x16 \n"
530 " BNE loc_FFC7E07C \n"
531 " ADD R3, SP, #0xC \n"
532 " MOV R2, SP \n"
533 " ADD R1, SP, #0x10 \n"
534 " BL sub_FFC7CA74 \n"
535 " CMP R0, #1 \n"
536 " MOV R4, R0 \n"
537 " CMPNE R4, #5 \n"
538 " BNE loc_FFC7E018 \n"
539 " LDR R0, [SP, #0x1C] \n"
540 " MOV R2, R4 \n"
541 " LDR R1, [R0, #0x7C]! \n"
542 " LDR R12, [R0, #0xC]! \n"
543 " LDR R3, [R0, #4] \n"
544 " MOV R0, SP \n"
545 " BLX R12 \n"
546 " B loc_FFC7E050 \n"
547
548 "loc_FFC7E018:\n"
549 " LDR R0, [SP, #0x1C] \n"
550 " CMP R4, #2 \n"
551 " LDR R3, [R0, #0x8C] \n"
552 " CMPNE R4, #6 \n"
553 " BNE loc_FFC7E064 \n"
554 " LDR R12, [R0, #0x88] \n"
555 " MOV R0, SP \n"
556 " MOV R2, R4 \n"
557 " MOV R1, #1 \n"
558 " BLX R12 \n"
559 " LDR R0, [SP, #0x1C] \n"
560 " MOV R2, SP \n"
561 " ADD R1, SP, #0x10 \n"
562 " BL sub_FFC7DA9C \n"
563
564 "loc_FFC7E050:\n"
565 " LDR R0, [SP, #0x1C] \n"
566 " LDR R2, [SP, #0xC] \n"
567 " MOV R1, R4 \n"
568 " BL sub_FFC7DD1C \n"
569 " B loc_FFC7E2BC \n"
570
571 "loc_FFC7E064:\n"
572 " LDR R1, [R0, #0x7C] \n"
573 " LDR R12, [R0, #0x88] \n"
574 " ADD R0, R0, #4 \n"
575 " MOV R2, R4 \n"
576 " BLX R12 \n"
577 " B loc_FFC7E2BC \n"
578
579 "loc_FFC7E07C:\n"
580 " CMP R1, #0x22 \n"
581 " CMPNE R1, #0x23 \n"
582 " BNE loc_FFC7E0C8 \n"
583 " LDR R1, [R0, #0x7C] \n"
584 " ADD R1, R1, R1, LSL#1 \n"
585 " ADD R1, R0, R1, LSL#2 \n"
586 " SUB R1, R1, #8 \n"
587 " LDMIA R1, {R2-R4} \n"
588 " STMIA R6, {R2-R4} \n"
589 " BL sub_FFC7BDBC \n"
590 " LDR R0, [SP, #0x1C] \n"
591 " LDR R1, [R0, #0x7C] \n"
592 " LDR R3, [R0, #0x88] \n"
593 " LDR R2, [R0, #0x8C] \n"
594 " ADD R0, R0, #4 \n"
595 " BLX R3 \n"
596 " LDR R0, [SP, #0x1C] \n"
597 " BL sub_FFC7C0AC \n"
598 " B loc_FFC7E2BC \n"
599
600 "loc_FFC7E0C8:\n"
601 " ADD R1, R0, #4 \n"
602 " LDMIA R1, {R2,R3,R12} \n"
603 " STMIA R6, {R2,R3,R12} \n"
604 " LDR R1, [R0] \n"
605 " CMP R1, #0x25 \n"
606 " ADDLS PC, PC, R1, LSL#2 \n"
607 " B loc_FFC7E29C \n"
608 " B loc_FFC7E17C \n"
609 " B loc_FFC7E17C \n"
610 " B loc_FFC7E184 \n"
611 " B loc_FFC7E18C \n"
612 " B loc_FFC7E18C \n"
613 " B loc_FFC7E18C \n"
614 " B loc_FFC7E17C \n"
615 " B loc_FFC7E184 \n"
616 " B loc_FFC7E18C \n"
617 " B loc_FFC7E18C \n"
618 " B loc_FFC7E1A4 \n"
619 " B loc_FFC7E1A4 \n"
620 " B loc_FFC7E290 \n"
621 " B loc_FFC7E298 \n"
622 " B loc_FFC7E298 \n"
623 " B loc_FFC7E298 \n"
624 " B loc_FFC7E298 \n"
625 " B loc_FFC7E29C \n"
626 " B loc_FFC7E29C \n"
627 " B loc_FFC7E29C \n"
628 " B loc_FFC7E29C \n"
629 " B loc_FFC7E29C \n"
630 " B loc_FFC7E29C \n"
631 " B loc_FFC7E194 \n"
632 " B loc_FFC7E19C \n"
633 " B loc_FFC7E19C \n"
634 " B loc_FFC7E1B0 \n"
635 " B loc_FFC7E1B0 \n"
636 " B loc_FFC7E1B8 \n"
637 " B loc_FFC7E1E8 \n"
638 " B loc_FFC7E218 \n"
639 " B loc_FFC7E248 \n"
640 " B loc_FFC7E278 \n"
641 " B loc_FFC7E278 \n"
642 " B loc_FFC7E29C \n"
643 " B loc_FFC7E29C \n"
644 " B loc_FFC7E280 \n"
645 " B loc_FFC7E288 \n"
646
647 "loc_FFC7E17C:\n"
648 " BL sub_FFC7AC44 \n"
649 " B loc_FFC7E29C \n"
650
651 "loc_FFC7E184:\n"
652 " BL sub_FFC7AEB8 \n"
653 " B loc_FFC7E29C \n"
654
655 "loc_FFC7E18C:\n"
656 " BL sub_FFC7B0BC \n"
657 " B loc_FFC7E29C \n"
658
659 "loc_FFC7E194:\n"
660 " BL sub_FFC7B324 \n"
661 " B loc_FFC7E29C \n"
662
663 "loc_FFC7E19C:\n"
664 " BL sub_FFC7B518 \n"
665 " B loc_FFC7E29C \n"
666
667 "loc_FFC7E1A4:\n"
668 " BL sub_FFC7B7A8_my \n"
669 " MOV R4, #0 \n"
670 " B loc_FFC7E29C \n"
671
672 "loc_FFC7E1B0:\n"
673 " BL sub_FFC7B8E4 \n"
674 " B loc_FFC7E29C \n"
675
676 "loc_FFC7E1B8:\n"
677 " LDRH R1, [R0, #4] \n"
678 " STRH R1, [SP, #0x10] \n"
679 " LDRH R1, [R5, #2] \n"
680 " STRH R1, [SP, #0x12] \n"
681 " LDRH R1, [R5, #4] \n"
682 " STRH R1, [SP, #0x14] \n"
683 " LDRH R1, [R5, #6] \n"
684 " STRH R1, [SP, #0x16] \n"
685 " LDRH R1, [R0, #0xC] \n"
686 " STRH R1, [SP, #0x18] \n"
687 " BL sub_FFC7F0F4 \n"
688 " B loc_FFC7E29C \n"
689
690 "loc_FFC7E1E8:\n"
691 " LDRH R1, [R0, #4] \n"
692 " STRH R1, [SP, #0x10] \n"
693 " LDRH R1, [R5, #2] \n"
694 " STRH R1, [SP, #0x12] \n"
695 " LDRH R1, [R5, #4] \n"
696 " STRH R1, [SP, #0x14] \n"
697 " LDRH R1, [R5, #6] \n"
698 " STRH R1, [SP, #0x16] \n"
699 " LDRH R1, [R5, #8] \n"
700 " STRH R1, [SP, #0x18] \n"
701 " BL sub_FFC7F254 \n"
702 " B loc_FFC7E29C \n"
703
704 "loc_FFC7E218:\n"
705 " LDRH R1, [R5] \n"
706 " STRH R1, [SP, #0x10] \n"
707 " LDRH R1, [R0, #6] \n"
708 " STRH R1, [SP, #0x12] \n"
709 " LDRH R1, [R5, #4] \n"
710 " STRH R1, [SP, #0x14] \n"
711 " LDRH R1, [R5, #6] \n"
712 " STRH R1, [SP, #0x16] \n"
713 " LDRH R1, [R5, #8] \n"
714 " STRH R1, [SP, #0x18] \n"
715 " BL sub_FFC7F300 \n"
716 " B loc_FFC7E29C \n"
717
718 "loc_FFC7E248:\n"
719 " LDRH R1, [R5] \n"
720 " STRH R1, [SP, #0x10] \n"
721 " LDRH R1, [R5, #2] \n"
722 " STRH R1, [SP, #0x12] \n"
723 " LDRH R1, [R5, #4] \n"
724 " STRH R1, [SP, #0x14] \n"
725 " LDRH R1, [R5, #6] \n"
726 " STRH R1, [SP, #0x16] \n"
727 " LDRH R1, [R0, #0xC] \n"
728 " STRH R1, [SP, #0x18] \n"
729 " BL sub_FFC7F3A0 \n"
730 " B loc_FFC7E29C \n"
731
732 "loc_FFC7E278:\n"
733 " BL sub_FFC7BB84 \n"
734 " B loc_FFC7E29C \n"
735
736 "loc_FFC7E280:\n"
737 " BL sub_FFC7C1B0 \n"
738 " B loc_FFC7E29C \n"
739
740 "loc_FFC7E288:\n"
741 " BL sub_FFC7C3E8 \n"
742 " B loc_FFC7E29C \n"
743
744 "loc_FFC7E290:\n"
745 " BL sub_FFC7C560 \n"
746 " B loc_FFC7E29C \n"
747
748 "loc_FFC7E298:\n"
749 " BL sub_FFC7C6F8 \n"
750
751 "loc_FFC7E29C:\n"
752 " LDR R0, [SP, #0x1C] \n"
753 " LDR R1, [R0, #0x7C] \n"
754 " LDR R3, [R0, #0x88] \n"
755 " LDR R2, [R0, #0x8C] \n"
756 " ADD R0, R0, #4 \n"
757 " BLX R3 \n"
758 " CMP R4, #1 \n"
759 " BNE loc_FFC7E304 \n"
760
761 "loc_FFC7E2BC:\n"
762 " LDR R0, [SP, #0x1C] \n"
763 " MOV R2, #0xC \n"
764 " LDR R1, [R0, #0x7C] \n"
765 " ADD R1, R1, R1, LSL#1 \n"
766 " ADD R0, R0, R1, LSL#2 \n"
767 " SUB R4, R0, #8 \n"
768 " LDR R0, =0x16CD8 \n"
769 " ADD R1, SP, #0x10 \n"
770 " BL sub_FFE6C354 \n"
771 " LDR R0, =0x16CE4 \n"
772 " MOV R2, #0xC \n"
773 " ADD R1, SP, #0x10 \n"
774 " BL sub_FFE6C354 \n"
775 " LDR R0, =0x16CF0 \n"
776 " MOV R2, #0xC \n"
777 " MOV R1, R4 \n"
778 " BL sub_FFE6C354 \n"
779 " B loc_FFC7E37C \n"
780
781 "loc_FFC7E304:\n"
782 " LDR R0, [SP, #0x1C] \n"
783 " LDR R0, [R0] \n"
784 " CMP R0, #0xB \n"
785 " BNE loc_FFC7E34C \n"
786 " MOV R3, #0 \n"
787 " STR R3, [SP] \n"
788 " MOV R3, #1 \n"
789 " MOV R2, #1 \n"
790 " MOV R1, #1 \n"
791 " MOV R0, #0 \n"
792 " BL sub_FFC7AA4C \n"
793 " MOV R3, #0 \n"
794 " STR R3, [SP] \n"
795 " MOV R3, #1 \n"
796 " MOV R2, #1 \n"
797 " MOV R1, #1 \n"
798 " MOV R0, #0 \n"
799 " B loc_FFC7E378 \n"
800
801 "loc_FFC7E34C:\n"
802 " MOV R3, #1 \n"
803 " MOV R2, #1 \n"
804 " MOV R1, #1 \n"
805 " MOV R0, #1 \n"
806 " STR R3, [SP] \n"
807 " BL sub_FFC7AA4C \n"
808 " MOV R3, #1 \n"
809 " MOV R2, #1 \n"
810 " MOV R1, #1 \n"
811 " MOV R0, #1 \n"
812 " STR R3, [SP] \n"
813
814 "loc_FFC7E378:\n"
815 " BL sub_FFC7AB8C \n"
816
817 "loc_FFC7E37C:\n"
818 " LDR R0, [SP, #0x1C] \n"
819 " BL sub_FFC7F080 \n"
820 " B loc_FFC7DDEC \n"
821 );
822 }
823
824
825
826 void __attribute__((naked,noinline)) sub_FFC7B7A8_my() {
827 asm volatile (
828 " STMFD SP!, {R4-R8,LR} \n"
829 " LDR R7, =0x38A8 \n"
830 " MOV R4, R0 \n"
831 " LDR R0, [R7, #0x1C] \n"
832 " MOV R1, #0x3E \n"
833 " BL sub_FFC51518 /*_ClearEventFlag*/ \n"
834 " LDRSH R0, [R4, #4] \n"
835 " MOV R2, #0 \n"
836 " MOV R1, #0 \n"
837 " BL sub_FFC7A7DC \n"
838 " MOV R6, R0 \n"
839 " LDRSH R0, [R4, #6] \n"
840 " BL sub_FFC7A8EC \n"
841 " LDRSH R0, [R4, #8] \n"
842 " BL sub_FFC7A944 \n"
843 " LDRSH R0, [R4, #0xA] \n"
844 " BL sub_FFC7A99C \n"
845 " LDRSH R0, [R4, #0xC] \n"
846 " BL sub_FFC7A9F4 \n"
847 " MOV R5, R0 \n"
848 " LDR R0, [R4] \n"
849 " LDR R8, =0x16CF0 \n"
850 " CMP R0, #0xB \n"
851 " MOVEQ R6, #0 \n"
852 " MOVEQ R5, #0 \n"
853 " BEQ loc_FFC7B838 \n"
854 " CMP R6, #1 \n"
855 " BNE loc_FFC7B838 \n"
856 " LDRSH R0, [R4, #4] \n"
857 " LDR R1, =0xFFC7A748 \n"
858 " MOV R2, #2 \n"
859 " BL sub_FFCF16F8 \n"
860 " STRH R0, [R4, #4] \n"
861 " MOV R0, #0 \n"
862 " STR R0, [R7, #0x28] \n"
863 " B loc_FFC7B840 \n"
864
865 "loc_FFC7B838:\n"
866 " LDRH R0, [R8] \n"
867 " STRH R0, [R4, #4] \n"
868
869 "loc_FFC7B840:\n"
870 " CMP R5, #1 \n"
871 " LDRNEH R0, [R8, #8] \n"
872 " BNE loc_FFC7B85C \n"
873 " LDRSH R0, [R4, #0xC] \n"
874 " LDR R1, =0xFFC7A7CC \n"
875 " MOV R2, #0x20 \n"
876 " BL sub_FFC7F0B0 \n"
877
878 "loc_FFC7B85C:\n"
879 " STRH R0, [R4, #0xC] \n"
880 " LDRSH R0, [R4, #6] \n"
881 " BL sub_FFC6CFE8_my \n"
882 " LDR PC, =0xFFC7B868 \n"
883 );
884 }
885
886
887
888 void __attribute__((naked,noinline)) sub_FFC6CFE8_my() {
889 asm volatile (
890 " STMFD SP!, {R4-R6,LR} \n"
891 " LDR R5, =0x359C \n"
892 " MOV R4, R0 \n"
893 " LDR R0, [R5, #4] \n"
894 " CMP R0, #1 \n"
895 " MOVNE R1, #0x140 \n"
896 " LDRNE R0, =0xFFC6CDEC /*'Shutter.c'*/ \n"
897 " BLNE _DebugAssert \n"
898 " CMN R4, #0xC00 \n"
899 " LDREQSH R4, [R5, #2] \n"
900 " CMN R4, #0xC00 \n"
901 " LDREQ R1, =0x146 \n"
902 " LDREQ R0, =0xFFC6CDEC /*'Shutter.c'*/ \n"
903 " STRH R4, [R5, #2] \n"
904 " BLEQ _DebugAssert \n"
905 " MOV R0, R4 \n"
906 " BL apex2us \n"
907 " MOV R4, R0 \n"
908
909 " MOV R0, R4 \n"
910 " BL sub_FFC96B60 \n"
911 " TST R0, #1 \n"
912 " LDRNE R1, =0x14B \n"
913 " LDMNEFD SP!, {R4-R6,LR} \n"
914 " LDRNE R0, =0xFFC6CDEC /*'Shutter.c'*/ \n"
915 " BNE _DebugAssert \n"
916 " LDMFD SP!, {R4-R6,PC} \n"
917 );
918 }