root/platform/s95/sub/100i/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. boot
  3. sub_FF810354_my
  4. sub_FF811198_my
  5. sub_FF815EE0_my
  6. taskcreate_Startup_my
  7. task_Startup_my
  8. spytask
  9. CreateTask_spytask
  10. CreateTask_PhySw
  11. init_file_modules_task
  12. sub_FF896D0C_my
  13. sub_FF876598_my
  14. sub_FF8761C0_my
  15. sub_FF875EE0_my
  16. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 #include "stdlib.h"
   5 
   6 const char * const new_sa = &_end;
   7 
   8 
   9 // Forward declarations
  10 void CreateTask_PhySw();
  11 void CreateTask_spytask();
  12 extern volatile int jogdial_stopped;
  13 void JogDial_task_my(void);
  14 
  15 
  16 /*---------------------------------------------------------------------
  17   Memory Map:
  18         00001900     MEMBASEADDR             start of data - used for initialized vars
  19         00010FE3                             end of inited data
  20         00010FE4                             start of bss - used for zeroed/uninited vars
  21         00016E2F                             end of bss
  22         0016EE30     MEMISOSTART             start of CHDK code / data / bss
  23         001B0000                                                         end of CHDK data (approx)
  24         001B0001                                                         start of DRYOS heap (approx)
  25         0037FFFF                                                         end of heap (?)
  26 
  27         41269150                                                         raw buffer 0
  28         46000000                             raw buffer 1
  29 
  30         C0xxxxxx                            I/O
  31 
  32         FF810000    ROMBASEADDR             start of rom
  33         FFFFFFFF                            end of rom
  34 ----------------------------------------------------------------------*/
  35 
  36 
  37 /*----------------------------------------------------------------------
  38         taskCreateHook()
  39 -----------------------------------------------------------------------*/
  40 void taskCreateHook(int *p)
  41 {
  42         p-=17;
  43 
  44         if (p[0] == 0xFF88322C)
  45                 p[0] = (int) capt_seq_task;
  46 
  47         if (p[0] == 0xFF98642C)
  48                 p[0] = (int) movie_record_task;
  49 
  50         if (p[0] == 0xFF8A0AA0)
  51                 p[0] = (int) init_file_modules_task;
  52 
  53         if (p[0] == 0xFF8CF1A8)
  54                 p[0] = (int) exp_drv_task;
  55 
  56         if (p[0] == 0xFF865894)
  57                 p[0] = (int) JogDial_task_my;
  58 }
  59 
  60 
  61 /*----------------------------------------------------------------------
  62         boot()
  63 
  64         Main entry point for the CHDK code
  65 -----------------------------------------------------------------------*/
  66 void __attribute__((naked,noinline)) boot()
  67 {
  68     asm volatile (
  69 "       LDR     R1, =0xC0410000 \n"                  
  70 "       MOV     R0, #0 \n"                           
  71 "       STR     R0, [R1] \n"                         
  72 "       MOV     R1, #0x78 \n"                        
  73 "       MCR     p15, 0, R1, c1, c0 \n"               
  74 "       MOV     R1, #0 \n"                           
  75 "       MCR     p15, 0, R1, c7, c10, 4 \n"           
  76 "       MCR     p15, 0, R1, c7, c5 \n"               
  77 "       MCR     p15, 0, R1, c7, c6 \n"               
  78 "       MOV     R0, #0x3D \n"                        
  79 "       MCR     p15, 0, R0, c6, c0 \n"               
  80 "       MOV     R0, #0xC000002F \n"                  
  81 "       MCR     p15, 0, R0, c6, c1 \n"               
  82 "       MOV     R0, #0x35 \n"                        
  83 "       MCR     p15, 0, R0, c6, c2 \n"               
  84 "       MOV     R0, #0x40000035 \n"                  
  85 "       MCR     p15, 0, R0, c6, c3 \n"               
  86 "       MOV     R0, #0x80000017 \n"                  
  87 "       MCR     p15, 0, R0, c6, c4 \n"               
  88 "       LDR     R0, =0xFF80002D \n"                  
  89 "       MCR     p15, 0, R0, c6, c5 \n"               
  90 "       MOV     R0, #0x34 \n"                        
  91 "       MCR     p15, 0, R0, c2, c0 \n"               
  92 "       MOV     R0, #0x34 \n"                        
  93 "       MCR     p15, 0, R0, c2, c0, 1 \n"            
  94 "       MOV     R0, #0x34 \n"                        
  95 "       MCR     p15, 0, R0, c3, c0 \n"               
  96 "       LDR     R0, =0x3333330 \n"                   
  97 "       MCR     p15, 0, R0, c5, c0, 2 \n"            
  98 "       LDR     R0, =0x3333330 \n"                   
  99 "       MCR     p15, 0, R0, c5, c0, 3 \n"            
 100 "       MRC     p15, 0, R0, c1, c0 \n"               
 101 "       ORR     R0, R0, #0x1000 \n"                  
 102 "       ORR     R0, R0, #4 \n"                       
 103 "       ORR     R0, R0, #1 \n"                       
 104 "       MCR     p15, 0, R0, c1, c0 \n"               
 105 "       MOV     R1, #0x80000006 \n"                  
 106 "       MCR     p15, 0, R1, c9, c1 \n"               
 107 "       MOV     R1, #6 \n"                           
 108 "       MCR     p15, 0, R1, c9, c1, 1 \n"            
 109 "       MRC     p15, 0, R1, c1, c0 \n"               
 110 "       ORR     R1, R1, #0x50000 \n"                 
 111 "       MCR     p15, 0, R1, c1, c0 \n"               
 112 "       LDR     R2, =0xC0200000 \n"                  
 113 "       MOV     R1, #1 \n"                           
 114 "       STR     R1, [R2, #0x10C] \n"                 
 115 "       MOV     R1, #0xFF \n"                        
 116 "       STR     R1, [R2, #0xC] \n"                   
 117 "       STR     R1, [R2, #0x1C] \n"                  
 118 "       STR     R1, [R2, #0x2C] \n"                  
 119 "       STR     R1, [R2, #0x3C] \n"                  
 120 "       STR     R1, [R2, #0x4C] \n"                  
 121 "       STR     R1, [R2, #0x5C] \n"                  
 122 "       STR     R1, [R2, #0x6C] \n"                  
 123 "       STR     R1, [R2, #0x7C] \n"                  
 124 "       STR     R1, [R2, #0x8C] \n"                  
 125 "       STR     R1, [R2, #0x9C] \n"                  
 126 "       STR     R1, [R2, #0xAC] \n"                  
 127 "       STR     R1, [R2, #0xBC] \n"                  
 128 "       STR     R1, [R2, #0xCC] \n"                  
 129 "       STR     R1, [R2, #0xDC] \n"                  
 130 "       STR     R1, [R2, #0xEC] \n"                  
 131 "       STR     R1, [R2, #0xFC] \n"                  
 132 "       LDR     R1, =0xC0400008 \n"                  
 133 "       LDR     R2, =0x430005 \n"                    
 134 "       STR     R2, [R1] \n"                         
 135 "       MOV     R1, #1 \n"                           
 136 "       LDR     R2, =0xC0243100 \n"                  
 137 "       STR     R2, [R1] \n"                         
 138 "       LDR     R2, =0xC0242010 \n"                  
 139 "       LDR     R1, [R2] \n"                         
 140 "       ORR     R1, R1, #1 \n"                       
 141 "       STR     R1, [R2] \n"                         
 142 "       LDR     R0, =0xFFC9A22C \n"                  
 143 "       LDR     R1, =0x1900 \n"                      
 144 "       LDR     R3, =0x10FE4 \n"                     
 145 "loc_FF81013C:\n"
 146 "       CMP     R1, R3 \n"                           
 147 "       LDRCC   R2, [R0], #4 \n"                   
 148 "       STRCC   R2, [R1], #4 \n"                   
 149 "       BCC     loc_FF81013C \n"                     
 150 "       LDR     R1, =0x16EE30 \n"                    
 151 "       MOV     R2, #0 \n"                           
 152 "loc_FF810154:\n"
 153 "       CMP     R3, R1 \n"                           
 154 "       STRCC   R2, [R3], #4 \n"                   
 155 "       BCC     loc_FF810154 \n"   
 156 //"             B       sub_FF810354 \n"                  
 157 "       B       sub_FF810354_my \n"     
 158     );
 159 };
 160 
 161 
 162 /*----------------------------------------------------------------------
 163         sub_FF810354_my    0xFF810354
 164 -----------------------------------------------------------------------*/
 165 void __attribute__((naked,noinline)) sub_FF810354_my()
 166 {
 167     *(int*)0x1938 = (int)taskCreateHook;
 168     *(int*)0x193C = (int)taskCreateHook;
 169 
 170         // s95 @FF864D68
 171         // fix for correct power-on
 172         // must also comment out function in taskcreate_Startup_my
 173 
 174         if ((*(int*) 0xC0220128) & 1)                                   // look at play switch
 175                 *(int*)(0x25E8) = 0x200000;                                     // start in play mode
 176         else
 177                 *(int*)(0x25E8) = 0x100000;                                     // start in rec mode
 178 
 179         asm volatile (
 180 "       LDR     R0, =0xFF8103CC \n"                  
 181 "       MOV     R1, #0 \n"                           
 182 "       LDR     R3, =0xFF810404 \n"                  
 183 "loc_FF810360:\n"
 184 "       CMP     R0, R3 \n"                           
 185 "       LDRCC   R2, [R0], #4 \n"                   
 186 "       STRCC   R2, [R1], #4 \n"                   
 187 "       BCC     loc_FF810360 \n"                     
 188 "       LDR     R0, =0xFF810404 \n"                  
 189 "       MOV     R1, #0x4B0 \n"                       
 190 "       LDR     R3, =0xFF810618 \n"                  
 191 "loc_FF81037C:\n"
 192 "       CMP     R0, R3 \n"                           
 193 "       LDRCC   R2, [R0], #4 \n"                   
 194 "       STRCC   R2, [R1], #4 \n"                   
 195 "       BCC     loc_FF81037C \n"                     
 196 "       MOV     R0, #0xD2 \n"                        
 197 "       MSR     CPSR_cxsf, R0 \n"                    
 198 "       MOV     SP, #0x1000 \n"                      
 199 "       MOV     R0, #0xD3 \n"                        
 200 "       MSR     CPSR_cxsf, R0 \n"                    
 201 "       MOV     SP, #0x1000 \n"                      
 202 "       LDR     R0, =0x6C4 \n"                       
 203 "       LDR     R2, =0xEEEEEEEE \n"                  
 204 "       MOV     R3, #0x1000 \n"                      
 205 "loc_FF8103B0:\n"
 206 "       CMP     R0, R3 \n"                           
 207 "       STRCC   R2, [R0], #4 \n"                   
 208 "       BCC     loc_FF8103B0 \n"                     
 209 //"     BL      sub_FF811198 \n"   
 210 "       BL      sub_FF811198_my \n"                     // patched 
 211         );
 212 }
 213 
 214 /*----------------------------------------------------------------------
 215  ** sub_FF811198_my  @ 0xFF811198 
 216 -----------------------------------------------------------------------*/
 217 
 218 void __attribute__((naked,noinline)) sub_FF811198_my(  ) { 
 219 asm volatile (
 220 "       STR     LR, [SP, #-4]! \n"                   
 221 "       SUB     SP, SP, #0x74 \n"                    
 222 "       MOV     R0, SP \n"                           
 223 "       MOV     R1, #0x74 \n"                        
 224 "       BL      sub_FFB9F320 \n"                      
 225 "       MOV     R0, #0x53000 \n"                     
 226 "       STR     R0, [SP, #4] \n"                     
 227 //"     LDR     R0, =0x16EE30 \n"                    
 228 "       LDR     R0, =new_sa \n"                                 // patched
 229 "       LDR R0, [R0] \n"
 230 "       LDR     R1, =0x379C00 \n"                    
 231 "       STR     R0, [SP, #8] \n"                     
 232 "       RSB     R0, R0, #0x1F80 \n"                  
 233 "       ADD     R0, R0, #0x370000 \n"                
 234 "       STR     R0, [SP, #0xC] \n"                   
 235 "       LDR     R0, =0x371F80 \n"                    
 236 "       STR     R1, [SP] \n"                         
 237 "       STRD    R0, [SP, #0x10] \n"                 
 238 "       MOV     R0, #0x22 \n"                        
 239 "       STR     R0, [SP, #0x18] \n"                  
 240 "       MOV     R0, #0x68 \n"                        
 241 "       STR     R0, [SP, #0x1C] \n"                  
 242 "       LDR     R0, =0x19B \n"                       
 243 //"     LDR     R1, =sub_FF815EE0 \n" 
 244 "       LDR     R1, =sub_FF815EE0_my \n"                // patched
 245 "       STR     R0, [SP, #0x20] \n"                  
 246 "       MOV     R0, #0x96 \n"                        
 247 "       STR     R0, [SP, #0x24] \n"                  
 248 "       STR     R0, [SP, #0x28] \n"                  
 249 "       MOV     R0, #0x64 \n"                        
 250 "       STR     R0, [SP, #0x2C] \n"                  
 251 "       MOV     R0, #0 \n"                           
 252 "       STR     R0, [SP, #0x30] \n"                  
 253 "       STR     R0, [SP, #0x34] \n"                  
 254 "       MOV     R0, #0x10 \n"                        
 255 "       STR     R0, [SP, #0x5C] \n"                  
 256 "       MOV     R0, #0x800 \n"                       
 257 "       STR     R0, [SP, #0x60] \n"                  
 258 "       MOV     R0, #0xA0 \n"                        
 259 "       STR     R0, [SP, #0x64] \n"                  
 260 "       MOV     R0, #0x280 \n"                       
 261 "       STR     R0, [SP, #0x68] \n"                  
 262 "       MOV     R0, SP \n"                           
 263 "       MOV     R2, #0 \n"                           
 264 "       BL      sub_FF8134B8 \n"                      
 265 "       ADD     SP, SP, #0x74 \n"                    
 266 "       LDR     PC, [SP], #4 \n"                     
 267         );
 268 }
 269 
 270 
 271 /*----------------------------------------------------------------------
 272         sub_FF815EE0_my     0xFF815EE0 
 273 -----------------------------------------------------------------------*/
 274 void __attribute__((naked,noinline)) sub_FF815EE0_my()
 275 {
 276         asm volatile (
 277 "       STMFD   SP!, {R4,LR} \n"                   
 278 "       BL      sub_FF810B20 \n"                      
 279 "       BL      sub_FF81A33C \n"                      
 280 "       CMP     R0, #0 \n"                           
 281 "       LDRLT   R0, =0xFF815FF4 \n"                
 282 "       BLLT    sub_FF815FD4 \n"                    
 283 "       BL      sub_FF815B1C \n"                      
 284 "       CMP     R0, #0 \n"                           
 285 "       LDRLT   R0, =0xFF815FFC \n"                
 286 "       BLLT    sub_FF815FD4 \n"                    
 287 "       LDR     R0, =0xFF81600C \n"                  
 288 "       BL      sub_FF815C04 \n"                      
 289 "       CMP     R0, #0 \n"                           
 290 "       LDRLT   R0, =0xFF816014 \n"                
 291 "       BLLT    sub_FF815FD4 \n"                    
 292 "       LDR     R0, =0xFF81600C \n"                  
 293 "       BL      sub_FF813CA4 \n"                      
 294 "       CMP     R0, #0 \n"                           
 295 "       LDRLT   R0, =0xFF816028 \n"                
 296 "       BLLT    sub_FF815FD4 \n"                    
 297 "       BL      sub_FF819CC4 \n"                      
 298 "       CMP     R0, #0 \n"                           
 299 "       LDRLT   R0, =0xFF816034 \n"                
 300 "       BLLT    sub_FF815FD4 \n"                    
 301 "       BL      sub_FF81167C \n"                      
 302 "       CMP     R0, #0 \n"                           
 303 "       LDRLT   R0, =0xFF816040 \n"                
 304 "       BLLT    sub_FF815FD4 \n"                    
 305 "       LDMFD   SP!, {R4,LR} \n"                   
 306 //"     B       sub_FF81FB54 \n"         
 307 "       B       taskcreate_Startup_my \n" 
 308 "               MOV     R0, #0 \n"
 309 "               LDMFD   SP!, {R3-R5,PC} \n"
 310         );
 311 }
 312 
 313 
 314 /*----------------------------------------------------------------------
 315         taskcreate_Startup_my     0xFF81FB54
 316 -----------------------------------------------------------------------*/
 317 void __attribute__((naked,noinline)) taskcreate_Startup_my()
 318 {
 319     asm volatile (
 320 "       STMFD   SP!, {R3-R5,LR} \n"                
 321 "       BL      sub_FF8346CC \n"                      
 322 "       BL      sub_FF83C6B0 \n"                      
 323 "       CMP     R0, #0 \n"                           
 324 "       BNE     loc_FF81FBA8 \n"                     
 325 "       BL      sub_FF8360B8 \n"                      
 326 "       CMP     R0, #0 \n"                           
 327 "       BEQ     loc_FF81FBA8 \n"                     
 328 "       LDR     R4, =0xC0220000 \n"                  
 329 "       LDR     R0, [R4, #0x12C] \n"                 
 330 "       TST     R0, #1 \n"                           
 331 "       MOVEQ   R0, #0x12C \n"                     
 332 "       BLEQ    sub_FF83AA4C \n"                    
 333 "       BL      sub_FF8346C8 \n"                      
 334 "       CMP     R0, #0 \n"                           
 335 "       BNE     loc_FF81FBA8 \n"                     
 336 "       BL      sub_FF833D5C \n"                      
 337 "       MOV     R0, #0x44 \n"                        
 338 "       STR     R0, [R4, #0x1C] \n"                  
 339 "       BL      sub_FF833F4C \n"                      
 340 "loc_FF81FBA4:\n"
 341 "       B       loc_FF81FBA4 \n"                       
 342 "loc_FF81FBA8:\n"
 343 // we must remove this for power-on mode handling in sub_FF810354_my to work
 344 //"     BL      sub_FF8346D4 \n"                      
 345 "       BL      sub_FF8346D0 \n"                      
 346 "       BL      sub_FF83A8C4 \n"                      
 347 "       LDR     R1, =0x3CE000 \n"                    
 348 "       MOV     R0, #0 \n"                           
 349 "       BL      sub_FF83AD0C \n"                      
 350 "       BL      sub_FF83AAB8 \n"                      
 351 "       MOV     R3, #0 \n"                           
 352 "       STR     R3, [SP] \n"                         
 353 //"     LDR     R3, =0xFF81FAF0 \n"        
 354 "       LDR     R3, =task_Startup_my \n"                // patched     
 355 "       MOV     R2, #0 \n"                           
 356 "       MOV     R1, #0x19 \n"                        
 357 "       LDR     R0, =0xFF81FBF0 \n"                  
 358 "       BL      sub_FF81E8A0 \n"                      
 359 "       MOV     R0, #0 \n"                           
 360 "       LDMFD   SP!, {R3-R5,PC} \n" 
 361        
 362         );
 363 }
 364 
 365 
 366 /*----------------------------------------------------------------------
 367         task_Startup_my    0xFF81FAF0
 368 -----------------------------------------------------------------------*/
 369 void __attribute__((naked,noinline)) task_Startup_my()
 370 {
 371         asm volatile (
 372 "       STMFD   SP!, {R4,LR} \n"                   
 373 "       BL      sub_FF816594 \n"                      
 374 "       BL      sub_FF835830 \n"                      
 375 "       BL      sub_FF8339B4 \n"                      
 376 "       BL      sub_FF83C6F4 \n"                      
 377 "       BL      sub_FF83C8E0 \n"                      
 378 //"     BL      sub_FF83C788 \n"                      
 379 "       BL      sub_FF83CA88 \n"                      
 380 "       BL      sub_FF832484 \n"                      
 381 "       BL      sub_FF83C910 \n"                      
 382 "       BL      sub_FF83A068 \n"                      
 383 "       BL      sub_FF83CA8C \n"                      
 384 //"     BL      sub_FF8345B0 \n" 
 385         );
 386 
 387                 CreateTask_PhySw();                                     // our keyboard task
 388                 CreateTask_spytask();                           // chdk initialization
 389 
 390     asm volatile (
 391 "       BL      sub_FF837D14 \n"                      
 392 "       BL      sub_FF83CAA4 \n"                      
 393 "       BL      sub_FF831888 \n"                      
 394 "       BL      sub_FF833318 \n"                      
 395 "       BL      sub_FF83C478 \n"                      
 396 "       BL      sub_FF833968 \n"                      
 397 "       BL      sub_FF8332B4 \n"                      
 398 "       BL      sub_FF8324B8 \n"                      
 399 "       BL      sub_FF83D670 \n"                      
 400 "       BL      sub_FF833278 \n"                      
 401 "       LDMFD   SP!, {R4,LR} \n"                   
 402 "       B       sub_FF8166B4 \n" 
 403         );
 404 }
 405 
 406 
 407 /*----------------------------------------------------------------------
 408         spytask
 409 -----------------------------------------------------------------------*/
 410 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
 411 {
 412     core_spytask();
 413 }
 414 
 415 
 416 /*----------------------------------------------------------------------
 417         CreateTask_spytask
 418 -----------------------------------------------------------------------*/
 419 void CreateTask_spytask()
 420 {
 421         _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
 422 }
 423 
 424 
 425 /*----------------------------------------------------------------------
 426         CreateTask_PhySw   0xFF8345A8
 427 -----------------------------------------------------------------------*/
 428 void __attribute__((naked,noinline)) CreateTask_PhySw()
 429 {
 430     asm volatile (                  
 431 "       STMFD   SP!, {R3-R5,LR} \n"                
 432 "       LDR     R4, =0x1C30 \n"                      
 433 "       LDR     R0, [R4, #0x10] \n"                  
 434 "       CMP     R0, #0 \n"                           
 435 "       BNE     loc_FF8345E4 \n"                     
 436 "       MOV     R3, #0 \n"                           
 437 "       STR     R3, [SP] \n"                         
 438 //"     LDR     R3, =sub_FF83457C \n"                  
 439 "       LDR     R3, =mykbd_task \n"                     // PhySw Task patch 
 440 "       MOV     R2, #0x2000 \n"                                 // larger stack                      
 441 "       MOV     R1, #0x17 \n"                        
 442 "       LDR     R0, =0xFF8347DC \n"                  
 443 "       BL      sub_FF83AB0C \n"                      
 444 "       STR     R0, [R4, #0x10] \n"                  
 445 "loc_FF8345E4:\n"
 446 "       BL      sub_FF865BC0 \n"                      
 447 "       BL      sub_FF894834 \n"                      
 448 "       BL      sub_FF836030 \n"                      
 449 "       CMP     R0, #0 \n"                           
 450 "       LDREQ   R1, =0x34CC0 \n"                   
 451 "       LDMEQFD SP!, {R3-R5,LR} \n"              
 452 "       BEQ     sub_FF8947BC \n"                     
 453 "       LDMFD   SP!, {R3-R5,PC} \n"  
 454         );
 455 }
 456 
 457 
 458 /*----------------------------------------------------------------------
 459         init_file_modules_task()   0xFF8A0AA0
 460 -----------------------------------------------------------------------*/
 461 void __attribute__((naked,noinline)) init_file_modules_task()
 462 {
 463         asm volatile (
 464 "       STMFD   SP!, {R4-R6,LR} \n"                
 465 "       BL      sub_FF896CE0 \n"                      
 466 "       LDR     R5, =0x5006 \n"                      
 467 "       MOVS    R4, R0 \n"                          
 468 "       MOVNE   R1, #0 \n"                         
 469 "       MOVNE   R0, R5 \n"                         
 470 "       BLNE    sub_FF89AAD4 \n"                    
 471 //"     BL      sub_FF896D0C \n"                      
 472 "       BL      sub_FF896D0C_my \n"                             // patched  
 473 "       BL      core_spytask_can_start\n"       // added
 474 "       CMP     R4, #0 \n"                           
 475 "       MOVEQ   R0, R5 \n"                         
 476 "       LDMEQFD SP!, {R4-R6,LR} \n"              
 477 "       MOVEQ   R1, #0 \n"                         
 478 "       BEQ     sub_FF89AAD4 \n"                     
 479 "       LDMFD   SP!, {R4-R6,PC} \n"     
 480         );
 481 }
 482 
 483 
 484 /*----------------------------------------------------------------------
 485         sub_FF896D0C_my()
 486 -----------------------------------------------------------------------*/
 487 void __attribute__((naked,noinline)) sub_FF896D0C_my()
 488 {
 489         asm volatile (
 490 "       STMFD   SP!, {R4,LR} \n"                   
 491 "       MOV     R0, #3 \n"                           
 492 //"     BL      sub_FF876598 \n"
 493 "       BL      sub_FF876598_my \n"                     // patched   
 494 "       BL      sub_FF96A8E8 \n"                      
 495 "       LDR     R4, =0x3244 \n"                      
 496 "       LDR     R0, [R4, #4] \n"                     
 497 "       CMP     R0, #0 \n"                           
 498 "       BNE     loc_FF896D44 \n"                     
 499 "       BL      sub_FF8757DC \n"                      
 500 "       BL      sub_FF95D878 \n"                      
 501 "       BL      sub_FF8757DC \n"                      
 502 "       BL      sub_FF871B80 \n"                      
 503 "       BL      sub_FF8756DC \n"                      
 504 "       BL      sub_FF95D914 \n"                      
 505 "loc_FF896D44:\n"
 506 "       MOV     R0, #1 \n"                           
 507 "       STR     R0, [R4] \n"                         
 508 "       LDMFD   SP!, {R4,PC} \n"  
 509         );
 510 }
 511 
 512 
 513 /*----------------------------------------------------------------------
 514         sub_FF876598_my()
 515 -----------------------------------------------------------------------*/
 516 void __attribute__((naked,noinline)) sub_FF876598_my()
 517 {
 518         asm volatile (
 519 "       STMFD   SP!, {R4-R8,LR} \n"                
 520 "       MOV     R8, R0 \n"                           
 521 "       BL      sub_FF876518 \n"                      
 522 "       LDR     R1, =0x3B0A8 \n"                     
 523 "       MOV     R6, R0 \n"                           
 524 "       ADD     R4, R1, R0, LSL #7 \n"               
 525 "       LDR     R0, [R4, #0x6C] \n"                  
 526 "       CMP     R0, #4 \n"                           
 527 "       LDREQ   R1, =0x83F \n"                     
 528 "       LDREQ   R0, =0xFF876058 \n"                
 529 "       BLEQ    sub_FF81EB78 \n"                    
 530 "       MOV     R1, R8 \n"                           
 531 "       MOV     R0, R6 \n"                           
 532 "       BL      sub_FF875DCC \n"                      
 533 "       LDR     R0, [R4, #0x38] \n"                  
 534 "       BL      sub_FF876C3C \n"                      
 535 "       CMP     R0, #0 \n"                           
 536 "       STREQ   R0, [R4, #0x6C] \n"                
 537 "       MOV     R0, R6 \n"                           
 538 "       BL      sub_FF875E5C \n"                      
 539 "       MOV     R0, R6 \n"                           
 540 //"     BL      sub_FF8761C0 \n"  
 541 "       BL      sub_FF8761C0_my \n"                     // patched                     
 542 "       MOV     R5, R0 \n"                           
 543 "       MOV     R0, R6 \n"                           
 544 "       BL      sub_FF8763F0 \n"                      
 545 "       LDR     R6, [R4, #0x3C] \n"                  
 546 "       AND     R7, R5, R0 \n"                       
 547 "       CMP     R6, #0 \n"                           
 548 "       LDR     R1, [R4, #0x38] \n"                  
 549 "       MOVEQ   R0, #0x80000001 \n"                
 550 "       MOV     R5, #0 \n"                           
 551 "       BEQ     loc_FF876648 \n"                     
 552 "       MOV     R0, R1 \n"                           
 553 "       BL      sub_FF875944 \n"                      
 554 "       CMP     R0, #0 \n"                           
 555 "       MOVNE   R5, #4 \n"                         
 556 "       CMP     R6, #5 \n"                           
 557 "       ORRNE   R0, R5, #1 \n"                     
 558 "       BICEQ   R0, R5, #1 \n"                     
 559 "       CMP     R7, #0 \n"                           
 560 "       BICEQ   R0, R0, #2 \n"                     
 561 "       ORREQ   R0, R0, #0x80000000 \n"            
 562 "       BICNE   R0, R0, #0x80000000 \n"            
 563 "       ORRNE   R0, R0, #2 \n"                     
 564 "loc_FF876648:\n"
 565 "       CMP     R8, #7 \n"                           
 566 "       STR     R0, [R4, #0x40] \n"                  
 567 "       LDMNEFD SP!, {R4-R8,PC} \n"              
 568 "       MOV     R0, R8 \n"                           
 569 "       BL      sub_FF876568 \n"                      
 570 "       CMP     R0, #0 \n"                           
 571 "       LDMEQFD SP!, {R4-R8,LR} \n"              
 572 "       LDREQ   R0, =0xFF876694 \n"                
 573 "       BEQ     sub_FF81177C \n"                     
 574 "       LDMFD   SP!, {R4-R8,PC} \n"         
 575         );
 576 }
 577 
 578 
 579 /*----------------------------------------------------------------------
 580         sub_FF8761C0_my()
 581 -----------------------------------------------------------------------*/
 582 void __attribute__((naked,noinline)) sub_FF8761C0_my()
 583 {
 584         asm volatile (
 585 "       STMFD   SP!, {R4-R6,LR} \n"                
 586 "       MOV     R5, R0 \n"                           
 587 "       LDR     R0, =0x3B0A8 \n"                     
 588 "       ADD     R4, R0, R5, LSL #7 \n"               
 589 "       LDR     R0, [R4, #0x6C] \n"                  
 590 "       TST     R0, #2 \n"                           
 591 "       MOVNE   R0, #1 \n"                         
 592 "       LDMNEFD SP!, {R4-R6,PC} \n"              
 593 "       LDR     R0, [R4, #0x38] \n"                  
 594 "       MOV     R1, R5 \n"                           
 595 //"     BL      sub_FF875EE0 \n"    
 596 "       BL      sub_FF875EE0_my \n"                             // patched                      
 597 "       CMP     R0, #0 \n"                           
 598 "       LDRNE   R0, [R4, #0x38] \n"                
 599 "       MOVNE   R1, R5 \n"                         
 600 "       BLNE    sub_FF87607C \n"                    
 601 "       LDR     R2, =0x3B128 \n"                     
 602 "       ADD     R1, R5, R5, LSL #4 \n"               
 603 "       LDR     R1, [R2, R1, LSL #2] \n"             
 604 "       CMP     R1, #4 \n"                           
 605 "       BEQ     loc_FF876220 \n"                     
 606 "       CMP     R0, #0 \n"                           
 607 "       LDMEQFD SP!, {R4-R6,PC} \n"              
 608 "       MOV     R0, R5 \n"                           
 609 "       BL      sub_FF8759D4 \n"                      
 610 "loc_FF876220:\n"
 611 "       CMP     R0, #0 \n"                           
 612 "       LDRNE   R1, [R4, #0x6C] \n"                
 613 "       ORRNE   R1, R1, #2 \n"                     
 614 "       STRNE   R1, [R4, #0x6C] \n"                
 615 "       LDMFD   SP!, {R4-R6,PC} \n"  
 616         );
 617 }
 618 
 619 
 620 /*----------------------------------------------------------------------
 621         sub_FF875EE0_my()
 622 -----------------------------------------------------------------------*/
 623 void __attribute__((naked,noinline)) sub_FF875EE0_my()
 624 {
 625         asm volatile (
 626 "       STMFD   SP!, {R4-R10,LR} \n"               
 627 "       MOV     R9, R0 \n"                           
 628 "       LDR     R0, =0x3B0A8 \n"                     
 629 "       MOV     R8, #0 \n"                           
 630 "       ADD     R5, R0, R1, LSL #7 \n"               
 631 "       LDR     R0, [R5, #0x3C] \n"                  
 632 "       MOV     R7, #0 \n"                           
 633 "       CMP     R0, #7 \n"                           
 634 "       MOV     R6, #0 \n"                           
 635 "       ADDLS   PC, PC, R0, LSL #2 \n"             
 636 "       B       loc_FF876038 \n"                       
 637 "       B       loc_FF875F44 \n"                       
 638 "       B       loc_FF875F2C \n"                       
 639 "       B       loc_FF875F2C \n"                       
 640 "       B       loc_FF875F2C \n"                       
 641 "       B       loc_FF875F2C \n"                       
 642 "       B       loc_FF876030 \n"                       
 643 "       B       loc_FF875F2C \n"                       
 644 "       B       loc_FF875F2C \n"                       
 645 "loc_FF875F2C:\n"
 646 "       MOV     R2, #0 \n"                           
 647 "       MOV     R1, #0x200 \n"                       
 648 "       MOV     R0, #2 \n"                           
 649 "       BL      sub_FF890D90 \n"                      
 650 "       MOVS    R4, R0 \n"                          
 651 "       BNE     loc_FF875F4C \n"                     
 652 "loc_FF875F44:\n"
 653 "       MOV     R0, #0 \n"                           
 654 "       LDMFD   SP!, {R4-R10,PC} \n"               
 655 "loc_FF875F4C:\n"
 656 "       LDR     R12, [R5, #0x50] \n"                 
 657 "       MOV     R3, R4 \n"                           
 658 "       MOV     R2, #1 \n"                           
 659 "       MOV     R1, #0 \n"                           
 660 "       MOV     R0, R9 \n"                           
 661 "       BLX     R12 \n"                              
 662 "       CMP     R0, #1 \n"                           
 663 "       BNE     loc_FF875F78 \n"                     
 664 "       MOV     R0, #2 \n"                           
 665 "       BL      sub_FF890EE0 \n"                      
 666 "       B       loc_FF875F44 \n"                       
 667 "loc_FF875F78:\n"
 668 "       LDR     R1, [R5, #0x64] \n"                  
 669 "       MOV     R0, R9 \n"                           
 670 "       BLX     R1 \n"                               
 671 //------------------  begin added code ---------------
 672                 "MOV   R1, R4\n"           //  pointer to MBR in R1
 673                 "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 674 
 675                 // Start of DataGhost's FAT32 autodetection code
 676                 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 677                 // According to the code below, we can use R1, R2, R3 and R12.
 678                 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 679                 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 680                 "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 681                 "MOV     LR, R4\n"                     // Save old offset for MBR signature
 682                 "MOV     R1, #1\n"                     // Note the current partition number
 683                 "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 684    "dg_sd_fat32:\n"
 685                 "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 686                 "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 687                 "ADD     R12, R12, #0x10\n"            // Second partition
 688                 "ADD     R1, R1, #1\n"                 // Second partition for the loop
 689    "dg_sd_fat32_enter:\n"
 690                 "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 691                 "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 692                 "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 693                 "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 694                 "BNE     dg_sd_fat32\n"                // No, it isn't.
 695                 "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 696                 "CMPNE   R2, #0x80\n"
 697                 "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 698                                                                                            // This partition is valid, it's the first one, bingo!
 699                 "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 700 
 701    "dg_sd_fat32_end:\n"
 702                 // End of DataGhost's FAT32 autodetection code
 703 //------------------  end added code ---------------
 704 "       LDRB    R1, [R4, #0x1C9] \n"                
 705 "       LDRB    R3, [R4, #0x1C8] \n"                
 706 "       LDRB    R12, [R4, #0x1CC] \n"               
 707 "       MOV     R1, R1, LSL #0x18 \n"                
 708 "       ORR     R1, R1, R3, LSL #0x10 \n"            
 709 "       LDRB    R3, [R4, #0x1C7] \n"                
 710 "       LDRB    R2, [R4, #0x1BE] \n"                
 711 //"     LDRB    LR, [R4, #0x1FF] \n"                            // replaced, see below                
 712 "       ORR     R1, R1, R3, LSL #8 \n"               
 713 "       LDRB    R3, [R4, #0x1C6] \n"                
 714 "       CMP     R2, #0 \n"                           
 715 "       CMPNE   R2, #0x80 \n"                      
 716 "       ORR     R1, R1, R3 \n"                       
 717 "       LDRB    R3, [R4, #0x1CD] \n"                
 718 "       MOV     R3, R3, LSL #0x18 \n"                
 719 "       ORR     R3, R3, R12, LSL #0x10 \n"           
 720 "       LDRB    R12, [R4, #0x1CB] \n"               
 721 "       ORR     R3, R3, R12, LSL #8 \n"              
 722 "       LDRB    R12, [R4, #0x1CA] \n"               
 723 "       ORR     R3, R3, R12 \n"                      
 724 //"     LDRB    R12, [R4, #0x1FE] \n"               
 725 "       LDRB    R12, [LR,#0x1FE]\n"        // New! First MBR signature byte (0x55)
 726 "       LDRB    LR, [LR,#0x1FF]\n"         //      Last MBR signature byte (0xAA)
 727 "       BNE     loc_FF876004 \n"                     
 728 "       CMP     R0, R1 \n"                           
 729 "       BCC     loc_FF876004 \n"                     
 730 "       ADD     R2, R1, R3 \n"                       
 731 "       CMP     R2, R0 \n"                           
 732 "       CMPLS   R12, #0x55 \n"                     
 733 "       CMPEQ   LR, #0xAA \n"                      
 734 "       MOVEQ   R7, R1 \n"                         
 735 "       MOVEQ   R6, R3 \n"                         
 736 "       MOVEQ   R4, #1 \n"                         
 737 "       BEQ     loc_FF876008 \n"                     
 738 "loc_FF876004:\n"
 739 "       MOV     R4, R8 \n"                           
 740 "loc_FF876008:\n"
 741 "       MOV     R0, #2 \n"                           
 742 "       BL      sub_FF890EE0 \n"                      
 743 "       CMP     R4, #0 \n"                           
 744 "       BNE     loc_FF876044 \n"                     
 745 "       LDR     R1, [R5, #0x64] \n"                  
 746 "       MOV     R7, #0 \n"                           
 747 "       MOV     R0, R9 \n"                           
 748 "       BLX     R1 \n"                               
 749 "       MOV     R6, R0 \n"                           
 750 "       B       loc_FF876044 \n"                       
 751 "loc_FF876030:\n"
 752 "       MOV     R6, #0x40 \n"                        
 753 "       B       loc_FF876044 \n"                       
 754 "loc_FF876038:\n"
 755 "       LDR     R1, =0x597 \n"                       
 756 "       LDR     R0, =0xFF876058 \n"                  
 757 "       BL      sub_FF81EB78 \n"                      
 758 "loc_FF876044:\n"
 759 "       STR     R7, [R5, #0x44]! \n"                 
 760 "       STMIB   R5, {R6,R8} \n"                    
 761 "       MOV     R0, #1 \n"                           
 762 "       LDMFD   SP!, {R4-R10,PC} \n"   
 763         );
 764 }
 765 
 766 
 767 /*----------------------------------------------------------------------
 768         JogDial_task_my()  0xFF865894
 769 
 770         Patched jog dial task
 771 -----------------------------------------------------------------------*/
 772 void __attribute__((naked,noinline)) JogDial_task_my()
 773 {
 774         asm volatile (
 775 "       STMFD   SP!, {R4-R11,LR} \n"               
 776 "       SUB     SP, SP, #0x24 \n"                    
 777 "       BL      sub_FF865C2C \n"                      
 778 "       LDR     R1, =0x25FC \n"                      
 779 "       LDR     R6, =0xFFBA5464 \n"                  
 780 "       MOV     R0, #0 \n"                           
 781 "       ADD     R3, SP, #0x18 \n"                    
 782 "       ADD     R12, SP, #0x1C \n"                   
 783 "       ADD     R10, SP, #8 \n"                      
 784 "       MOV     R2, #0 \n"                           
 785 "       ADD     R9, SP, #0x10 \n"                    
 786 "loc_FF8658C0:\n"
 787 "       ADD     R12, SP, #0x1C \n"                   
 788 "       ADD     LR, R12, R0, LSL #1 \n"              
 789 "       MOV     R2, #0 \n"                           
 790 "       ADD     R3, SP, #0x18 \n"                    
 791 "       STRH    R2, [LR] \n"                        
 792 "       ADD     LR, R3, R0, LSL #1 \n"               
 793 "       STRH    R2, [LR] \n"                        
 794 "       STR     R2, [R9, R0, LSL #2] \n"             
 795 "       STR     R2, [R10, R0, LSL #2] \n"            
 796 "       ADD     R0, R0, #1 \n"                       
 797 "       CMP     R0, #2 \n"                           
 798 "       BLT     loc_FF8658C0 \n"                     
 799 "loc_FF8658F0:\n"
 800 "       LDR     R0, =0x25FC \n"                      
 801 "       MOV     R2, #0 \n"                           
 802 "       LDR     R0, [R0, #8] \n"                     
 803 "       MOV     R1, SP \n"                           
 804 "       BL      sub_FF83A2F8 \n"                      
 805 "       CMP     R0, #0 \n"                           
 806 "       LDRNE   R1, =0x262 \n"                     
 807 "       LDRNE   R0, =0xFF865B50 \n"                
 808 "       BLNE    sub_FF81EB78 \n"                    
 809 //------------------  begin added code ---------------
 810 "labelA:\n"
 811                 "LDR     R0, =jogdial_stopped\n"
 812                 "LDR     R0, [R0]\n"
 813                 "CMP     R0, #1\n"
 814                 "BNE     labelB\n"                                      // continue on if jogdial_stopped = 0
 815                 "MOV     R0, #40\n"
 816                 "BL      _SleepTask\n"                          // jogdial_stopped=1 -- give time back to OS and suspend jogdial task
 817                 "B       labelA\n"
 818 "labelB:\n"
 819 //------------------  end added code -----------------
 820 "       LDR     R0, [SP] \n"                         
 821 "       AND     R4, R0, #0xFF \n"                    
 822 "       AND     R0, R0, #0xFF00 \n"                  
 823 "       CMP     R0, #0x100 \n"                       
 824 "       BEQ     loc_FF865960 \n"                     
 825 "       CMP     R0, #0x200 \n"                       
 826 "       BEQ     loc_FF865998 \n"                     
 827 "       CMP     R0, #0x300 \n"                       
 828 "       BEQ     loc_FF865B90 \n"                     
 829 "       CMP     R0, #0x400 \n"                       
 830 "       BNE     loc_FF8658F0 \n"                     
 831 "       CMP     R4, #0 \n"                           
 832 "       LDRNE   R1, =0x2ED \n"                     
 833 "       LDRNE   R0, =0xFF865B50 \n"                
 834 "       BLNE    sub_FF81EB78 \n"                    
 835 "       RSB     R0, R4, R4, LSL #3 \n"               
 836 "       LDR     R0, [R6, R0, LSL #2] \n"             
 837 "loc_FF865958:\n"
 838 "       BL      sub_FF865C10 \n"                      
 839 "       B       loc_FF8658F0 \n"                       
 840 "loc_FF865960:\n"
 841 "       LDR     R7, =0x260C \n"                      
 842 "       LDR     R0, [R7, R4, LSL #2] \n"             
 843 "       BL      sub_FF83B290 \n"                      
 844 "       LDR     R2, =0xFF8657E0 \n"                  
 845 "       ADD     R1, R2, #0 \n"                       
 846 "       ORR     R3, R4, #0x200 \n"                   
 847 "       MOV     R0, #0x28 \n"                        
 848 "       BL      sub_FF83B1AC \n"                      
 849 "       TST     R0, #1 \n"                           
 850 "       CMPNE   R0, #0x15 \n"                      
 851 "       STR     R0, [R10, R4, LSL #2] \n"            
 852 "       BEQ     loc_FF8658F0 \n"                     
 853 "       MOV     R1, #0x274 \n"                       
 854 "       B       loc_FF865B3C \n"                       
 855 "loc_FF865998:\n"
 856 "       RSB     R5, R4, R4, LSL #3 \n"               
 857 "       LDR     R0, [R6, R5, LSL #2] \n"             
 858 "       LDR     R1, =0xC0240104 \n"                  
 859 "       LDR     R0, [R1, R0, LSL #8] \n"             
 860 "       MOV     R2, R0, ASR #0x10 \n"                
 861 "       ADD     R0, SP, #0x1C \n"                    
 862 "       ADD     R0, R0, R4, LSL #1 \n"               
 863 "       STR     R0, [SP, #0x20] \n"                  
 864 "       STRH    R2, [R0] \n"                        
 865 "       ADD     R0, SP, #0x18 \n"                    
 866 "       ADD     R11, R0, R4, LSL #1 \n"              
 867 "       LDRSH   R3, [R11] \n"                      
 868 "       SUB     R0, R2, R3 \n"                       
 869 "       CMP     R0, #0 \n"                           
 870 "       BNE     loc_FF865A18 \n"                     
 871 "       LDR     R0, [R9, R4, LSL #2] \n"             
 872 "       CMP     R0, #0 \n"                           
 873 "       BEQ     loc_FF865AF8 \n"                     
 874 "       LDR     R7, =0x260C \n"                      
 875 "       LDR     R0, [R7, R4, LSL #2] \n"             
 876 "       BL      sub_FF83B290 \n"                      
 877 "       LDR     R2, =0xFF8657EC \n"                  
 878 "       ADD     R1, R2, #0 \n"                       
 879 "       ORR     R3, R4, #0x300 \n"                   
 880 "       MOV     R0, #0x1F4 \n"                       
 881 "       BL      sub_FF83B1AC \n"                      
 882 "       TST     R0, #1 \n"                           
 883 "       CMPNE   R0, #0x15 \n"                      
 884 "       STR     R0, [R7, R4, LSL #2] \n"             
 885 "       BEQ     loc_FF865AF8 \n"                     
 886 "       LDR     R1, =0x28D \n"                       
 887 "       B       loc_FF865AF0 \n"                       
 888 "loc_FF865A18:\n"
 889 "       MOV     R1, R0 \n"                           
 890 "       RSBLT   R0, R0, #0 \n"                     
 891 "       MOVLE   R7, #0 \n"                         
 892 "       MOVGT   R7, #1 \n"                         
 893 "       CMP     R0, #0xFF \n"                        
 894 "       BLS     loc_FF865A58 \n"                     
 895 "       CMP     R1, #0 \n"                           
 896 "       RSBLE   R0, R3, #0xFF \n"                  
 897 "       ADDLE   R0, R0, #0x7F00 \n"                
 898 "       ADDLE   R0, R0, R2 \n"                     
 899 "       RSBGT   R0, R2, #0xFF \n"                  
 900 "       ADDGT   R0, R0, #0x7F00 \n"                
 901 "       ADDGT   R0, R0, R3 \n"                     
 902 "       ADD     R0, R0, #0x8000 \n"                  
 903 "       ADD     R0, R0, #1 \n"                       
 904 "       EOR     R7, R7, #1 \n"                       
 905 "loc_FF865A58:\n"
 906 "       STR     R0, [SP, #4] \n"                     
 907 "       LDR     R0, [R9, R4, LSL #2] \n"             
 908 "       CMP     R0, #0 \n"                           
 909 "       ADDEQ   R0, R6, R5, LSL #2 \n"             
 910 "       LDREQ   R0, [R0, #8] \n"                   
 911 "       BEQ     loc_FF865A90 \n"                     
 912 "       ADD     R8, R6, R5, LSL #2 \n"               
 913 "       ADD     R1, R8, R7, LSL #2 \n"               
 914 "       LDR     R1, [R1, #0x10] \n"                  
 915 "       CMP     R1, R0 \n"                           
 916 "       BEQ     loc_FF865A94 \n"                     
 917 "       LDR     R0, [R8, #0xC] \n"                   
 918 "       BL      sub_FF89CCA4 \n"                      
 919 "       LDR     R0, [R8, #8] \n"                     
 920 "loc_FF865A90:\n"
 921 "       BL      sub_FF89CCA4 \n"                      
 922 "loc_FF865A94:\n"
 923 "       ADD     R0, R6, R5, LSL #2 \n"               
 924 "       ADD     R7, R0, R7, LSL #2 \n"               
 925 "       LDR     R0, [R7, #0x10] \n"                  
 926 "       LDR     R1, [SP, #4] \n"                     
 927 "       BL      sub_FF89CBCC \n"                      
 928 "       LDR     R0, [R7, #0x10] \n"                  
 929 "       LDR     R7, =0x260C \n"                      
 930 "       STR     R0, [R9, R4, LSL #2] \n"             
 931 "       LDR     R0, [SP, #0x20] \n"                  
 932 "       LDRH    R0, [R0] \n"                        
 933 "       STRH    R0, [R11] \n"                       
 934 "       LDR     R0, [R7, R4, LSL #2] \n"             
 935 "       BL      sub_FF83B290 \n"                      
 936 "       LDR     R2, =0xFF8657EC \n"                  
 937 "       ADD     R1, R2, #0 \n"                       
 938 "       ORR     R3, R4, #0x300 \n"                   
 939 "       MOV     R0, #0x1F4 \n"                       
 940 "       BL      sub_FF83B1AC \n"                      
 941 "       TST     R0, #1 \n"                           
 942 "       CMPNE   R0, #0x15 \n"                      
 943 "       STR     R0, [R7, R4, LSL #2] \n"             
 944 "       BEQ     loc_FF865AF8 \n"                     
 945 "       LDR     R1, =0x2CF \n"                       
 946 "loc_FF865AF0:\n"
 947 "       LDR     R0, =0xFF865B50 \n"                  
 948 "       BL      sub_FF81EB78 \n"                      
 949 "loc_FF865AF8:\n"
 950 "       ADD     R0, R6, R5, LSL #2 \n"               
 951 "       LDR     R0, [R0, #0x18] \n"                  
 952 "       CMP     R0, #1 \n"                           
 953 "       BNE     loc_FF865B88 \n"                     
 954 "       LDR     R0, =0x25FC \n"                      
 955 "       LDR     R0, [R0, #0xC] \n"                   
 956 "       CMP     R0, #0 \n"                           
 957 "       BEQ     loc_FF865B88 \n"                     
 958 "       LDR     R2, =0xFF8657E0 \n"                  
 959 "       ADD     R1, R2, #0 \n"                       
 960 "       ORR     R3, R4, #0x400 \n"                   
 961 "       BL      sub_FF83B1AC \n"                      
 962 "       TST     R0, #1 \n"                           
 963 "       CMPNE   R0, #0x15 \n"                      
 964 "       STR     R0, [R10, R4, LSL #2] \n"            
 965 "       BEQ     loc_FF8658F0 \n"                     
 966 "       LDR     R1, =0x2D6 \n"                       
 967 "loc_FF865B3C:\n"
 968 "       LDR     R0, =0xFF865B50 \n"                  
 969 "       BL      sub_FF81EB78 \n"                      
 970 "       B       loc_FF8658F0 \n"                       
 971 "       NOP \n"
 972 "loc_FF865B88:\n"
 973 "       LDR     R0, [R6, R5, LSL #2] \n"             
 974 "       B       loc_FF865958 \n"                       
 975 "loc_FF865B90:\n"
 976 "       LDR     R0, [R9, R4, LSL #2] \n"             
 977 "       CMP     R0, #0 \n"                           
 978 "       MOVEQ   R1, #0x2E0 \n"                     
 979 "       LDREQ   R0, =0xFF865B50 \n"                
 980 "       BLEQ    sub_FF81EB78 \n"                    
 981 "       RSB     R0, R4, R4, LSL #3 \n"               
 982 "       ADD     R0, R6, R0, LSL #2 \n"               
 983 "       LDR     R0, [R0, #0xC] \n"                   
 984 "       BL      sub_FF89CCA4 \n"                      
 985 "       MOV     R2, #0 \n"                           
 986 "       STR     R2, [R9, R4, LSL #2] \n"             
 987 "       B       loc_FF8658F0 \n" 
 988         );
 989 };

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