This source file includes following definitions.
- filewritetask
- sub_FFDFDA5C_my
- sub_FFDFDBA4_my
- sub_FFDFD60C_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6
7 typedef struct {
8 unsigned int address;
9 unsigned int length;
10 } cam_ptp_data_chunk;
11
12 #define MAX_CHUNKS_FOR_FWT 7
13
14
15
16
17
18
19
20
21
22 typedef struct
23 {
24 int unkn1[2];
25 int oflags;
26 int unkn2[2];
27 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
28 int unkn6;
29 char name[32];
30 } fwt_data_struct;
31
32 #define OFLAG_NOFLUSH 0x8000
33
34 #include "../../../generic/filewrite.c"
35
36
37
38 void __attribute__((naked,noinline)) filewritetask() {
39 asm volatile (
40 " STMFD SP!, {R1-R5,LR} \n"
41 " LDR R5, =0x8A90 \n"
42
43 "loc_FFDFD788:\n"
44 " MOV R2, #0 \n"
45 " LDR R0, [R5, #0x10] \n"
46 " ADD R1, SP, #8 \n"
47 " BL sub_FFC2905C /*_ReceiveMessageQueue*/ \n"
48 " CMP R0, #0 \n"
49 " LDRNE R1, =0x33F \n"
50 " LDRNE R0, =0xFFDFD874 /*'dwFWrite.c'*/ \n"
51 " BLNE _DebugAssert \n"
52 " LDR R0, [SP, #8] \n"
53 " LDR R1, [R0] \n"
54 " CMP R1, #0xA \n"
55 " ADDCC PC, PC, R1, LSL#2 \n"
56 " B loc_FFDFD788 \n"
57 " B loc_FFDFD854 \n"
58 " B loc_FFDFD854 \n"
59 " B loc_FFDFD854 \n"
60 " B loc_FFDFD854 \n"
61 " B loc_FFDFD854 \n"
62 " B loc_FFDFD854 \n"
63 " B loc_FFDFD854 \n"
64 " B loc_FFDFD85C \n"
65 " B loc_FFDFD7E4 \n"
66 " B loc_FFDFD84C \n"
67
68 "loc_FFDFD7E4:\n"
69 " MOV R0, #0 \n"
70 " MOV R4, R5 \n"
71 " STR R0, [SP] \n"
72
73 "loc_FFDFD7F0:\n"
74 " LDR R0, [R4, #0x10] \n"
75 " MOV R1, SP \n"
76 " BL sub_FFC292A0 /*_GetNumberOfPostedMessages*/ \n"
77 " LDR R0, [SP] \n"
78 " CMP R0, #0 \n"
79 " BEQ loc_FFDFD81C \n"
80 " LDR R0, [R4, #0x10] \n"
81 " MOV R2, #0 \n"
82 " ADD R1, SP, #4 \n"
83 " BL sub_FFC2905C /*_ReceiveMessageQueue*/ \n"
84 " B loc_FFDFD7F0 \n"
85
86 "loc_FFDFD81C:\n"
87 " LDR R0, [R4, #4] \n"
88 " CMN R0, #1 \n"
89 " BEQ loc_FFDFD840 \n"
90 " BL fwt_close \n"
91 " MVN R0, #0 \n"
92 " STR R0, [R4, #4] \n"
93 " LDR R0, =0xCEB94 \n"
94 " BL sub_FFC52F70 \n"
95 " BL sub_FFC5119C \n"
96
97 "loc_FFDFD840:\n"
98 " LDR R0, [R4, #0xC] \n"
99 " BL _GiveSemaphore \n"
100 " B loc_FFDFD788 \n"
101
102 "loc_FFDFD84C:\n"
103 " BL sub_FFDFDA5C_my \n"
104 " B loc_FFDFD788 \n"
105
106 "loc_FFDFD854:\n"
107 " BL sub_FFDFDBA4_my \n"
108 " B loc_FFDFD788 \n"
109
110 "loc_FFDFD85C:\n"
111 " BL sub_FFDFD60C_my \n"
112 " B loc_FFDFD788 \n"
113 );
114 }
115
116
117
118 void __attribute__((naked,noinline)) sub_FFDFDA5C_my() {
119 asm volatile (
120 " STMFD SP!, {R4-R8,LR} \n"
121 " MOV R4, R0 \n"
122 " SUB SP, SP, #0x38 \n"
123 " ADD R0, R0, #0x50 \n"
124 " BL sub_FFC52F70 \n"
125 " MOV R1, #0 \n"
126 " BL sub_FFC51134 \n"
127 " LDR R0, [R4, #0xC] \n"
128 " BL sub_FFC00340 \n"
129 " LDR R0, [R4, #0x4C] \n"
130 " LDR R8, =0x1B6 \n"
131 " CMP R0, #1 \n"
132 " LDREQ R0, [R4, #8] \n"
133 " ADD R6, R4, #0x50 \n"
134 " ORREQ R0, R0, #0x8000 \n"
135 " STREQ R0, [R4, #8] \n"
136
137 " MOV R0, R4\n"
138 " BL filewrite_main_hook\n"
139
140 " LDR R7, [R4, #8] \n"
141 " LDR R5, [R4, #0xC] \n"
142 " MOV R2, R8 \n"
143 " MOV R1, R7 \n"
144 " MOV R0, R6 \n"
145 " BL fwt_open \n"
146 " LDR PC, =0xFFDFDAB4 \n"
147 );
148 }
149
150
151
152 void __attribute__((naked,noinline)) sub_FFDFDBA4_my() {
153 asm volatile (
154 " STMFD SP!, {R4-R10,LR} \n"
155 " MOV R5, R0 \n"
156 " LDR R0, [R0] \n"
157 " CMP R0, #6 \n"
158 " BHI loc_FFDFDBD0 \n"
159 " ADD R0, R5, R0, LSL#3 \n"
160 " LDR R8, [R0, #0x14]! \n"
161 " LDR R7, [R0, #4] \n"
162 " CMP R7, #0 \n"
163 " BNE loc_FFDFDBE8 \n"
164 " B loc_FFDFDBDC \n"
165
166 "loc_FFDFDBD0:\n"
167 " LDR R1, =0x299 \n"
168 " LDR R0, =0xFFDFD874 /*'dwFWrite.c'*/ \n"
169 " BL _DebugAssert \n"
170
171 "loc_FFDFDBDC:\n"
172 " MOV R1, R5 \n"
173 " MOV R0, #7 \n"
174 " B loc_FFDFDC7C \n"
175
176 "loc_FFDFDBE8:\n"
177 " LDR R9, =0x8A90 \n"
178 " MOV R4, R7 \n"
179
180 "loc_FFDFDBF0:\n"
181 " LDR R0, [R5, #4] \n"
182 " CMP R4, #0x1000000 \n"
183 " MOVLS R6, R4 \n"
184 " MOVHI R6, #0x1000000 \n"
185 " BIC R1, R0, #0xFF000000 \n"
186 " CMP R1, #0 \n"
187 " BICNE R0, R0, #0xFF000000 \n"
188 " RSBNE R0, R0, #0x1000000 \n"
189 " CMPNE R6, R0 \n"
190 " MOVHI R6, R0 \n"
191 " LDR R0, [R9, #4] \n"
192 " MOV R2, R6 \n"
193 " MOV R1, R8 \n"
194 " BL fwt_write \n"
195 " LDR R1, [R5, #4] \n"
196 " CMP R6, R0 \n"
197 " ADD R1, R1, R0 \n"
198 " STR R1, [R5, #4] \n"
199 " BEQ loc_FFDFDC50 \n"
200 " CMN R0, #1 \n"
201 " LDRNE R0, =0x9200015 \n"
202 " LDREQ R0, =0x9200005 \n"
203 " STR R0, [R5, #0x10] \n"
204 " B loc_FFDFDBDC \n"
205
206 "loc_FFDFDC50:\n"
207 " SUB R4, R4, R0 \n"
208 " CMP R4, R7 \n"
209 " ADD R8, R8, R0 \n"
210 " MOVCS R1, #0x2C4 \n"
211 " LDRCS R0, =0xFFDFD874 /*'dwFWrite.c'*/ \n"
212 " BLCS _DebugAssert \n"
213 " CMP R4, #0 \n"
214 " BNE loc_FFDFDBF0 \n"
215 " LDR R0, [R5] \n"
216 " MOV R1, R5 \n"
217 " ADD R0, R0, #1 \n"
218
219 "loc_FFDFDC7C:\n"
220 " LDMFD SP!, {R4-R10,LR} \n"
221 " B sub_FFDFD55C \n"
222 );
223 }
224
225
226
227 void __attribute__((naked,noinline)) sub_FFDFD60C_my() {
228 asm volatile (
229 " STMFD SP!, {R4-R6,LR} \n"
230 " LDR R5, =0x8A90 \n"
231 " MOV R4, R0 \n"
232 " LDR R0, [R5, #4] \n"
233 " SUB SP, SP, #0x38 \n"
234 " CMN R0, #1 \n"
235 " BEQ sub_FFDFD654 \n"
236 " LDR R1, [R4, #8] \n"
237 " LDR R6, =0x9200003 \n"
238 " TST R1, #0x8000 \n"
239 " BEQ loc_FFDFD640 \n"
240
241 " LDR R3, =current_write_ignored\n"
242 " LDR R3, [R3]\n"
243 " CMP R3, #0\n"
244 " BNE loc_D\n"
245
246 " BL sub_FFC26410 \n"
247 " B sub_FFDFD644 \n"
248
249 "loc_FFDFD640:\n"
250 "loc_D:\n"
251 " BL fwt_close \n"
252 " LDR PC, =0xFFDFD644 \n"
253 );
254 }