This source file includes following definitions.
- capt_seq_task
- exp_drv_task
- sub_FFC95088_my
- sub_FFC86234_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9 #define NR_AUTO (0)
10 #define PAUSE_FOR_FILE_COUNTER 150
11
12 #include "../../../generic/capt_seq.c"
13
14
15
16 void __attribute__((naked,noinline)) capt_seq_task() {
17 asm volatile (
18 " STMFD SP!, {R3-R7,LR} \n"
19 " LDR R5, =0x33D88 \n"
20 " LDR R6, =0x2710 \n"
21
22 "loc_FFC5B078:\n"
23 " MOV R2, #0 \n"
24 " LDR R0, [R6, #4] \n"
25 " MOV R1, SP \n"
26 " BL sub_FFC2905C /*_ReceiveMessageQueue*/ \n"
27 " TST R0, #1 \n"
28 " BEQ loc_FFC5B0A4 \n"
29 " LDR R1, =0x476 \n"
30 " LDR R0, =0xFFC5AC5C /*'SsShootTask.c'*/ \n"
31 " BL _DebugAssert \n"
32 " BL _ExitTask \n"
33 " LDMFD SP!, {R3-R7,PC} \n"
34
35 "loc_FFC5B0A4:\n"
36 " LDR R0, [SP] \n"
37 " LDR R1, [R0] \n"
38 " CMP R1, #0x1E \n"
39 " ADDCC PC, PC, R1, LSL#2 \n"
40 " B loc_FFC5B27C \n"
41 " B loc_FFC5B130 \n"
42 " B loc_FFC5B138 \n"
43 " B loc_FFC5B164 \n"
44 " B loc_FFC5B178 \n"
45 " B loc_FFC5B170 \n"
46 " B loc_FFC5B180 \n"
47 " B loc_FFC5B188 \n"
48 " B loc_FFC5B194 \n"
49 " B loc_FFC5B1B0 \n"
50 " B loc_FFC5B178 \n"
51 " B loc_FFC5B1B8 \n"
52 " B loc_FFC5B1C4 \n"
53 " B loc_FFC5B1CC \n"
54 " B loc_FFC5B1D4 \n"
55 " B loc_FFC5B1DC \n"
56 " B loc_FFC5B1E4 \n"
57 " B loc_FFC5B1EC \n"
58 " B loc_FFC5B1F4 \n"
59 " B loc_FFC5B200 \n"
60 " B loc_FFC5B208 \n"
61 " B loc_FFC5B210 \n"
62 " B loc_FFC5B218 \n"
63 " B loc_FFC5B220 \n"
64 " B loc_FFC5B22C \n"
65 " B loc_FFC5B234 \n"
66 " B loc_FFC5B23C \n"
67 " B loc_FFC5B244 \n"
68 " B loc_FFC5B24C \n"
69 " B loc_FFC5B258 \n"
70 " B loc_FFC5B288 \n"
71
72 "loc_FFC5B130:\n"
73 " BL sub_FFC5B7BC \n"
74 " BL shooting_expo_param_override\n"
75 " B loc_FFC5B18C \n"
76
77 "loc_FFC5B138:\n"
78 " BL wait_until_remote_button_is_released\n"
79 " BL capt_seq_hook_set_nr\n"
80 " LDR R7, [R0, #0xC] \n"
81 " MOV R0, R7 \n"
82 " BL sub_FFD1CA20 \n"
83 " BL capt_seq_hook_raw_here\n"
84 " MOV R4, R0 \n"
85 " MOV R2, R7 \n"
86 " MOV R1, #1 \n"
87 " BL sub_FFC59678 \n"
88 " TST R4, #1 \n"
89 " MOVEQ R0, R7 \n"
90 " BLEQ sub_FFD1C558 \n"
91 " B loc_FFC5B288 \n"
92
93 "loc_FFC5B164:\n"
94 " MOV R0, #1 \n"
95 " BL sub_FFC5BA38 \n"
96 " B loc_FFC5B288 \n"
97
98 "loc_FFC5B170:\n"
99 " BL sub_FFC5B494 \n"
100 " B loc_FFC5B288 \n"
101
102 "loc_FFC5B178:\n"
103 " BL sub_FFC5B79C \n"
104 " B loc_FFC5B288 \n"
105
106 "loc_FFC5B180:\n"
107 " BL sub_FFC5B7A4 \n"
108 " B loc_FFC5B288 \n"
109
110 "loc_FFC5B188:\n"
111 " BL sub_FFC5B94C \n"
112
113 "loc_FFC5B18C:\n"
114 " BL sub_FFC591B0 \n"
115 " B loc_FFC5B288 \n"
116
117 "loc_FFC5B194:\n"
118 " LDR R4, [R0, #0xC] \n"
119 " MOV R0, R4 \n"
120 " BL sub_FFD1CAC8 \n"
121 " MOV R2, R4 \n"
122 " MOV R1, #9 \n"
123 " BL sub_FFC59678 \n"
124 " B loc_FFC5B288 \n"
125
126 "loc_FFC5B1B0:\n"
127 " BL sub_FFC5B9B0 \n"
128 " B loc_FFC5B18C \n"
129
130 "loc_FFC5B1B8:\n"
131 " LDR R0, [R5, #0x50] \n"
132 " BL sub_FFC5BE4C \n"
133 " B loc_FFC5B288 \n"
134
135 "loc_FFC5B1C4:\n"
136 " BL sub_FFC5C194 \n"
137 " B loc_FFC5B288 \n"
138
139 "loc_FFC5B1CC:\n"
140 " BL sub_FFC5C1F8 \n"
141 " B loc_FFC5B288 \n"
142
143 "loc_FFC5B1D4:\n"
144 " BL sub_FFD1BAEC \n"
145 " B loc_FFC5B288 \n"
146
147 "loc_FFC5B1DC:\n"
148 " BL sub_FFD1BCD8 \n"
149 " B loc_FFC5B288 \n"
150
151 "loc_FFC5B1E4:\n"
152 " BL sub_FFD1BD78 \n"
153 " B loc_FFC5B288 \n"
154
155 "loc_FFC5B1EC:\n"
156 " BL sub_FFD1BE38 \n"
157 " B loc_FFC5B288 \n"
158
159 "loc_FFC5B1F4:\n"
160 " MOV R0, #0 \n"
161 " BL sub_FFD1C030 \n"
162 " B loc_FFC5B288 \n"
163
164 "loc_FFC5B200:\n"
165 " BL sub_FFD1C19C \n"
166 " B loc_FFC5B288 \n"
167
168 "loc_FFC5B208:\n"
169 " BL sub_FFD1C240 \n"
170 " B loc_FFC5B288 \n"
171
172 "loc_FFC5B210:\n"
173 " BL sub_FFD1C320 \n"
174 " B loc_FFC5B288 \n"
175
176 "loc_FFC5B218:\n"
177 " BL sub_FFC5BBA0 \n"
178 " B loc_FFC5B288 \n"
179
180 "loc_FFC5B220:\n"
181 " BL sub_FFC5BBCC \n"
182 " BL sub_FFC270EC \n"
183 " B loc_FFC5B288 \n"
184
185 "loc_FFC5B22C:\n"
186 " BL sub_FFD1BEFC \n"
187 " B loc_FFC5B288 \n"
188
189 "loc_FFC5B234:\n"
190 " BL sub_FFD1BF3C \n"
191 " B loc_FFC5B288 \n"
192
193 "loc_FFC5B23C:\n"
194 " BL sub_FFC5DFDC \n"
195 " B loc_FFC5B288 \n"
196
197 "loc_FFC5B244:\n"
198 " BL sub_FFC5E048 \n"
199 " B loc_FFC5B288 \n"
200
201 "loc_FFC5B24C:\n"
202 " BL sub_FFC5E0A4 \n"
203 " BL sub_FFC5E064 \n"
204 " B loc_FFC5B288 \n"
205
206 "loc_FFC5B258:\n"
207 " LDRH R0, [R5, #0x90] \n"
208 " CMP R0, #4 \n"
209 " LDRNEH R0, [R5] \n"
210 " SUBNE R1, R0, #0x8200 \n"
211 " SUBNES R1, R1, #0x2A \n"
212 " BNE loc_FFC5B288 \n"
213 " BL sub_FFC5E048 \n"
214 " BL sub_FFC5E3D8 \n"
215 " B loc_FFC5B288 \n"
216
217 "loc_FFC5B27C:\n"
218 " LDR R1, =0x5D7 \n"
219 " LDR R0, =0xFFC5AC5C /*'SsShootTask.c'*/ \n"
220 " BL _DebugAssert \n"
221
222 "loc_FFC5B288:\n"
223 " LDR R0, [SP] \n"
224 " LDR R1, [R0, #4] \n"
225 " LDR R0, [R6] \n"
226 " BL sub_FFC28DCC /*_SetEventFlag*/ \n"
227 " LDR R4, [SP] \n"
228 " LDR R0, [R4, #8] \n"
229 " CMP R0, #0 \n"
230 " LDREQ R0, =0xFFC5AC5C /*'SsShootTask.c'*/ \n"
231 " MOVEQ R1, #0x118 \n"
232 " BLEQ _DebugAssert \n"
233 " MOV R0, #0 \n"
234 " STR R0, [R4, #8] \n"
235 " B loc_FFC5B078 \n"
236 );
237 }
238
239
240
241 void __attribute__((naked,noinline)) exp_drv_task() {
242 asm volatile (
243 " STMFD SP!, {R4-R9,LR} \n"
244 " SUB SP, SP, #0x24 \n"
245 " LDR R6, =0x39B4 \n"
246 " LDR R7, =0xBB8 \n"
247 " LDR R4, =0x4F250 \n"
248 " MOV R0, #0 \n"
249 " ADD R5, SP, #0x14 \n"
250 " STR R0, [SP, #0x10] \n"
251
252 "loc_FFC981B0:\n"
253 " LDR R0, [R6, #0x20] \n"
254 " MOV R2, #0 \n"
255 " ADD R1, SP, #0x20 \n"
256 " BL sub_FFC2905C /*_ReceiveMessageQueue*/ \n"
257 " LDR R0, [SP, #0x10] \n"
258 " CMP R0, #1 \n"
259 " BNE loc_FFC981FC \n"
260 " LDR R0, [SP, #0x20] \n"
261 " LDR R0, [R0] \n"
262 " CMP R0, #0x14 \n"
263 " CMPNE R0, #0x15 \n"
264 " CMPNE R0, #0x16 \n"
265 " CMPNE R0, #0x17 \n"
266 " BEQ loc_FFC9835C \n"
267 " CMP R0, #0x29 \n"
268 " BEQ loc_FFC982E4 \n"
269 " ADD R1, SP, #0x10 \n"
270 " MOV R0, #0 \n"
271 " BL sub_FFC98140 \n"
272
273 "loc_FFC981FC:\n"
274 " LDR R0, [SP, #0x20] \n"
275 " LDR R1, [R0] \n"
276 " CMP R1, #0x2F \n"
277 " BNE loc_FFC98228 \n"
278 " BL sub_FFC9963C \n"
279 " LDR R0, [R6, #0x1C] \n"
280 " MOV R1, #1 \n"
281 " BL sub_FFC28DCC /*_SetEventFlag*/ \n"
282 " BL _ExitTask \n"
283 " ADD SP, SP, #0x24 \n"
284 " LDMFD SP!, {R4-R9,PC} \n"
285
286 "loc_FFC98228:\n"
287 " CMP R1, #0x2E \n"
288 " BNE loc_FFC98244 \n"
289 " LDR R2, [R0, #0x8C]! \n"
290 " LDR R1, [R0, #4] \n"
291 " MOV R0, R1 \n"
292 " BLX R2 \n"
293 " B loc_FFC98858 \n"
294
295 "loc_FFC98244:\n"
296 " CMP R1, #0x27 \n"
297 " BNE loc_FFC98294 \n"
298 " LDR R0, [R6, #0x1C] \n"
299 " MOV R1, #0x80 \n"
300 " BL sub_FFC28E00 /*_ClearEventFlag*/ \n"
301 " LDR R0, =0xFFC93DA8 \n"
302 " MOV R1, #0x80 \n"
303 " BL sub_FFD13BC8 \n"
304 " LDR R0, [R6, #0x1C] \n"
305 " MOV R2, R7 \n"
306 " MOV R1, #0x80 \n"
307 " BL sub_FFC28D0C /*_WaitForAllEventFlag*/ \n"
308 " TST R0, #1 \n"
309 " LDRNE R1, =0x1708 \n"
310 " BNE loc_FFC98350 \n"
311
312 "loc_FFC98280:\n"
313 " LDR R1, [SP, #0x20] \n"
314 " LDR R0, [R1, #0x90] \n"
315 " LDR R1, [R1, #0x8C] \n"
316 " BLX R1 \n"
317 " B loc_FFC98858 \n"
318
319 "loc_FFC98294:\n"
320 " CMP R1, #0x28 \n"
321 " BNE loc_FFC982DC \n"
322 " ADD R1, SP, #0x10 \n"
323 " BL sub_FFC98140 \n"
324 " LDR R0, [R6, #0x1C] \n"
325 " MOV R1, #0x100 \n"
326 " BL sub_FFC28E00 /*_ClearEventFlag*/ \n"
327 " LDR R0, =0xFFC93DB8 \n"
328 " MOV R1, #0x100 \n"
329 " BL sub_FFD13E58 \n"
330 " LDR R0, [R6, #0x1C] \n"
331 " MOV R2, R7 \n"
332 " MOV R1, #0x100 \n"
333 " BL sub_FFC28D0C /*_WaitForAllEventFlag*/ \n"
334 " TST R0, #1 \n"
335 " BEQ loc_FFC98280 \n"
336 " LDR R1, =0x1712 \n"
337 " B loc_FFC98350 \n"
338
339 "loc_FFC982DC:\n"
340 " CMP R1, #0x29 \n"
341 " BNE loc_FFC982F4 \n"
342
343 "loc_FFC982E4:\n"
344 " LDR R0, [SP, #0x20] \n"
345 " ADD R1, SP, #0x10 \n"
346 " BL sub_FFC98140 \n"
347 " B loc_FFC98280 \n"
348
349 "loc_FFC982F4:\n"
350 " CMP R1, #0x2C \n"
351 " BNE loc_FFC9830C \n"
352 " BL sub_FFC864C4 \n"
353 " BL sub_FFC87150 \n"
354 " BL sub_FFC86CC8 \n"
355 " B loc_FFC98280 \n"
356
357 "loc_FFC9830C:\n"
358 " CMP R1, #0x2D \n"
359 " BNE loc_FFC9835C \n"
360 " LDR R0, [R6, #0x1C] \n"
361 " MOV R1, #4 \n"
362 " BL sub_FFC28E00 /*_ClearEventFlag*/ \n"
363 " LDR R1, =0xFFC93DD8 \n"
364 " LDR R0, =0xFFFFF400 \n"
365 " MOV R2, #4 \n"
366 " BL sub_FFC85F38 \n"
367 " BL sub_FFC861C8 \n"
368 " LDR R0, [R6, #0x1C] \n"
369 " MOV R2, R7 \n"
370 " MOV R1, #4 \n"
371 " BL sub_FFC28C28 /*_WaitForAnyEventFlag*/ \n"
372 " TST R0, #1 \n"
373 " BEQ loc_FFC98280 \n"
374 " LDR R1, =0x173A \n"
375
376 "loc_FFC98350:\n"
377 " LDR R0, =0xFFC944CC /*'ExpDrv.c'*/ \n"
378 " BL _DebugAssert \n"
379 " B loc_FFC98280 \n"
380
381 "loc_FFC9835C:\n"
382 " LDR R0, [SP, #0x20] \n"
383 " MOV R8, #1 \n"
384 " LDR R1, [R0] \n"
385 " CMP R1, #0x12 \n"
386 " CMPNE R1, #0x13 \n"
387 " BNE loc_FFC98430 \n"
388 " LDR R1, [R0, #0x7C] \n"
389 " ADD R1, R1, R1, LSL#1 \n"
390 " ADD R1, R0, R1, LSL#2 \n"
391 " SUB R1, R1, #8 \n"
392 " LDMIA R1, {R2,R3,R9} \n"
393 " STMIA R5, {R2,R3,R9} \n"
394 " BL sub_FFC967A4 \n"
395 " LDR R0, [SP, #0x20] \n"
396 " LDR R1, [R0, #0x7C] \n"
397 " LDR R3, [R0, #0x8C] \n"
398 " LDR R2, [R0, #0x90] \n"
399 " ADD R0, R0, #4 \n"
400 " BLX R3 \n"
401 " LDR R0, [SP, #0x20] \n"
402 " BL sub_FFC999D8 \n"
403 " LDR R0, [SP, #0x20] \n"
404 " LDR R1, [R0, #0x7C] \n"
405 " LDR R2, [R0, #0x98] \n"
406 " LDR R3, [R0, #0x94] \n"
407 " B loc_FFC98744 \n"
408
409
410
411
412
413
414
415 "loc_FFC98430:\n"
416 " CMP R1, #0x14 \n"
417 " CMPNE R1, #0x15 \n"
418 " CMPNE R1, #0x16 \n"
419 " CMPNE R1, #0x17 \n"
420 " BNE loc_FFC984E8 \n"
421 " ADD R3, SP, #0x10 \n"
422 " ADD R2, SP, #4 \n"
423 " ADD R1, SP, #0x14 \n"
424 " BL sub_FFC96A0C \n"
425 " CMP R0, #1 \n"
426 " MOV R9, R0 \n"
427 " CMPNE R9, #5 \n"
428 " BNE loc_FFC98484 \n"
429 " LDR R0, [SP, #0x20] \n"
430 " MOV R2, R9 \n"
431 " LDR R1, [R0, #0x7C]! \n"
432 " LDR R12, [R0, #0x10]! \n"
433 " LDR R3, [R0, #4] \n"
434 " ADD R0, SP, #4 \n"
435 " BLX R12 \n"
436 " B loc_FFC984BC \n"
437
438 "loc_FFC98484:\n"
439 " LDR R0, [SP, #0x20] \n"
440 " CMP R9, #2 \n"
441 " LDR R3, [R0, #0x90] \n"
442 " CMPNE R9, #6 \n"
443 " BNE loc_FFC984D0 \n"
444 " LDR R12, [R0, #0x8C] \n"
445 " MOV R2, R9 \n"
446 " MOV R1, #1 \n"
447 " ADD R0, SP, #4 \n"
448 " BLX R12 \n"
449 " LDR R0, [SP, #0x20] \n"
450 " ADD R2, SP, #4 \n"
451 " ADD R1, SP, #0x14 \n"
452 " BL sub_FFC97E8C \n"
453
454 "loc_FFC984BC:\n"
455 " LDR R0, [SP, #0x20] \n"
456 " LDR R2, [SP, #0x10] \n"
457 " MOV R1, R9 \n"
458 " BL sub_FFC980E0 \n"
459 " B loc_FFC9874C \n"
460
461 "loc_FFC984D0:\n"
462 " LDR R1, [R0, #0x7C] \n"
463 " LDR R12, [R0, #0x8C] \n"
464 " MOV R2, R9 \n"
465 " ADD R0, R0, #4 \n"
466 " BLX R12 \n"
467 " B loc_FFC9874C \n"
468
469 "loc_FFC984E8:\n"
470 " CMP R1, #0x23 \n"
471 " CMPNE R1, #0x24 \n"
472 " BNE loc_FFC98534 \n"
473 " LDR R1, [R0, #0x7C] \n"
474 " ADD R1, R1, R1, LSL#1 \n"
475 " ADD R1, R0, R1, LSL#2 \n"
476 " SUB R1, R1, #8 \n"
477 " LDMIA R1, {R2,R3,R9} \n"
478 " STMIA R5, {R2,R3,R9} \n"
479 " BL sub_FFC95818 \n"
480 " LDR R0, [SP, #0x20] \n"
481 " LDR R1, [R0, #0x7C] \n"
482 " LDR R3, [R0, #0x8C] \n"
483 " LDR R2, [R0, #0x90] \n"
484 " ADD R0, R0, #4 \n"
485 " BLX R3 \n"
486 " LDR R0, [SP, #0x20] \n"
487 " BL sub_FFC95C54 \n"
488 " B loc_FFC9874C \n"
489
490 "loc_FFC98534:\n"
491 " ADD R1, R0, #4 \n"
492 " LDMIA R1, {R2,R3,R9} \n"
493 " STMIA R5, {R2,R3,R9} \n"
494 " LDR R1, [R0] \n"
495 " CMP R1, #0x27 \n"
496 " ADDCC PC, PC, R1, LSL#2 \n"
497 " B loc_FFC98734 \n"
498 " B loc_FFC985EC \n"
499 " B loc_FFC985EC \n"
500 " B loc_FFC985F4 \n"
501 " B loc_FFC985FC \n"
502 " B loc_FFC985FC \n"
503 " B loc_FFC985FC \n"
504 " B loc_FFC985EC \n"
505 " B loc_FFC985F4 \n"
506 " B loc_FFC985FC \n"
507 " B loc_FFC985FC \n"
508 " B loc_FFC98614 \n"
509 " B loc_FFC98614 \n"
510 " B loc_FFC98720 \n"
511 " B loc_FFC98728 \n"
512 " B loc_FFC98728 \n"
513 " B loc_FFC98728 \n"
514 " B loc_FFC98728 \n"
515 " B loc_FFC98730 \n"
516 " B loc_FFC98734 \n"
517 " B loc_FFC98734 \n"
518 " B loc_FFC98734 \n"
519 " B loc_FFC98734 \n"
520 " B loc_FFC98734 \n"
521 " B loc_FFC98734 \n"
522 " B loc_FFC98604 \n"
523 " B loc_FFC9860C \n"
524 " B loc_FFC9860C \n"
525 " B loc_FFC98620 \n"
526 " B loc_FFC98620 \n"
527 " B loc_FFC98628 \n"
528 " B loc_FFC98660 \n"
529 " B loc_FFC98698 \n"
530 " B loc_FFC986D0 \n"
531 " B loc_FFC98708 \n"
532 " B loc_FFC98708 \n"
533 " B loc_FFC98734 \n"
534 " B loc_FFC98734 \n"
535 " B loc_FFC98710 \n"
536 " B loc_FFC98718 \n"
537
538 "loc_FFC985EC:\n"
539 " BL sub_FFC94350 \n"
540 " B loc_FFC98734 \n"
541
542 "loc_FFC985F4:\n"
543 " BL sub_FFC945F0 \n"
544 " B loc_FFC98734 \n"
545
546 "loc_FFC985FC:\n"
547 " BL sub_FFC94818 \n"
548 " B loc_FFC98734 \n"
549
550 "loc_FFC98604:\n"
551 " BL sub_FFC94AF0 \n"
552 " B loc_FFC98734 \n"
553
554 "loc_FFC9860C:\n"
555 " BL sub_FFC94D08 \n"
556 " B loc_FFC98734 \n"
557
558 "loc_FFC98614:\n"
559 " BL sub_FFC95088_my \n"
560 " MOV R8, #0 \n"
561 " B loc_FFC98734 \n"
562
563 "loc_FFC98620:\n"
564 " BL sub_FFC951D0 \n"
565 " B loc_FFC98734 \n"
566
567 "loc_FFC98628:\n"
568 " LDRH R1, [R0, #4] \n"
569 " STRH R1, [SP, #0x14] \n"
570 " LDRH R1, [R4, #2] \n"
571 " STRH R1, [SP, #0x16] \n"
572 " LDRH R1, [R4, #4] \n"
573 " STRH R1, [SP, #0x18] \n"
574 " LDRH R1, [R4, #6] \n"
575 " STRH R1, [SP, #0x1A] \n"
576 " LDRH R1, [R0, #0xC] \n"
577 " STRH R1, [SP, #0x1C] \n"
578 " LDRH R1, [R4, #0xA] \n"
579 " STRH R1, [SP, #0x1E] \n"
580 " BL sub_FFC996D0 \n"
581 " B loc_FFC98734 \n"
582
583 "loc_FFC98660:\n"
584 " LDRH R1, [R0, #4] \n"
585 " STRH R1, [SP, #0x14] \n"
586 " LDRH R1, [R4, #2] \n"
587 " STRH R1, [SP, #0x16] \n"
588 " LDRH R1, [R4, #4] \n"
589 " STRH R1, [SP, #0x18] \n"
590 " LDRH R1, [R4, #6] \n"
591 " STRH R1, [SP, #0x1A] \n"
592 " LDRH R1, [R4, #8] \n"
593 " STRH R1, [SP, #0x1C] \n"
594 " LDRH R1, [R4, #0xA] \n"
595 " STRH R1, [SP, #0x1E] \n"
596 " BL sub_FFC997D8 \n"
597 " B loc_FFC98734 \n"
598
599 "loc_FFC98698:\n"
600 " LDRH R1, [R4] \n"
601 " STRH R1, [SP, #0x14] \n"
602 " LDRH R1, [R0, #6] \n"
603 " STRH R1, [SP, #0x16] \n"
604 " LDRH R1, [R4, #4] \n"
605 " STRH R1, [SP, #0x18] \n"
606 " LDRH R1, [R4, #6] \n"
607 " STRH R1, [SP, #0x1A] \n"
608 " LDRH R1, [R4, #8] \n"
609 " STRH R1, [SP, #0x1C] \n"
610 " LDRH R1, [R4, #0xA] \n"
611 " STRH R1, [SP, #0x1E] \n"
612 " BL sub_FFC9988C \n"
613 " B loc_FFC98734 \n"
614
615 "loc_FFC986D0:\n"
616 " LDRH R1, [R4] \n"
617 " STRH R1, [SP, #0x14] \n"
618 " LDRH R1, [R4, #2] \n"
619 " STRH R1, [SP, #0x16] \n"
620 " LDRH R1, [R4, #4] \n"
621 " STRH R1, [SP, #0x18] \n"
622 " LDRH R1, [R4, #6] \n"
623 " STRH R1, [SP, #0x1A] \n"
624 " LDRH R1, [R0, #0xC] \n"
625 " STRH R1, [SP, #0x1C] \n"
626 " LDRH R1, [R4, #0xA] \n"
627 " STRH R1, [SP, #0x1E] \n"
628 " BL sub_FFC99934 \n"
629 " B loc_FFC98734 \n"
630
631 "loc_FFC98708:\n"
632 " BL sub_FFC9560C \n"
633 " B loc_FFC98734 \n"
634
635 "loc_FFC98710:\n"
636 " BL sub_FFC95D58 \n"
637 " B loc_FFC98734 \n"
638
639 "loc_FFC98718:\n"
640 " BL sub_FFC96000 \n"
641 " B loc_FFC98734 \n"
642
643 "loc_FFC98720:\n"
644 " BL sub_FFC961E0 \n"
645 " B loc_FFC98734 \n"
646
647 "loc_FFC98728:\n"
648 " BL sub_FFC9642C \n"
649 " B loc_FFC98734 \n"
650
651 "loc_FFC98730:\n"
652 " BL sub_FFC9659C \n"
653
654 "loc_FFC98734:\n"
655 " LDR R0, [SP, #0x20] \n"
656 " LDR R1, [R0, #0x7C] \n"
657 " LDR R2, [R0, #0x90] \n"
658 " LDR R3, [R0, #0x8C] \n"
659
660 "loc_FFC98744:\n"
661 " ADD R0, R0, #4 \n"
662 " BLX R3 \n"
663
664 "loc_FFC9874C:\n"
665 " LDR R1, [SP, #0x20] \n"
666 " LDR R0, [R1] \n"
667 " CMP R0, #0x10 \n"
668 " BEQ loc_FFC98784 \n"
669 " BGT loc_FFC98774 \n"
670 " CMP R0, #1 \n"
671 " CMPNE R0, #4 \n"
672 " CMPNE R0, #0xE \n"
673 " BNE loc_FFC98794 \n"
674 " B loc_FFC98784 \n"
675
676 "loc_FFC98774:\n"
677 " CMP R0, #0x13 \n"
678 " CMPNE R0, #0x17 \n"
679 " CMPNE R0, #0x1A \n"
680 " BNE loc_FFC98794 \n"
681
682 "loc_FFC98784:\n"
683 " LDRH R0, [R4] \n"
684 " STRH R0, [SP, #0x14] \n"
685 " LDRH R0, [R4, #8] \n"
686 " STRH R0, [SP, #0x1C] \n"
687
688 "loc_FFC98794:\n"
689 " CMP R8, #1 \n"
690 " BNE loc_FFC987E0 \n"
691 " LDR R0, [R1, #0x7C] \n"
692 " MOV R2, #0xC \n"
693 " ADD R0, R0, R0, LSL#1 \n"
694 " ADD R0, R1, R0, LSL#2 \n"
695 " SUB R8, R0, #8 \n"
696 " LDR R0, =0x4F250 \n"
697 " ADD R1, SP, #0x14 \n"
698 " BL sub_FFE99878 \n"
699 " LDR R0, =0x4F25C \n"
700 " MOV R2, #0xC \n"
701 " ADD R1, SP, #0x14 \n"
702 " BL sub_FFE99878 \n"
703 " LDR R0, =0x4F268 \n"
704 " MOV R2, #0xC \n"
705 " MOV R1, R8 \n"
706 " BL sub_FFE99878 \n"
707 " B loc_FFC98858 \n"
708
709 "loc_FFC987E0:\n"
710 " LDR R0, [R1] \n"
711 " MOV R3, #1 \n"
712 " CMP R0, #0xB \n"
713 " BNE loc_FFC98824 \n"
714 " MOV R2, #0 \n"
715 " STRD R2, [SP] \n"
716 " MOV R2, R3 \n"
717 " MOV R1, R3 \n"
718 " MOV R0, #0 \n"
719 " BL sub_FFC94130 \n"
720 " MOV R3, #1 \n"
721 " MOV R2, #0 \n"
722 " STRD R2, [SP] \n"
723 " MOV R2, R3 \n"
724 " MOV R1, R3 \n"
725 " MOV R0, #0 \n"
726 " B loc_FFC98854 \n"
727
728 "loc_FFC98824:\n"
729 " MOV R2, #1 \n"
730 " STRD R2, [SP] \n"
731 " MOV R3, R2 \n"
732 " MOV R1, R2 \n"
733 " MOV R0, R2 \n"
734 " BL sub_FFC94130 \n"
735 " MOV R3, #1 \n"
736 " MOV R2, R3 \n"
737 " MOV R1, R3 \n"
738 " MOV R0, R3 \n"
739 " STR R3, [SP] \n"
740 " STR R3, [SP, #4] \n"
741
742 "loc_FFC98854:\n"
743 " BL sub_FFC9429C \n"
744
745 "loc_FFC98858:\n"
746 " LDR R0, [SP, #0x20] \n"
747 " BL sub_FFC9963C \n"
748 " B loc_FFC981B0 \n"
749 );
750 }
751
752
753
754 void __attribute__((naked,noinline)) sub_FFC95088_my() {
755 asm volatile (
756 " STMFD SP!, {R4-R8,LR} \n"
757 " LDR R7, =0x39B4 \n"
758 " MOV R4, R0 \n"
759 " LDR R0, [R7, #0x1C] \n"
760 " MOV R1, #0x3E \n"
761 " BL sub_FFC28E00 /*_ClearEventFlag*/ \n"
762 " MOV R2, #0 \n"
763 " LDRSH R0, [R4, #4] \n"
764 " MOV R1, R2 \n"
765 " BL sub_FFC93E38 \n"
766 " MOV R5, R0 \n"
767 " LDRSH R0, [R4, #6] \n"
768 " BL sub_FFC93F88 \n"
769 " LDRSH R0, [R4, #8] \n"
770 " BL sub_FFC93FE0 \n"
771 " LDRSH R0, [R4, #0xA] \n"
772 " BL sub_FFC94038 \n"
773 " LDRSH R0, [R4, #0xC] \n"
774 " MOV R1, #0 \n"
775 " BL sub_FFC94090 \n"
776 " MOV R6, R0 \n"
777 " LDRSH R0, [R4, #0xE] \n"
778 " BL sub_FFC9966C \n"
779 " LDR R0, [R4] \n"
780 " LDR R8, =0x4F268 \n"
781 " CMP R0, #0xB \n"
782 " MOVEQ R5, #0 \n"
783 " MOVEQ R6, R5 \n"
784 " BEQ loc_FFC95124 \n"
785 " CMP R5, #1 \n"
786 " BNE loc_FFC95124 \n"
787 " LDRSH R0, [R4, #4] \n"
788 " LDR R1, =0xFFC93D98 \n"
789 " MOV R2, #2 \n"
790 " BL sub_FFD13D1C \n"
791 " STRH R0, [R4, #4] \n"
792 " MOV R0, #0 \n"
793 " STR R0, [R7, #0x28] \n"
794 " B loc_FFC9512C \n"
795
796 "loc_FFC95124:\n"
797 " LDRH R0, [R8] \n"
798 " STRH R0, [R4, #4] \n"
799
800 "loc_FFC9512C:\n"
801 " CMP R6, #1 \n"
802 " LDRNEH R0, [R8, #8] \n"
803 " BNE loc_FFC95148 \n"
804 " LDRSH R0, [R4, #0xC] \n"
805 " LDR R1, =0xFFC93E1C \n"
806 " MOV R2, #0x20 \n"
807 " BL sub_FFC9968C \n"
808
809 "loc_FFC95148:\n"
810 " STRH R0, [R4, #0xC] \n"
811 " LDRSH R0, [R4, #6] \n"
812 " BL sub_FFC86234_my \n"
813 " LDR PC, =0xFFC95154 \n"
814 );
815 }
816
817
818
819 void __attribute__((naked,noinline)) sub_FFC86234_my() {
820 asm volatile (
821 " STMFD SP!, {R4-R6,LR} \n"
822 " LDR R5, =0x3680 \n"
823 " MOV R4, R0 \n"
824 " LDR R0, [R5, #4] \n"
825 " CMP R0, #1 \n"
826 " LDRNE R1, =0x146 \n"
827 " LDRNE R0, =0xFFC8606C /*'Shutter.c'*/ \n"
828 " BLNE _DebugAssert \n"
829 " CMN R4, #0xC00 \n"
830 " LDREQSH R4, [R5, #2] \n"
831 " CMN R4, #0xC00 \n"
832 " MOVEQ R1, #0x14C \n"
833 " LDREQ R0, =0xFFC8606C /*'Shutter.c'*/ \n"
834 " STRH R4, [R5, #2] \n"
835 " BLEQ _DebugAssert \n"
836 " MOV R0, R4 \n"
837 " BL apex2us \n"
838 " LDR PC, =0xFFC86278 \n"
839 );
840 }