This source file includes following definitions.
- capt_seq_task
- sub_FFC4DE48_my
- sub_FFD15B58_my
- exp_drv_task
- sub_FFC969F8_my
- sub_FFC77D90_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R7,LR} \n"
17 " LDR R6, =0x5698 \n"
18
19 "loc_FFC4E2E8:\n"
20 " LDR R0, [R6, #0x10] \n"
21 " MOV R2, #0 \n"
22 " MOV R1, SP \n"
23 " BL sub_FFC19658 /*_ReceiveMessageQueue*/ \n"
24 " TST R0, #1 \n"
25 " BEQ loc_FFC4E314 \n"
26 " LDR R1, =0x43F \n"
27 " LDR R0, =0xFFC4DDC8 /*'SsShootTask.c'*/ \n"
28 " BL _DebugAssert \n"
29 " BL _ExitTask \n"
30 " LDMFD SP!, {R3-R7,PC} \n"
31
32 "loc_FFC4E314:\n"
33 " LDR R0, [SP] \n"
34 " LDR R1, [R0] \n"
35 " CMP R1, #0x1A \n"
36 " ADDLS PC, PC, R1, LSL#2 \n"
37 " B loc_FFC4E4BC \n"
38 " B loc_FFC4E394 \n"
39 " B loc_FFC4E39C \n"
40 " B loc_FFC4E3A4 \n"
41 " B loc_FFC4E3B8 \n"
42 " B loc_FFC4E3B0 \n"
43 " B loc_FFC4E3C0 \n"
44 " B loc_FFC4E3C8 \n"
45 " B loc_FFC4E3D4 \n"
46 " B loc_FFC4E42C \n"
47 " B loc_FFC4E3B8 \n"
48 " B loc_FFC4E434 \n"
49 " B loc_FFC4E43C \n"
50 " B loc_FFC4E444 \n"
51 " B loc_FFC4E44C \n"
52 " B loc_FFC4E454 \n"
53 " B loc_FFC4E45C \n"
54 " B loc_FFC4E464 \n"
55 " B loc_FFC4E46C \n"
56 " B loc_FFC4E474 \n"
57 " B loc_FFC4E47C \n"
58 " B loc_FFC4E484 \n"
59 " B loc_FFC4E490 \n"
60 " B loc_FFC4E49C \n"
61 " B loc_FFC4E4A4 \n"
62 " B loc_FFC4E4AC \n"
63 " B loc_FFC4E4B4 \n"
64 " B loc_FFC4E4C8 \n"
65
66 "loc_FFC4E394:\n"
67 " BL sub_FFD141D0 \n"
68 " BL shooting_expo_param_override\n"
69 " B loc_FFC4E3CC \n"
70
71 "loc_FFC4E39C:\n"
72 " BL sub_FFC4DE48_my \n"
73 " B loc_FFC4E4C8 \n"
74
75 "loc_FFC4E3A4:\n"
76 " MOV R0, #1 \n"
77 " BL sub_FFD14360 \n"
78 " B loc_FFC4E4C8 \n"
79
80 "loc_FFC4E3B0:\n"
81 " BL sub_FFD13E64 \n"
82 " B loc_FFC4E4C8 \n"
83
84 "loc_FFC4E3B8:\n"
85 " BL sub_FFD14178 \n"
86 " B loc_FFC4E4C8 \n"
87
88 "loc_FFC4E3C0:\n"
89 " BL sub_FFD14180 \n"
90 " B loc_FFC4E4C8 \n"
91
92 "loc_FFC4E3C8:\n"
93 " BL sub_FFD14280 \n"
94
95 "loc_FFC4E3CC:\n"
96 " BL sub_FFC4C3DC \n"
97 " B loc_FFC4E4C8 \n"
98
99 "loc_FFC4E3D4:\n"
100 " LDR R4, [R0, #0xC] \n"
101 " BL sub_FFD14188 \n"
102 " MOV R0, R4 \n"
103 " BL sub_FFD14BE0 \n"
104 " TST R0, #1 \n"
105 " MOV R5, R0 \n"
106 " BNE loc_FFC4E414 \n"
107 " BL sub_FFC5BE50 \n"
108 " STR R0, [R4, #0x14] \n"
109 " MOV R0, R4 \n"
110 " BL sub_FFD15A70 \n"
111 " MOV R0, R4 \n"
112 " BL sub_FFD15FF4 \n"
113 " MOV R5, R0 \n"
114 " LDR R0, [R4, #0x14] \n"
115 " BL sub_FFC5C064 \n"
116
117 "loc_FFC4E414:\n"
118 " BL sub_FFD14178 \n"
119 " MOV R2, R4 \n"
120 " MOV R1, #8 \n"
121 " MOV R0, R5 \n"
122 " BL sub_FFC4C774 \n"
123 " B loc_FFC4E4C8 \n"
124
125 "loc_FFC4E42C:\n"
126 " BL sub_FFD142DC \n"
127 " B loc_FFC4E3CC \n"
128
129 "loc_FFC4E434:\n"
130 " BL sub_FFD14E4C \n"
131 " B loc_FFC4E4C8 \n"
132
133 "loc_FFC4E43C:\n"
134 " BL sub_FFD15004 \n"
135 " B loc_FFC4E4C8 \n"
136
137 "loc_FFC4E444:\n"
138 " BL sub_FFD15094 \n"
139 " B loc_FFC4E4C8 \n"
140
141 "loc_FFC4E44C:\n"
142 " BL sub_FFD15148 \n"
143 " B loc_FFC4E4C8 \n"
144
145 "loc_FFC4E454:\n"
146 " BL sub_FFD153D4 \n"
147 " B loc_FFC4E4C8 \n"
148
149 "loc_FFC4E45C:\n"
150 " BL sub_FFD15424 \n"
151 " B loc_FFC4E4C8 \n"
152
153 "loc_FFC4E464:\n"
154 " MOV R0, #0 \n"
155 " B loc_FFC4E488 \n"
156
157 "loc_FFC4E46C:\n"
158 " BL sub_FFD155E8 \n"
159 " B loc_FFC4E4C8 \n"
160
161 "loc_FFC4E474:\n"
162 " BL sub_FFD1567C \n"
163 " B loc_FFC4E4C8 \n"
164
165 "loc_FFC4E47C:\n"
166 " BL sub_FFD1573C \n"
167 " B loc_FFC4E4C8 \n"
168
169 "loc_FFC4E484:\n"
170 " MOV R0, #1 \n"
171
172 "loc_FFC4E488:\n"
173 " BL sub_FFD154A8 \n"
174 " B loc_FFC4E4C8 \n"
175
176 "loc_FFC4E490:\n"
177 " BL sub_FFD144AC \n"
178 " BL sub_FFC4E5E4 \n"
179 " B loc_FFC4E4C8 \n"
180
181 "loc_FFC4E49C:\n"
182 " BL sub_FFD15264 \n"
183 " B loc_FFC4E4C8 \n"
184
185 "loc_FFC4E4A4:\n"
186 " BL sub_FFD1533C \n"
187 " B loc_FFC4E4C8 \n"
188
189 "loc_FFC4E4AC:\n"
190 " BL sub_FFC4DD2C \n"
191 " B loc_FFC4E4C8 \n"
192
193 "loc_FFC4E4B4:\n"
194 " BL sub_FFC15C28 \n"
195 " B loc_FFC4E4C8 \n"
196
197 "loc_FFC4E4BC:\n"
198 " LDR R1, =0x523 \n"
199 " LDR R0, =0xFFC4DDC8 /*'SsShootTask.c'*/ \n"
200 " BL _DebugAssert \n"
201
202 "loc_FFC4E4C8:\n"
203 " LDR R0, [SP] \n"
204 " LDR R1, [R0, #4] \n"
205 " LDR R0, [R6, #0xC] \n"
206 " BL sub_FFC193D4 /*_SetEventFlag*/ \n"
207 " LDR R4, [SP] \n"
208 " LDR R0, [R4, #8] \n"
209 " CMP R0, #0 \n"
210 " LDREQ R0, =0xFFC4DDC8 /*'SsShootTask.c'*/ \n"
211 " MOVEQ R1, #0xFC \n"
212 " BLEQ _DebugAssert \n"
213 " MOV R0, #0 \n"
214 " STR R0, [R4, #8] \n"
215 " B loc_FFC4E2E8 \n"
216 );
217 }
218
219
220
221 void __attribute__((naked,noinline)) sub_FFC4DE48_my() {
222 asm volatile (
223 " STMFD SP!, {R3-R7,LR} \n"
224 " LDR R4, [R0, #0xC] \n"
225 " LDR R5, =0x19890 \n"
226 " LDR R0, [R4, #8] \n"
227 " LDR R6, =0x820A \n"
228 " ORR R0, R0, #1 \n"
229 " STR R0, [R4, #8] \n"
230 " LDRH R0, [R5] \n"
231 " CMP R0, R6 \n"
232 " BEQ loc_FFC4DEE4 \n"
233 " LDRH R0, [R5, #0x7E] \n"
234 " CMP R0, #3 \n"
235 " BEQ loc_FFC4DF48 \n"
236 " LDR R0, [R4, #0xC] \n"
237 " CMP R0, #1 \n"
238 " BLS loc_FFC4DEF0 \n"
239 " LDRH R0, [R5, #0x7C] \n"
240 " CMP R0, #0 \n"
241 " BNE loc_FFC4DF48 \n"
242 " LDRH R0, [R5, #0x78] \n"
243 " CMP R0, #2 \n"
244 " BNE loc_FFC4DEFC \n"
245 " BL sub_FFD1456C \n"
246 " LDRH R0, [R5] \n"
247 " CMP R0, R6 \n"
248 " BEQ loc_FFC4DEE4 \n"
249 " LDRH R0, [R5, #0x7E] \n"
250 " CMP R0, #3 \n"
251 " BEQ loc_FFC4DF48 \n"
252 " LDR R0, [R4, #0xC] \n"
253 " CMP R0, #1 \n"
254 " BLS loc_FFC4DEF0 \n"
255 " LDRH R0, [R5, #0x7C] \n"
256 " CMP R0, #0 \n"
257 " BNE loc_FFC4DF48 \n"
258 " LDRH R0, [R5, #0x78] \n"
259 " CMP R0, #2 \n"
260 " BEQ loc_FFC4DF28 \n"
261 " B loc_FFC4DEFC \n"
262
263 "loc_FFC4DEE4:\n"
264 " LDRH R0, [R5, #0x7E] \n"
265 " CMP R0, #3 \n"
266 " BEQ loc_FFC4DF48 \n"
267
268 "loc_FFC4DEF0:\n"
269 " LDRH R0, [R5, #0x7C] \n"
270 " CMP R0, #0 \n"
271 " BNE loc_FFC4DF48 \n"
272
273 "loc_FFC4DEFC:\n"
274 " LDRH R0, [R5, #0x78] \n"
275 " CMP R0, #1 \n"
276 " BNE loc_FFC4DF48 \n"
277 " LDRH R0, [R5] \n"
278 " CMP R0, R6 \n"
279 " LDRNE R0, [R4, #0xC] \n"
280 " CMPNE R0, #1 \n"
281 " BLS loc_FFC4DF48 \n"
282 " LDR R0, [R4, #0x10] \n"
283 " CMP R0, #1 \n"
284 " BNE loc_FFC4DF48 \n"
285
286 "loc_FFC4DF28:\n"
287 " LDR R3, =0x20D \n"
288 " LDR R0, =0x5698 \n"
289 " STR R3, [SP] \n"
290 " LDR R0, [R0, #0xC] \n"
291 " LDR R2, =0xEA60 \n"
292 " LDR R3, =0xFFC4DDC8 /*'SsShootTask.c'*/ \n"
293 " MOV R1, #0x40000000 \n"
294 " BL sub_FFC51928 \n"
295
296 "loc_FFC4DF48:\n"
297 " BL sub_FFC4DD2C \n"
298 " MOV R0, #2 \n"
299 " BL sub_FFC49530 \n"
300 " BL sub_FFD14188 \n"
301 " MOV R0, R4 \n"
302 " BL sub_FFD147F0 \n"
303 " TST R0, #1 \n"
304 " MOVNE R2, R4 \n"
305 " LDMNEFD SP!, {R3-R7,LR} \n"
306 " MOVNE R1, #1 \n"
307 " BNE sub_FFC4C774 \n"
308 " BL sub_FFD27BC4 \n"
309 " BL sub_FFC5BE50 \n"
310 " STR R0, [R4, #0x14] \n"
311 " MOV R0, R4 \n"
312 " BL sub_FFD15A70 \n"
313 " BL sub_FFD16540 \n"
314 " MOV R0, R4 \n"
315 " BL sub_FFD15B58_my \n"
316 " BL capt_seq_hook_raw_here \n"
317 " MOV R2, R4 \n"
318 " MOV R1, #1 \n"
319 " BL sub_FFC4C774 \n"
320 " BL sub_FFD15F94 \n"
321 " CMP R0, #0 \n"
322 " LDRNE R0, [R4, #8] \n"
323 " ORRNE R0, R0, #0x2000 \n"
324 " STRNE R0, [R4, #8] \n"
325 " LDRH R0, [R5, #0x7E] \n"
326 " CMP R0, #3 \n"
327 " BEQ loc_FFC4DFDC \n"
328 " LDRH R0, [R5, #0x7C] \n"
329 " CMP R0, #0 \n"
330 " LDREQH R0, [R5, #0x78] \n"
331 " CMPEQ R0, #2 \n"
332 " MOVEQ R0, R4 \n"
333 " LDMEQFD SP!, {R3-R7,LR} \n"
334 " BEQ sub_FFD145C0 \n"
335
336 "loc_FFC4DFDC:\n"
337 " LDMFD SP!, {R3-R7,PC} \n"
338 );
339 }
340
341
342
343 void __attribute__((naked,noinline)) sub_FFD15B58_my() {
344 asm volatile (
345 " STMFD SP!, {R0-R10,LR} \n"
346 " MOV R6, #0 \n"
347 " MOV R4, R0 \n"
348 " BL sub_FFD166AC \n"
349 " MVN R1, #0 \n"
350 " BL sub_FFC19408 /*_ClearEventFlag*/ \n"
351 " MOV R2, #4 \n"
352 " ADD R1, SP, #8 \n"
353 " MOV R0, #0x8A \n"
354 " BL _GetPropertyCase \n"
355 " TST R0, #1 \n"
356 " LDRNE R1, =0x20A \n"
357 " LDRNE R0, =0xFFD15D60 /*'SsCaptureSeq.c'*/ \n"
358 " BLNE _DebugAssert \n"
359 " LDR R8, =0x1993C \n"
360 " LDR R5, =0x19890 \n"
361 " LDRSH R1, [R8, #0xE] \n"
362 " LDR R0, [R5, #0x74] \n"
363 " BL sub_FFDB83FC \n"
364 " BL sub_FFC3A2E0 /*_GetCCDTemperature*/ \n"
365 " LDR R2, =0xA600 \n"
366 " ADD R3, R4, #0x8C \n"
367 " STRH R0, [R4, #0x88] \n"
368 " STRD R2, [SP] \n"
369 " MOV R1, R0 \n"
370 " LDRH R0, [R5, #0x4C] \n"
371 " LDRSH R2, [R8, #0xC] \n"
372 " LDR R3, =0xA5FC \n"
373 " BL sub_FFD16B98 \n"
374 " BL wait_until_remote_button_is_released\n"
375 " BL capt_seq_hook_set_nr\n"
376 " LDR PC, =0xFFD15BCC \n"
377 );
378 }
379
380
381
382 void __attribute__((naked,noinline)) exp_drv_task() {
383 asm volatile (
384 " STMFD SP!, {R4-R8,LR} \n"
385 " SUB SP, SP, #0x20 \n"
386 " LDR R8, =0xBB8 \n"
387 " LDR R7, =0x6D70 \n"
388 " LDR R5, =0x41350 \n"
389 " MOV R0, #0 \n"
390 " ADD R6, SP, #0x10 \n"
391 " STR R0, [SP, #0xC] \n"
392
393 "loc_FFC98F38:\n"
394 " LDR R0, [R7, #0x20] \n"
395 " MOV R2, #0 \n"
396 " ADD R1, SP, #0x1C \n"
397 " BL sub_FFC19658 /*_ReceiveMessageQueue*/ \n"
398 " LDR R0, [SP, #0xC] \n"
399 " CMP R0, #1 \n"
400 " BNE loc_FFC98F80 \n"
401 " LDR R0, [SP, #0x1C] \n"
402 " LDR R0, [R0] \n"
403 " CMP R0, #0x13 \n"
404 " CMPNE R0, #0x14 \n"
405 " CMPNE R0, #0x15 \n"
406 " BEQ loc_FFC99100 \n"
407 " CMP R0, #0x26 \n"
408 " BEQ loc_FFC9906C \n"
409 " ADD R1, SP, #0xC \n"
410 " MOV R0, #0 \n"
411 " BL sub_FFC98EC8 \n"
412
413 "loc_FFC98F80:\n"
414 " LDR R0, [SP, #0x1C] \n"
415 " LDR R1, [R0] \n"
416 " CMP R1, #0x2B \n"
417 " BNE loc_FFC98FB0 \n"
418 " LDR R0, [SP, #0x1C] \n"
419 " BL sub_FFC9A1F8 \n"
420 " LDR R0, [R7, #0x1C] \n"
421 " MOV R1, #1 \n"
422 " BL sub_FFC193D4 /*_SetEventFlag*/ \n"
423 " BL _ExitTask \n"
424 " ADD SP, SP, #0x20 \n"
425 " LDMFD SP!, {R4-R8,PC} \n"
426
427 "loc_FFC98FB0:\n"
428 " CMP R1, #0x2A \n"
429 " BNE loc_FFC98FCC \n"
430 " LDR R2, [R0, #0x88]! \n"
431 " LDR R1, [R0, #4] \n"
432 " MOV R0, R1 \n"
433 " BLX R2 \n"
434 " B loc_FFC99564 \n"
435
436 "loc_FFC98FCC:\n"
437 " CMP R1, #0x24 \n"
438 " BNE loc_FFC9901C \n"
439 " LDR R0, [R7, #0x1C] \n"
440 " MOV R1, #0x80 \n"
441 " BL sub_FFC19408 /*_ClearEventFlag*/ \n"
442 " LDR R0, =0xFFC959B4 \n"
443 " MOV R1, #0x80 \n"
444 " BL sub_FFD0A51C \n"
445 " LDR R0, [R7, #0x1C] \n"
446 " MOV R2, R8 \n"
447 " MOV R1, #0x80 \n"
448 " BL sub_FFC1930C /*_WaitForAllEventFlag*/ \n"
449 " TST R0, #1 \n"
450 " LDRNE R1, =0xD07 \n"
451 " BNE loc_FFC990DC \n"
452
453 "loc_FFC99008:\n"
454 " LDR R1, [SP, #0x1C] \n"
455 " LDR R0, [R1, #0x8C] \n"
456 " LDR R1, [R1, #0x88] \n"
457 " BLX R1 \n"
458 " B loc_FFC99564 \n"
459
460 "loc_FFC9901C:\n"
461 " CMP R1, #0x25 \n"
462 " BNE loc_FFC99064 \n"
463 " ADD R1, SP, #0xC \n"
464 " BL sub_FFC98EC8 \n"
465 " LDR R0, [R7, #0x1C] \n"
466 " MOV R1, #0x100 \n"
467 " BL sub_FFC19408 /*_ClearEventFlag*/ \n"
468 " MOV R1, #0x100 \n"
469 " LDR R0, =0xFFC959C4 \n"
470 " BL sub_FFD0ACDC \n"
471 " LDR R0, [R7, #0x1C] \n"
472 " MOV R2, R8 \n"
473 " MOV R1, #0x100 \n"
474 " BL sub_FFC1930C /*_WaitForAllEventFlag*/ \n"
475 " TST R0, #1 \n"
476 " BEQ loc_FFC99008 \n"
477 " LDR R1, =0xD11 \n"
478 " B loc_FFC990DC \n"
479
480 "loc_FFC99064:\n"
481 " CMP R1, #0x26 \n"
482 " BNE loc_FFC9907C \n"
483
484 "loc_FFC9906C:\n"
485 " LDR R0, [SP, #0x1C] \n"
486 " ADD R1, SP, #0xC \n"
487 " BL sub_FFC98EC8 \n"
488 " B loc_FFC99008 \n"
489
490 "loc_FFC9907C:\n"
491 " CMP R1, #0x27 \n"
492 " CMPNE R1, #0x28 \n"
493 " BNE loc_FFC990E8 \n"
494 " ADD R1, SP, #0xC \n"
495 " BL sub_FFC98EC8 \n"
496 " LDR R4, [SP, #0x1C] \n"
497 " LDR R0, [R7, #0x1C] \n"
498 " MOV R1, #0x40 \n"
499 " BL sub_FFC19408 /*_ClearEventFlag*/ \n"
500 " LDR R0, [R4] \n"
501 " MOV R1, #0x40 \n"
502 " CMP R0, #0x27 \n"
503 " LDR R0, =0xFFC95A28 \n"
504 " BNE loc_FFC990BC \n"
505 " BL sub_FFD0A5BC \n"
506 " B loc_FFC990C0 \n"
507
508 "loc_FFC990BC:\n"
509 " BL sub_FFD0A648 \n"
510
511 "loc_FFC990C0:\n"
512 " LDR R0, [R7, #0x1C] \n"
513 " MOV R2, R8 \n"
514 " MOV R1, #0x40 \n"
515 " BL sub_FFC1930C /*_WaitForAllEventFlag*/ \n"
516 " TST R0, #1 \n"
517 " BEQ loc_FFC99008 \n"
518 " LDR R1, =0xD1F \n"
519
520 "loc_FFC990DC:\n"
521 " LDR R0, =0xFFC960C4 /*'ExpDrv.c'*/ \n"
522 " BL _DebugAssert \n"
523 " B loc_FFC99008 \n"
524
525 "loc_FFC990E8:\n"
526 " CMP R1, #0x29 \n"
527 " BNE loc_FFC99100 \n"
528 " BL sub_FFC77FEC \n"
529 " BL sub_FFC78D6C \n"
530 " BL sub_FFC7882C \n"
531 " B loc_FFC99008 \n"
532
533 "loc_FFC99100:\n"
534 " LDR R0, [SP, #0x1C] \n"
535 " MOV R4, #1 \n"
536 " LDR R1, [R0] \n"
537 " CMP R1, #0x11 \n"
538 " CMPNE R1, #0x12 \n"
539 " BNE loc_FFC99170 \n"
540 " LDR R1, [R0, #0x7C] \n"
541 " ADD R1, R1, R1, LSL#1 \n"
542 " ADD R1, R0, R1, LSL#2 \n"
543 " SUB R1, R1, #8 \n"
544 " LDMIA R1, {R2-R4} \n"
545 " STMIA R6, {R2-R4} \n"
546 " BL sub_FFC97A44 \n"
547 " LDR R0, [SP, #0x1C] \n"
548 " LDR R1, [R0, #0x7C] \n"
549 " LDR R3, [R0, #0x88] \n"
550 " LDR R2, [R0, #0x8C] \n"
551 " ADD R0, R0, #4 \n"
552 " BLX R3 \n"
553 " LDR R0, [SP, #0x1C] \n"
554 " BL sub_FFC9A5CC \n"
555 " LDR R0, [SP, #0x1C] \n"
556 " LDR R1, [R0, #0x7C] \n"
557 " LDR R3, [R0, #0x90] \n"
558 " LDR R2, [R0, #0x94] \n"
559 " ADD R0, R0, #4 \n"
560 " BLX R3 \n"
561 " B loc_FFC994A4 \n"
562
563 "loc_FFC99170:\n"
564 " CMP R1, #0x13 \n"
565 " CMPNE R1, #0x14 \n"
566 " CMPNE R1, #0x15 \n"
567 " BNE loc_FFC99224 \n"
568 " ADD R3, SP, #0xC \n"
569 " MOV R2, SP \n"
570 " ADD R1, SP, #0x10 \n"
571 " BL sub_FFC97C8C \n"
572 " CMP R0, #1 \n"
573 " MOV R4, R0 \n"
574 " CMPNE R4, #5 \n"
575 " BNE loc_FFC991C0 \n"
576 " LDR R0, [SP, #0x1C] \n"
577 " MOV R2, R4 \n"
578 " LDR R1, [R0, #0x7C]! \n"
579 " LDR R12, [R0, #0xC]! \n"
580 " LDR R3, [R0, #4] \n"
581 " MOV R0, SP \n"
582 " BLX R12 \n"
583 " B loc_FFC991F8 \n"
584
585 "loc_FFC991C0:\n"
586 " LDR R0, [SP, #0x1C] \n"
587 " CMP R4, #2 \n"
588 " LDR R3, [R0, #0x8C] \n"
589 " CMPNE R4, #6 \n"
590 " BNE loc_FFC9920C \n"
591 " LDR R12, [R0, #0x88] \n"
592 " MOV R0, SP \n"
593 " MOV R2, R4 \n"
594 " MOV R1, #1 \n"
595 " BLX R12 \n"
596 " LDR R0, [SP, #0x1C] \n"
597 " MOV R2, SP \n"
598 " ADD R1, SP, #0x10 \n"
599 " BL sub_FFC98C14 \n"
600
601 "loc_FFC991F8:\n"
602 " LDR R0, [SP, #0x1C] \n"
603 " LDR R2, [SP, #0xC] \n"
604 " MOV R1, R4 \n"
605 " BL sub_FFC98E68 \n"
606 " B loc_FFC994A4 \n"
607
608 "loc_FFC9920C:\n"
609 " LDR R1, [R0, #0x7C] \n"
610 " LDR R12, [R0, #0x88] \n"
611 " ADD R0, R0, #4 \n"
612 " MOV R2, R4 \n"
613 " BLX R12 \n"
614 " B loc_FFC994A4 \n"
615
616 "loc_FFC99224:\n"
617 " CMP R1, #0x20 \n"
618 " CMPNE R1, #0x21 \n"
619 " BNE loc_FFC99270 \n"
620 " LDR R1, [R0, #0x7C] \n"
621 " ADD R1, R1, R1, LSL#1 \n"
622 " ADD R1, R0, R1, LSL#2 \n"
623 " SUB R1, R1, #8 \n"
624 " LDMIA R1, {R2-R4} \n"
625 " STMIA R6, {R2-R4} \n"
626 " BL sub_FFC96FC8 \n"
627 " LDR R0, [SP, #0x1C] \n"
628 " LDR R1, [R0, #0x7C] \n"
629 " LDR R3, [R0, #0x88] \n"
630 " LDR R2, [R0, #0x8C] \n"
631 " ADD R0, R0, #4 \n"
632 " BLX R3 \n"
633 " LDR R0, [SP, #0x1C] \n"
634 " BL sub_FFC972C4 \n"
635 " B loc_FFC994A4 \n"
636
637 "loc_FFC99270:\n"
638 " ADD R1, R0, #4 \n"
639 " LDMIA R1, {R2,R3,R12} \n"
640 " STMIA R6, {R2,R3,R12} \n"
641 " LDR R1, [R0] \n"
642 " CMP R1, #0x23 \n"
643 " ADDLS PC, PC, R1, LSL#2 \n"
644 " B loc_FFC99484 \n"
645 " B loc_FFC9931C \n"
646 " B loc_FFC9931C \n"
647 " B loc_FFC9936C \n"
648 " B loc_FFC99374 \n"
649 " B loc_FFC99374 \n"
650 " B loc_FFC99374 \n"
651 " B loc_FFC9931C \n"
652 " B loc_FFC9936C \n"
653 " B loc_FFC99374 \n"
654 " B loc_FFC99374 \n"
655 " B loc_FFC9938C \n"
656 " B loc_FFC9938C \n"
657 " B loc_FFC99478 \n"
658 " B loc_FFC99480 \n"
659 " B loc_FFC99480 \n"
660 " B loc_FFC99480 \n"
661 " B loc_FFC99480 \n"
662 " B loc_FFC99484 \n"
663 " B loc_FFC99484 \n"
664 " B loc_FFC99484 \n"
665 " B loc_FFC99484 \n"
666 " B loc_FFC99484 \n"
667 " B loc_FFC9937C \n"
668 " B loc_FFC99384 \n"
669 " B loc_FFC99384 \n"
670 " B loc_FFC99398 \n"
671 " B loc_FFC993A0 \n"
672 " B loc_FFC993D0 \n"
673 " B loc_FFC99400 \n"
674 " B loc_FFC99430 \n"
675 " B loc_FFC99460 \n"
676 " B loc_FFC99460 \n"
677 " B loc_FFC99484 \n"
678 " B loc_FFC99484 \n"
679 " B loc_FFC99468 \n"
680 " B loc_FFC99470 \n"
681
682 "loc_FFC9931C:\n"
683 " BL sub_FFC95EAC \n"
684 " B loc_FFC99484 \n"
685
686
687 "loc_FFC9936C:\n"
688 " BL sub_FFC96134 \n"
689 " B loc_FFC99484 \n"
690
691 "loc_FFC99374:\n"
692 " BL sub_FFC96338 \n"
693 " B loc_FFC99484 \n"
694
695 "loc_FFC9937C:\n"
696 " BL sub_FFC965A0 \n"
697 " B loc_FFC99484 \n"
698
699 "loc_FFC99384:\n"
700 " BL sub_FFC96794 \n"
701 " B loc_FFC99484 \n"
702
703 "loc_FFC9938C:\n"
704 " BL sub_FFC969F8_my \n"
705 " MOV R4, #0 \n"
706 " B loc_FFC99484 \n"
707
708 "loc_FFC99398:\n"
709 " BL sub_FFC96B34 \n"
710 " B loc_FFC99484 \n"
711
712 "loc_FFC993A0:\n"
713 " LDRH R1, [R0, #4] \n"
714 " STRH R1, [SP, #0x10] \n"
715 " LDRH R1, [R5, #2] \n"
716 " STRH R1, [SP, #0x12] \n"
717 " LDRH R1, [R5, #4] \n"
718 " STRH R1, [SP, #0x14] \n"
719 " LDRH R1, [R5, #6] \n"
720 " STRH R1, [SP, #0x16] \n"
721 " LDRH R1, [R0, #0xC] \n"
722 " STRH R1, [SP, #0x18] \n"
723 " BL sub_FFC9A26C \n"
724 " B loc_FFC99484 \n"
725
726 "loc_FFC993D0:\n"
727 " LDRH R1, [R0, #4] \n"
728 " STRH R1, [SP, #0x10] \n"
729 " LDRH R1, [R5, #2] \n"
730 " STRH R1, [SP, #0x12] \n"
731 " LDRH R1, [R5, #4] \n"
732 " STRH R1, [SP, #0x14] \n"
733 " LDRH R1, [R5, #6] \n"
734 " STRH R1, [SP, #0x16] \n"
735 " LDRH R1, [R5, #8] \n"
736 " STRH R1, [SP, #0x18] \n"
737 " BL sub_FFC9A3E8 \n"
738 " B loc_FFC99484 \n"
739
740 "loc_FFC99400:\n"
741 " LDRH R1, [R5] \n"
742 " STRH R1, [SP, #0x10] \n"
743 " LDRH R1, [R0, #6] \n"
744 " STRH R1, [SP, #0x12] \n"
745 " LDRH R1, [R5, #4] \n"
746 " STRH R1, [SP, #0x14] \n"
747 " LDRH R1, [R5, #6] \n"
748 " STRH R1, [SP, #0x16] \n"
749 " LDRH R1, [R5, #8] \n"
750 " STRH R1, [SP, #0x18] \n"
751 " BL sub_FFC9A494 \n"
752 " B loc_FFC99484 \n"
753
754 "loc_FFC99430:\n"
755 " LDRH R1, [R5] \n"
756 " STRH R1, [SP, #0x10] \n"
757 " LDRH R1, [R5, #2] \n"
758 " STRH R1, [SP, #0x12] \n"
759 " LDRH R1, [R5, #4] \n"
760 " STRH R1, [SP, #0x14] \n"
761 " LDRH R1, [R5, #6] \n"
762 " STRH R1, [SP, #0x16] \n"
763 " LDRH R1, [R0, #0xC] \n"
764 " STRH R1, [SP, #0x18] \n"
765 " BL sub_FFC9A534 \n"
766 " B loc_FFC99484 \n"
767
768 "loc_FFC99460:\n"
769 " BL sub_FFC96D8C \n"
770 " B loc_FFC99484 \n"
771
772 "loc_FFC99468:\n"
773 " BL sub_FFC973C8 \n"
774 " B loc_FFC99484 \n"
775
776 "loc_FFC99470:\n"
777 " BL sub_FFC975FC \n"
778 " B loc_FFC99484 \n"
779
780 "loc_FFC99478:\n"
781 " BL sub_FFC97774 \n"
782 " B loc_FFC99484 \n"
783
784 "loc_FFC99480:\n"
785 " BL sub_FFC9790C \n"
786
787 "loc_FFC99484:\n"
788 " LDR R0, [SP, #0x1C] \n"
789 " LDR R1, [R0, #0x7C] \n"
790 " LDR R3, [R0, #0x88] \n"
791 " LDR R2, [R0, #0x8C] \n"
792 " ADD R0, R0, #4 \n"
793 " BLX R3 \n"
794 " CMP R4, #1 \n"
795 " BNE loc_FFC994EC \n"
796
797 "loc_FFC994A4:\n"
798 " LDR R0, [SP, #0x1C] \n"
799 " MOV R2, #0xC \n"
800 " LDR R1, [R0, #0x7C] \n"
801 " ADD R1, R1, R1, LSL#1 \n"
802 " ADD R0, R0, R1, LSL#2 \n"
803 " SUB R4, R0, #8 \n"
804 " LDR R0, =0x41350 \n"
805 " ADD R1, SP, #0x10 \n"
806 " BL sub_FFE56B0C \n"
807 " LDR R0, =0x4135C \n"
808 " MOV R2, #0xC \n"
809 " ADD R1, SP, #0x10 \n"
810 " BL sub_FFE56B0C \n"
811 " LDR R0, =0x41368 \n"
812 " MOV R2, #0xC \n"
813 " MOV R1, R4 \n"
814 " BL sub_FFE56B0C \n"
815 " B loc_FFC99564 \n"
816
817 "loc_FFC994EC:\n"
818 " LDR R0, [SP, #0x1C] \n"
819 " LDR R0, [R0] \n"
820 " CMP R0, #0xB \n"
821 " BNE loc_FFC99534 \n"
822 " MOV R3, #0 \n"
823 " STR R3, [SP] \n"
824 " MOV R3, #1 \n"
825 " MOV R2, #1 \n"
826 " MOV R1, #1 \n"
827 " MOV R0, #0 \n"
828 " BL sub_FFC95CB4 \n"
829 " MOV R3, #0 \n"
830 " STR R3, [SP] \n"
831 " MOV R3, #1 \n"
832 " MOV R2, #1 \n"
833 " MOV R1, #1 \n"
834 " MOV R0, #0 \n"
835 " B loc_FFC99560 \n"
836
837 "loc_FFC99534:\n"
838 " MOV R3, #1 \n"
839 " MOV R2, #1 \n"
840 " MOV R1, #1 \n"
841 " MOV R0, #1 \n"
842 " STR R3, [SP] \n"
843 " BL sub_FFC95CB4 \n"
844 " MOV R3, #1 \n"
845 " MOV R2, #1 \n"
846 " MOV R1, #1 \n"
847 " MOV R0, #1 \n"
848 " STR R3, [SP] \n"
849
850 "loc_FFC99560:\n"
851 " BL sub_FFC95DF4 \n"
852
853 "loc_FFC99564:\n"
854 " LDR R0, [SP, #0x1C] \n"
855 " BL sub_FFC9A1F8 \n"
856 " B loc_FFC98F38 \n"
857 );
858 }
859
860
861
862 void __attribute__((naked,noinline)) sub_FFC969F8_my() {
863 asm volatile (
864 " STMFD SP!, {R4-R8,LR} \n"
865 " LDR R7, =0x6D70 \n"
866 " MOV R4, R0 \n"
867 " LDR R0, [R7, #0x1C] \n"
868 " MOV R1, #0x3E \n"
869 " BL sub_FFC19408 /*_ClearEventFlag*/ \n"
870 " LDRSH R0, [R4, #4] \n"
871 " MOV R2, #0 \n"
872 " MOV R1, #0 \n"
873 " BL sub_FFC95A48 \n"
874 " MOV R6, R0 \n"
875 " LDRSH R0, [R4, #6] \n"
876 " BL sub_FFC95B54 \n"
877 " LDRSH R0, [R4, #8] \n"
878 " BL sub_FFC95BAC \n"
879 " LDRSH R0, [R4, #0xA] \n"
880 " BL sub_FFC95C04 \n"
881 " LDRSH R0, [R4, #0xC] \n"
882 " BL sub_FFC95C5C \n"
883 " MOV R5, R0 \n"
884 " LDR R0, [R4] \n"
885 " LDR R8, =0x41368 \n"
886 " CMP R0, #0xB \n"
887 " MOVEQ R6, #0 \n"
888 " MOVEQ R5, #0 \n"
889 " BEQ loc_FFC96A88 \n"
890 " CMP R6, #1 \n"
891 " BNE loc_FFC96A88 \n"
892 " LDRSH R0, [R4, #4] \n"
893 " LDR R1, =0xFFC959A4 \n"
894 " MOV R2, #2 \n"
895 " BL sub_FFD0A790 \n"
896 " STRH R0, [R4, #4] \n"
897 " MOV R0, #0 \n"
898 " STR R0, [R7, #0x28] \n"
899 " B loc_FFC96A90 \n"
900
901 "loc_FFC96A88:\n"
902 " LDRH R0, [R8] \n"
903 " STRH R0, [R4, #4] \n"
904
905 "loc_FFC96A90:\n"
906 " CMP R5, #1 \n"
907 " LDRNEH R0, [R8, #8] \n"
908 " BNE loc_FFC96AAC \n"
909 " LDRSH R0, [R4, #0xC] \n"
910 " LDR R1, =0xFFC95A38 \n"
911 " MOV R2, #0x20 \n"
912 " BL sub_FFC9A228 \n"
913
914 "loc_FFC96AAC:\n"
915 " STRH R0, [R4, #0xC] \n"
916 " LDRSH R0, [R4, #6] \n"
917 " BL sub_FFC77D90_my \n"
918 " LDR PC, =0xFFC96AB8 \n"
919 );
920 }
921
922
923
924 void __attribute__((naked,noinline)) sub_FFC77D90_my() {
925 asm volatile (
926 " STMFD SP!, {R4-R6,LR} \n"
927 " LDR R5, =0x66FC \n"
928 " MOV R4, R0 \n"
929 " LDR R0, [R5, #4] \n"
930 " CMP R0, #1 \n"
931 " MOVNE R1, #0x16C \n"
932 " LDRNE R0, =0xFFC77B28 /*'Shutter.c'*/ \n"
933 " BLNE _DebugAssert \n"
934 " CMN R4, #0xC00 \n"
935 " LDREQSH R4, [R5, #2] \n"
936 " CMN R4, #0xC00 \n"
937 " LDREQ R1, =0x172 \n"
938 " LDREQ R0, =0xFFC77B28 /*'Shutter.c'*/ \n"
939 " STRH R4, [R5, #2] \n"
940 " BLEQ _DebugAssert \n"
941 " MOV R0, R4 \n"
942 " BL apex2us \n"
943 " MOV R4, R0 \n"
944
945 " MOV R0, R4 \n"
946 " BL sub_FFCAC3C8 \n"
947 " TST R0, #1 \n"
948 " LDRNE R1, =0x177 \n"
949 " LDMNEFD SP!, {R4-R6,LR} \n"
950 " LDRNE R0, =0xFFC77B28 /*'Shutter.c'*/ \n"
951 " BNE _DebugAssert \n"
952 " LDMFD SP!, {R4-R6,PC} \n"
953 );
954 }