This source file includes following definitions.
- dvlp_seq_task
- capt_seq_task
- exp_drv_task
- sub_FF0C8958_my
- sub_FF0B7684_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9 #define NR_AUTO (0)
10
11 #include "../../../generic/capt_seq.c"
12
13
14
15 void __attribute__((naked,noinline)) dvlp_seq_task() {
16 asm volatile (
17 " STMFD SP!, {R2-R6,LR} \n"
18 " LDR R6, =0x3130 \n"
19
20 "loc_FF07E75C:\n"
21 " MOV R2, #0 \n"
22 " LDR R0, [R6, #8] \n"
23 " LDR R1, [R6, #0x10] \n"
24 " BL sub_FF02B240 /*_PostMessageQueue*/ \n"
25 " LDR R0, [R6, #4] \n"
26 " MOV R2, #0 \n"
27 " ADD R1, SP, #4 \n"
28 " BL sub_FF02B0F4 /*_ReceiveMessageQueue*/ \n"
29 " TST R0, #1 \n"
30 " MOVNE R1, #0x190 \n"
31 " BNE loc_FF07E7A4 \n"
32 " LDR R0, [R6, #8] \n"
33 " MOV R1, SP \n"
34 " BL sub_FF02B1BC /*_TryReceiveMessageQueue*/ \n"
35 " TST R0, #1 \n"
36 " MOVEQ R5, #0 \n"
37 " BEQ loc_FF07E7B4 \n"
38 " LDR R1, =0x196 \n"
39
40 "loc_FF07E7A4:\n"
41 " LDR R0, =0xFF07E90C /*'SsDvlpSeq.c'*/ \n"
42 " BL _DebugAssert \n"
43 " BL _ExitTask \n"
44 " LDMFD SP!, {R2-R6,PC} \n"
45
46 "loc_FF07E7B4:\n"
47 " LDR R1, [SP, #4] \n"
48 " LDR R0, [R1] \n"
49 " CMP R0, #0 \n"
50 " BEQ loc_FF07E7D8 \n"
51 " CMP R0, #1 \n"
52 " BEQ loc_FF07E7E4 \n"
53 " CMP R0, #2 \n"
54 " BLEQ sub_FF07E280 \n"
55 " B loc_FF07E7F8 \n"
56
57 "loc_FF07E7D8:\n"
58 " BL capt_seq_hook_raw_here\n"
59 " LDR R0, [R1, #8] \n"
60 " BL sub_FF1D7490 \n"
61 " B loc_FF07E7F8 \n"
62
63 "loc_FF07E7E4:\n"
64 " LDR R0, [R1, #8] \n"
65 " BL sub_FF1D7794 \n"
66 " LDR R0, [SP, #4] \n"
67 " LDR R0, [R0, #8] \n"
68 " BL sub_FF1D6760 \n"
69
70 "loc_FF07E7F8:\n"
71 " LDR R4, [SP, #4] \n"
72 " LDR R0, [R4, #4] \n"
73 " CMP R0, #0 \n"
74 " MOVEQ R1, #0x76 \n"
75 " LDREQ R0, =0xFF07E90C /*'SsDvlpSeq.c'*/ \n"
76 " BLEQ _DebugAssert \n"
77 " STR R5, [R4, #4] \n"
78 " LDR R0, [R6, #4] \n"
79 " ADD R1, SP, #4 \n"
80 " BL sub_FF02B1BC /*_TryReceiveMessageQueue*/ \n"
81 " TST R0, #1 \n"
82 " BEQ loc_FF07E7B4 \n"
83 " B loc_FF07E75C \n"
84 );
85 }
86
87
88
89 void __attribute__((naked,noinline)) capt_seq_task() {
90 asm volatile (
91 " STMFD SP!, {R3-R7,LR} \n"
92 " LDR R4, =0x3F64C \n"
93 " LDR R7, =0x30DC \n"
94 " MOV R6, #0 \n"
95
96 "loc_FF07C464:\n"
97 " LDR R0, [R7, #4] \n"
98 " MOV R2, #0 \n"
99 " MOV R1, SP \n"
100 " BL sub_FF02B0F4 /*_ReceiveMessageQueue*/ \n"
101 " TST R0, #1 \n"
102 " BEQ loc_FF07C490 \n"
103 " LDR R1, =0x491 \n"
104 " LDR R0, =0xFF07BDA0 /*'SsShootTask.c'*/ \n"
105 " BL _DebugAssert \n"
106 " BL _ExitTask \n"
107 " LDMFD SP!, {R3-R7,PC} \n"
108
109 "loc_FF07C490:\n"
110 " LDR R0, [SP] \n"
111 " LDR R1, [R0] \n"
112 " CMP R1, #0x28 \n"
113 " ADDCC PC, PC, R1, LSL#2 \n"
114 " B loc_FF07C728 \n"
115 " B loc_FF07C544 \n"
116 " B loc_FF07C55C \n"
117 " B loc_FF07C568 \n"
118 " B loc_FF07C588 \n"
119 " B loc_FF07C580 \n"
120 " B loc_FF07C594 \n"
121 " B loc_FF07C59C \n"
122 " B loc_FF07C5A4 \n"
123 " B loc_FF07C5C0 \n"
124 " B loc_FF07C600 \n"
125 " B loc_FF07C5CC \n"
126 " B loc_FF07C5D8 \n"
127 " B loc_FF07C5E0 \n"
128 " B loc_FF07C5E8 \n"
129 " B loc_FF07C5F0 \n"
130 " B loc_FF07C5F8 \n"
131 " B loc_FF07C608 \n"
132 " B loc_FF07C610 \n"
133 " B loc_FF07C618 \n"
134 " B loc_FF07C620 \n"
135 " B loc_FF07C628 \n"
136 " B loc_FF07C630 \n"
137 " B loc_FF07C638 \n"
138 " B loc_FF07C640 \n"
139 " B loc_FF07C648 \n"
140 " B loc_FF07C650 \n"
141 " B loc_FF07C65C \n"
142 " B loc_FF07C664 \n"
143 " B loc_FF07C670 \n"
144 " B loc_FF07C678 \n"
145 " B loc_FF07C6A8 \n"
146 " B loc_FF07C6B0 \n"
147 " B loc_FF07C6B8 \n"
148 " B loc_FF07C6C0 \n"
149 " B loc_FF07C6C8 \n"
150 " B loc_FF07C6D0 \n"
151 " B loc_FF07C6DC \n"
152 " B loc_FF07C6E4 \n"
153 " B loc_FF07C6F0 \n"
154 " B loc_FF07C734 \n"
155
156 "loc_FF07C544:\n"
157 " BL shooting_expo_iso_override\n"
158 " BL sub_FF07CD58 \n"
159 " BL shooting_expo_param_override\n"
160 " BL sub_FF0795A0 \n"
161 " MOV R0, #0\n"
162 " STR R0, [R4,#0x28]\n"
163
164
165
166 " B loc_FF07C734 \n"
167
168 "loc_FF07C55C:\n"
169 " BL wait_until_remote_button_is_released\n"
170 " BL capt_seq_hook_set_nr\n"
171 " LDR R0, [R0, #0x10] \n"
172 " BL sub_FF07C87C \n"
173 " B loc_FF07C734 \n"
174
175 "loc_FF07C568:\n"
176 " MOV R0, #1 \n"
177 " BL sub_FF07D0B4 \n"
178 " LDR R0, [R4, #0xC] \n"
179 " CMP R0, #0 \n"
180 " BLNE sub_FF07DF6C \n"
181 " B loc_FF07C734 \n"
182
183 "loc_FF07C580:\n"
184 " BL sub_FF07C9C4 \n"
185 " B loc_FF07C58C \n"
186
187 "loc_FF07C588:\n"
188 " BL sub_FF07CD38 \n"
189
190 "loc_FF07C58C:\n"
191 " STR R6, [R4, #0x28] \n"
192 " B loc_FF07C734 \n"
193
194 "loc_FF07C594:\n"
195 " BL sub_FF07CD40 \n"
196 " B loc_FF07C734 \n"
197
198 "loc_FF07C59C:\n"
199 " BL sub_FF07CF5C \n"
200 " B loc_FF07C5C4 \n"
201
202 "loc_FF07C5A4:\n"
203 " LDR R5, [R0, #0x10] \n"
204 " MOV R0, R5 \n"
205 " BL sub_FF1D5818 \n"
206 " MOV R2, R5 \n"
207 " MOV R1, #9 \n"
208 " BL sub_FF07A064 \n"
209 " B loc_FF07C734 \n"
210
211 "loc_FF07C5C0:\n"
212 " BL sub_FF07D018 \n"
213
214 "loc_FF07C5C4:\n"
215 " BL sub_FF0795A0 \n"
216 " B loc_FF07C734 \n"
217
218 "loc_FF07C5CC:\n"
219 " LDR R0, [R4, #0x58] \n"
220 " BL sub_FF07D9D0 \n"
221 " B loc_FF07C734 \n"
222
223 "loc_FF07C5D8:\n"
224 " BL sub_FF07DCB4 \n"
225 " B loc_FF07C734 \n"
226
227 "loc_FF07C5E0:\n"
228 " BL sub_FF07DD18 \n"
229 " B loc_FF07C734 \n"
230
231 "loc_FF07C5E8:\n"
232 " BL sub_FF07E05C \n"
233 " B loc_FF07C734 \n"
234
235 "loc_FF07C5F0:\n"
236 " BL sub_FF07E4AC \n"
237 " B loc_FF07C734 \n"
238
239 "loc_FF07C5F8:\n"
240 " BL sub_FF07E55C \n"
241 " B loc_FF07C734 \n"
242
243 "loc_FF07C600:\n"
244 " BL sub_FF07CD38 \n"
245 " B loc_FF07C734 \n"
246
247 "loc_FF07C608:\n"
248 " BL sub_FF1D3364 \n"
249 " B loc_FF07C734 \n"
250
251 "loc_FF07C610:\n"
252 " BL sub_FF1D3650 \n"
253 " B loc_FF07C734 \n"
254
255 "loc_FF07C618:\n"
256 " BL sub_FF1D3704 \n"
257 " B loc_FF07C734 \n"
258
259 "loc_FF07C620:\n"
260 " BL sub_FF1D37EC \n"
261 " B loc_FF07C734 \n"
262
263 "loc_FF07C628:\n"
264 " BL sub_FF1D38C0 \n"
265 " B loc_FF07C734 \n"
266
267 "loc_FF07C630:\n"
268 " MOV R0, #0 \n"
269 " B loc_FF07C654 \n"
270
271 "loc_FF07C638:\n"
272 " BL sub_FF1D3EDC \n"
273 " B loc_FF07C734 \n"
274
275 "loc_FF07C640:\n"
276 " BL sub_FF1D3F70 \n"
277 " B loc_FF07C734 \n"
278
279 "loc_FF07C648:\n"
280 " BL sub_FF1D402C \n"
281 " B loc_FF07C734 \n"
282
283 "loc_FF07C650:\n"
284 " MOV R0, #1 \n"
285
286 "loc_FF07C654:\n"
287 " BL sub_FF1D3D6C \n"
288 " B loc_FF07C734 \n"
289
290 "loc_FF07C65C:\n"
291 " BL sub_FF07D324 \n"
292 " B loc_FF07C734 \n"
293
294 "loc_FF07C664:\n"
295 " BL sub_FF07D3B8 \n"
296 " BL sub_FF1D6420 \n"
297 " B loc_FF07C734 \n"
298
299 "loc_FF07C670:\n"
300 " BL sub_FF1D3BAC \n"
301 " B loc_FF07C734 \n"
302
303 "loc_FF07C678:\n"
304 " MOV R2, #2 \n"
305 " ADD R1, R4, #0x6C \n"
306 " MOV R0, #0x6F \n"
307 " BL _GetPropertyCase \n"
308 " TST R0, #1 \n"
309 " LDRNE R1, =0x592 \n"
310 " LDRNE R0, =0xFF07BDA0 /*'SsShootTask.c'*/ \n"
311 " BLNE _DebugAssert \n"
312 " LDRH R0, [R4, #0x6C] \n"
313 " CMP R0, #1 \n"
314 " BLEQ sub_FF1D3BA0 \n"
315 " B loc_FF07C734 \n"
316
317 "loc_FF07C6A8:\n"
318 " BL sub_FF1D3CCC \n"
319 " B loc_FF07C734 \n"
320
321 "loc_FF07C6B0:\n"
322 " BL sub_FF1D64EC \n"
323 " B loc_FF07C734 \n"
324
325 "loc_FF07C6B8:\n"
326 " BL sub_FF028484 \n"
327 " B loc_FF07C734 \n"
328
329 "loc_FF07C6C0:\n"
330 " BL sub_FF080CD8 \n"
331 " B loc_FF07C734 \n"
332
333 "loc_FF07C6C8:\n"
334 " BL sub_FF080D60 \n"
335 " B loc_FF07C734 \n"
336
337 "loc_FF07C6D0:\n"
338 " LDR R0, [R0, #0xC] \n"
339 " BL sub_FF1D4154 \n"
340 " B loc_FF07C734 \n"
341
342 "loc_FF07C6DC:\n"
343 " BL sub_FF1D41C4 \n"
344 " B loc_FF07C734 \n"
345
346 "loc_FF07C6E4:\n"
347 " BL sub_FF080DC8 \n"
348 " BL sub_FF080D80 \n"
349 " B loc_FF07C734 \n"
350
351 "loc_FF07C6F0:\n"
352 " MOV R0, #1 \n"
353 " BL sub_FF1D5F28 \n"
354 " MOV R0, #1 \n"
355 " BL sub_FF1D605C \n"
356 " LDRH R0, [R4, #0xA8] \n"
357 " CMP R0, #4 \n"
358 " LDRNEH R0, [R4] \n"
359 " SUBNE R1, R0, #0x4200 \n"
360 " SUBNES R1, R1, #0x2B \n"
361 " BNE loc_FF07C734 \n"
362 " BL sub_FF080D60 \n"
363 " BL sub_FF0814DC \n"
364 " BL sub_FF0811F0 \n"
365 " B loc_FF07C734 \n"
366
367 "loc_FF07C728:\n"
368 " LDR R1, =0x5F2 \n"
369 " LDR R0, =0xFF07BDA0 /*'SsShootTask.c'*/ \n"
370 " BL _DebugAssert \n"
371
372 "loc_FF07C734:\n"
373 " LDR R0, [SP] \n"
374 " LDR R1, [R0, #4] \n"
375 " LDR R0, [R7] \n"
376 " BL sub_FF088B4C /*_SetEventFlag*/ \n"
377 " LDR R5, [SP] \n"
378 " LDR R0, [R5, #8] \n"
379 " CMP R0, #0 \n"
380 " LDREQ R1, =0x117 \n"
381 " LDREQ R0, =0xFF07BDA0 /*'SsShootTask.c'*/ \n"
382 " BLEQ _DebugAssert \n"
383 " STR R6, [R5, #8] \n"
384 " B loc_FF07C464 \n"
385 );
386 }
387
388
389
390 void __attribute__((naked,noinline)) exp_drv_task() {
391 asm volatile (
392 " STMFD SP!, {R4-R9,LR} \n"
393 " SUB SP, SP, #0x24 \n"
394 " LDR R6, =0x4BF0 \n"
395 " LDR R7, =0xBB8 \n"
396 " LDR R4, =0x5CDA0 \n"
397 " MOV R0, #0 \n"
398 " ADD R5, SP, #0x14 \n"
399 " STR R0, [SP, #0x10] \n"
400
401 "loc_FF0CC428:\n"
402 " LDR R0, [R6, #0x20] \n"
403 " MOV R2, #0 \n"
404 " ADD R1, SP, #0x20 \n"
405 " BL sub_FF02B0F4 /*_ReceiveMessageQueue*/ \n"
406 " LDR R0, [SP, #0x10] \n"
407 " CMP R0, #1 \n"
408 " BNE loc_FF0CC474 \n"
409 " LDR R0, [SP, #0x20] \n"
410 " LDR R0, [R0] \n"
411 " CMP R0, #0x14 \n"
412 " CMPNE R0, #0x15 \n"
413 " CMPNE R0, #0x16 \n"
414 " CMPNE R0, #0x17 \n"
415 " BEQ loc_FF0CC5D4 \n"
416 " CMP R0, #0x29 \n"
417 " BEQ loc_FF0CC55C \n"
418 " ADD R1, SP, #0x10 \n"
419 " MOV R0, #0 \n"
420 " BL sub_FF0CC3B8 \n"
421
422 "loc_FF0CC474:\n"
423 " LDR R0, [SP, #0x20] \n"
424 " LDR R1, [R0] \n"
425 " CMP R1, #0x2F \n"
426 " BNE loc_FF0CC4A0 \n"
427 " BL sub_FF0CD83C \n"
428 " LDR R0, [R6, #0x1C] \n"
429 " MOV R1, #1 \n"
430 " BL sub_FF088B4C /*_SetEventFlag*/ \n"
431 " BL _ExitTask \n"
432 " ADD SP, SP, #0x24 \n"
433 " LDMFD SP!, {R4-R9,PC} \n"
434
435 "loc_FF0CC4A0:\n"
436 " CMP R1, #0x2E \n"
437 " BNE loc_FF0CC4BC \n"
438 " LDR R2, [R0, #0x8C]! \n"
439 " LDR R1, [R0, #4] \n"
440 " MOV R0, R1 \n"
441 " BLX R2 \n"
442 " B loc_FF0CCA64 \n"
443
444 "loc_FF0CC4BC:\n"
445 " CMP R1, #0x27 \n"
446 " BNE loc_FF0CC50C \n"
447 " LDR R0, [R6, #0x1C] \n"
448 " MOV R1, #0x80 \n"
449 " BL sub_FF088B80 /*_ClearEventFlag*/ \n"
450 " LDR R0, =0xFF0C743C \n"
451 " MOV R1, #0x80 \n"
452 " BL sub_FF1BD7B4 \n"
453 " LDR R0, [R6, #0x1C] \n"
454 " MOV R2, R7 \n"
455 " MOV R1, #0x80 \n"
456 " BL sub_FF088A8C /*_WaitForAllEventFlag*/ \n"
457 " TST R0, #1 \n"
458 " LDRNE R1, =0x14FE \n"
459 " BNE loc_FF0CC5C8 \n"
460
461 "loc_FF0CC4F8:\n"
462 " LDR R1, [SP, #0x20] \n"
463 " LDR R0, [R1, #0x90] \n"
464 " LDR R1, [R1, #0x8C] \n"
465 " BLX R1 \n"
466 " B loc_FF0CCA64 \n"
467
468 "loc_FF0CC50C:\n"
469 " CMP R1, #0x28 \n"
470 " BNE loc_FF0CC554 \n"
471 " ADD R1, SP, #0x10 \n"
472 " BL sub_FF0CC3B8 \n"
473 " LDR R0, [R6, #0x1C] \n"
474 " MOV R1, #0x100 \n"
475 " BL sub_FF088B80 /*_ClearEventFlag*/ \n"
476 " LDR R0, =0xFF0C744C \n"
477 " MOV R1, #0x100 \n"
478 " BL sub_FF1BE59C \n"
479 " LDR R0, [R6, #0x1C] \n"
480 " MOV R2, R7 \n"
481 " MOV R1, #0x100 \n"
482 " BL sub_FF088A8C /*_WaitForAllEventFlag*/ \n"
483 " TST R0, #1 \n"
484 " BEQ loc_FF0CC4F8 \n"
485 " LDR R1, =0x1508 \n"
486 " B loc_FF0CC5C8 \n"
487
488 "loc_FF0CC554:\n"
489 " CMP R1, #0x29 \n"
490 " BNE loc_FF0CC56C \n"
491
492 "loc_FF0CC55C:\n"
493 " LDR R0, [SP, #0x20] \n"
494 " ADD R1, SP, #0x10 \n"
495 " BL sub_FF0CC3B8 \n"
496 " B loc_FF0CC4F8 \n"
497
498 "loc_FF0CC56C:\n"
499 " CMP R1, #0x2C \n"
500 " BNE loc_FF0CC584 \n"
501 " BL sub_FF0B7938 \n"
502 " BL sub_FF0B8624 \n"
503 " BL sub_FF0B8188 \n"
504 " B loc_FF0CC4F8 \n"
505
506 "loc_FF0CC584:\n"
507 " CMP R1, #0x2D \n"
508 " BNE loc_FF0CC5D4 \n"
509 " LDR R0, [R6, #0x1C] \n"
510 " MOV R1, #4 \n"
511 " BL sub_FF088B80 /*_ClearEventFlag*/ \n"
512 " LDR R1, =0xFF0C746C \n"
513 " LDR R0, =0xFFFFF400 \n"
514 " MOV R2, #4 \n"
515 " BL sub_FF0B7388 \n"
516 " BL sub_FF0B7618 \n"
517 " LDR R0, [R6, #0x1C] \n"
518 " MOV R2, R7 \n"
519 " MOV R1, #4 \n"
520 " BL sub_FF0889A8 /*_WaitForAnyEventFlag*/ \n"
521 " TST R0, #1 \n"
522 " BEQ loc_FF0CC4F8 \n"
523 " LDR R1, =0x1530 \n"
524
525 "loc_FF0CC5C8:\n"
526 " LDR R0, =0xFF0C7BFC /*'ExpDrv.c'*/ \n"
527 " BL _DebugAssert \n"
528 " B loc_FF0CC4F8 \n"
529
530 "loc_FF0CC5D4:\n"
531 " LDR R0, [SP, #0x20] \n"
532 " MOV R8, #1 \n"
533 " LDR R1, [R0] \n"
534 " CMP R1, #0x12 \n"
535 " CMPNE R1, #0x13 \n"
536 " BNE loc_FF0CC63C \n"
537 " LDR R1, [R0, #0x7C] \n"
538 " ADD R1, R1, R1, LSL#1 \n"
539 " ADD R1, R0, R1, LSL#2 \n"
540 " SUB R1, R1, #8 \n"
541 " LDMIA R1, {R2,R3,R9} \n"
542 " STMIA R5, {R2,R3,R9} \n"
543 " BL sub_FF0CA634 \n"
544 " LDR R0, [SP, #0x20] \n"
545 " LDR R1, [R0, #0x7C] \n"
546 " LDR R3, [R0, #0x8C] \n"
547 " LDR R2, [R0, #0x90] \n"
548 " ADD R0, R0, #4 \n"
549 " BLX R3 \n"
550 " LDR R0, [SP, #0x20] \n"
551 " BL sub_FF0CDC48 \n"
552 " LDR R0, [SP, #0x20] \n"
553 " LDR R1, [R0, #0x7C] \n"
554 " LDR R2, [R0, #0x98] \n"
555 " LDR R3, [R0, #0x94] \n"
556 " B loc_FF0CC950 \n"
557
558 "loc_FF0CC63C:\n"
559 " CMP R1, #0x14 \n"
560 " CMPNE R1, #0x15 \n"
561 " CMPNE R1, #0x16 \n"
562 " CMPNE R1, #0x17 \n"
563 " BNE loc_FF0CC6F4 \n"
564 " ADD R3, SP, #0x10 \n"
565 " ADD R2, SP, #4 \n"
566 " ADD R1, SP, #0x14 \n"
567 " BL sub_FF0CA89C \n"
568 " CMP R0, #1 \n"
569 " MOV R9, R0 \n"
570 " CMPNE R9, #5 \n"
571 " BNE loc_FF0CC690 \n"
572 " LDR R0, [SP, #0x20] \n"
573 " MOV R2, R9 \n"
574 " LDR R1, [R0, #0x7C]! \n"
575 " LDR R12, [R0, #0x10]! \n"
576 " LDR R3, [R0, #4] \n"
577 " ADD R0, SP, #4 \n"
578 " BLX R12 \n"
579 " B loc_FF0CC6C8 \n"
580
581 "loc_FF0CC690:\n"
582 " LDR R0, [SP, #0x20] \n"
583 " CMP R9, #2 \n"
584 " LDR R3, [R0, #0x90] \n"
585 " CMPNE R9, #6 \n"
586 " BNE loc_FF0CC6DC \n"
587 " LDR R12, [R0, #0x8C] \n"
588 " MOV R2, R9 \n"
589 " MOV R1, #1 \n"
590 " ADD R0, SP, #4 \n"
591 " BLX R12 \n"
592 " LDR R0, [SP, #0x20] \n"
593 " ADD R2, SP, #4 \n"
594 " ADD R1, SP, #0x14 \n"
595 " BL sub_FF0CC104 \n"
596
597 "loc_FF0CC6C8:\n"
598 " LDR R0, [SP, #0x20] \n"
599 " LDR R2, [SP, #0x10] \n"
600 " MOV R1, R9 \n"
601 " BL sub_FF0CC358 \n"
602 " B loc_FF0CC958 \n"
603
604 "loc_FF0CC6DC:\n"
605 " LDR R1, [R0, #0x7C] \n"
606 " LDR R12, [R0, #0x8C] \n"
607 " MOV R2, R9 \n"
608 " ADD R0, R0, #4 \n"
609 " BLX R12 \n"
610 " B loc_FF0CC958 \n"
611
612 "loc_FF0CC6F4:\n"
613 " CMP R1, #0x23 \n"
614 " CMPNE R1, #0x24 \n"
615 " BNE loc_FF0CC740 \n"
616 " LDR R1, [R0, #0x7C] \n"
617 " ADD R1, R1, R1, LSL#1 \n"
618 " ADD R1, R0, R1, LSL#2 \n"
619 " SUB R1, R1, #8 \n"
620 " LDMIA R1, {R2,R3,R9} \n"
621 " STMIA R5, {R2,R3,R9} \n"
622 " BL sub_FF0C938C \n"
623 " LDR R0, [SP, #0x20] \n"
624 " LDR R1, [R0, #0x7C] \n"
625 " LDR R3, [R0, #0x8C] \n"
626 " LDR R2, [R0, #0x90] \n"
627 " ADD R0, R0, #4 \n"
628 " BLX R3 \n"
629 " LDR R0, [SP, #0x20] \n"
630 " BL sub_FF0C9880 \n"
631 " B loc_FF0CC958 \n"
632
633 "loc_FF0CC740:\n"
634 " ADD R1, R0, #4 \n"
635 " LDMIA R1, {R2,R3,R9} \n"
636 " STMIA R5, {R2,R3,R9} \n"
637 " LDR R1, [R0] \n"
638 " CMP R1, #0x27 \n"
639 " ADDCC PC, PC, R1, LSL#2 \n"
640 " B loc_FF0CC940 \n"
641 " B loc_FF0CC7F8 \n"
642 " B loc_FF0CC7F8 \n"
643 " B loc_FF0CC800 \n"
644 " B loc_FF0CC808 \n"
645 " B loc_FF0CC808 \n"
646 " B loc_FF0CC808 \n"
647 " B loc_FF0CC7F8 \n"
648 " B loc_FF0CC800 \n"
649 " B loc_FF0CC808 \n"
650 " B loc_FF0CC808 \n"
651 " B loc_FF0CC820 \n"
652 " B loc_FF0CC820 \n"
653 " B loc_FF0CC92C \n"
654 " B loc_FF0CC934 \n"
655 " B loc_FF0CC934 \n"
656 " B loc_FF0CC934 \n"
657 " B loc_FF0CC934 \n"
658 " B loc_FF0CC93C \n"
659 " B loc_FF0CC940 \n"
660 " B loc_FF0CC940 \n"
661 " B loc_FF0CC940 \n"
662 " B loc_FF0CC940 \n"
663 " B loc_FF0CC940 \n"
664 " B loc_FF0CC940 \n"
665 " B loc_FF0CC810 \n"
666 " B loc_FF0CC818 \n"
667 " B loc_FF0CC818 \n"
668 " B loc_FF0CC82C \n"
669 " B loc_FF0CC82C \n"
670 " B loc_FF0CC834 \n"
671 " B loc_FF0CC86C \n"
672 " B loc_FF0CC8A4 \n"
673 " B loc_FF0CC8DC \n"
674 " B loc_FF0CC914 \n"
675 " B loc_FF0CC914 \n"
676 " B loc_FF0CC940 \n"
677 " B loc_FF0CC940 \n"
678 " B loc_FF0CC91C \n"
679 " B loc_FF0CC924 \n"
680
681 "loc_FF0CC7F8:\n"
682 " BL sub_FF0C7A30 \n"
683 " B loc_FF0CC940 \n"
684
685 "loc_FF0CC800:\n"
686 " BL sub_FF0C7D28 \n"
687 " B loc_FF0CC940 \n"
688
689 "loc_FF0CC808:\n"
690 " BL sub_FF0C7F90 \n"
691 " B loc_FF0CC940 \n"
692
693 "loc_FF0CC810:\n"
694 " BL sub_FF0C8284 \n"
695 " B loc_FF0CC940 \n"
696
697 "loc_FF0CC818:\n"
698 " BL sub_FF0C849C \n"
699 " B loc_FF0CC940 \n"
700
701 "loc_FF0CC820:\n"
702 " BL sub_FF0C8958_my \n"
703 " MOV R8, #0 \n"
704 " B loc_FF0CC940 \n"
705
706 "loc_FF0CC82C:\n"
707 " BL sub_FF0C8B3C \n"
708 " B loc_FF0CC940 \n"
709
710 "loc_FF0CC834:\n"
711 " LDRH R1, [R0, #4] \n"
712 " STRH R1, [SP, #0x14] \n"
713 " LDRH R1, [R4, #2] \n"
714 " STRH R1, [SP, #0x16] \n"
715 " LDRH R1, [R4, #4] \n"
716 " STRH R1, [SP, #0x18] \n"
717 " LDRH R1, [R4, #6] \n"
718 " STRH R1, [SP, #0x1A] \n"
719 " LDRH R1, [R0, #0xC] \n"
720 " STRH R1, [SP, #0x1C] \n"
721 " LDRH R1, [R4, #0xA] \n"
722 " STRH R1, [SP, #0x1E] \n"
723 " BL sub_FF0CD8D0 \n"
724 " B loc_FF0CC940 \n"
725
726 "loc_FF0CC86C:\n"
727 " LDRH R1, [R0, #4] \n"
728 " STRH R1, [SP, #0x14] \n"
729 " LDRH R1, [R4, #2] \n"
730 " STRH R1, [SP, #0x16] \n"
731 " LDRH R1, [R4, #4] \n"
732 " STRH R1, [SP, #0x18] \n"
733 " LDRH R1, [R4, #6] \n"
734 " STRH R1, [SP, #0x1A] \n"
735 " LDRH R1, [R4, #8] \n"
736 " STRH R1, [SP, #0x1C] \n"
737 " LDRH R1, [R4, #0xA] \n"
738 " STRH R1, [SP, #0x1E] \n"
739 " BL sub_FF0CDA48 \n"
740 " B loc_FF0CC940 \n"
741
742 "loc_FF0CC8A4:\n"
743 " LDRH R1, [R4] \n"
744 " STRH R1, [SP, #0x14] \n"
745 " LDRH R1, [R0, #6] \n"
746 " STRH R1, [SP, #0x16] \n"
747 " LDRH R1, [R4, #4] \n"
748 " STRH R1, [SP, #0x18] \n"
749 " LDRH R1, [R4, #6] \n"
750 " STRH R1, [SP, #0x1A] \n"
751 " LDRH R1, [R4, #8] \n"
752 " STRH R1, [SP, #0x1C] \n"
753 " LDRH R1, [R4, #0xA] \n"
754 " STRH R1, [SP, #0x1E] \n"
755 " BL sub_FF0CDAFC \n"
756 " B loc_FF0CC940 \n"
757
758 "loc_FF0CC8DC:\n"
759 " LDRH R1, [R4] \n"
760 " STRH R1, [SP, #0x14] \n"
761 " LDRH R1, [R4, #2] \n"
762 " STRH R1, [SP, #0x16] \n"
763 " LDRH R1, [R4, #4] \n"
764 " STRH R1, [SP, #0x18] \n"
765 " LDRH R1, [R4, #6] \n"
766 " STRH R1, [SP, #0x1A] \n"
767 " LDRH R1, [R0, #0xC] \n"
768 " STRH R1, [SP, #0x1C] \n"
769 " LDRH R1, [R4, #0xA] \n"
770 " STRH R1, [SP, #0x1E] \n"
771 " BL sub_FF0CDBA4 \n"
772 " B loc_FF0CC940 \n"
773
774 "loc_FF0CC914:\n"
775 " BL sub_FF0C9124 \n"
776 " B loc_FF0CC940 \n"
777
778 "loc_FF0CC91C:\n"
779 " BL sub_FF0C9984 \n"
780 " B loc_FF0CC940 \n"
781
782 "loc_FF0CC924:\n"
783 " BL sub_FF0C9EDC \n"
784 " B loc_FF0CC940 \n"
785
786 "loc_FF0CC92C:\n"
787 " BL sub_FF0CA100 \n"
788 " B loc_FF0CC940 \n"
789
790 "loc_FF0CC934:\n"
791 " BL sub_FF0CA2BC \n"
792 " B loc_FF0CC940 \n"
793
794 "loc_FF0CC93C:\n"
795 " BL sub_FF0CA42C \n"
796
797 "loc_FF0CC940:\n"
798 " LDR R0, [SP, #0x20] \n"
799 " LDR R1, [R0, #0x7C] \n"
800 " LDR R2, [R0, #0x90] \n"
801 " LDR R3, [R0, #0x8C] \n"
802
803 "loc_FF0CC950:\n"
804 " ADD R0, R0, #4 \n"
805 " BLX R3 \n"
806
807 "loc_FF0CC958:\n"
808 " LDR R1, [SP, #0x20] \n"
809 " LDR R0, [R1] \n"
810 " CMP R0, #0x10 \n"
811 " BEQ loc_FF0CC990 \n"
812 " BGT loc_FF0CC980 \n"
813 " CMP R0, #1 \n"
814 " CMPNE R0, #4 \n"
815 " CMPNE R0, #0xE \n"
816 " BNE loc_FF0CC9A0 \n"
817 " B loc_FF0CC990 \n"
818
819 "loc_FF0CC980:\n"
820 " CMP R0, #0x13 \n"
821 " CMPNE R0, #0x17 \n"
822 " CMPNE R0, #0x1A \n"
823 " BNE loc_FF0CC9A0 \n"
824
825 "loc_FF0CC990:\n"
826 " LDRH R0, [R4] \n"
827 " STRH R0, [SP, #0x14] \n"
828 " LDRH R0, [R4, #8] \n"
829 " STRH R0, [SP, #0x1C] \n"
830
831 "loc_FF0CC9A0:\n"
832 " CMP R8, #1 \n"
833 " BNE loc_FF0CC9EC \n"
834 " LDR R0, [R1, #0x7C] \n"
835 " MOV R2, #0xC \n"
836 " ADD R0, R0, R0, LSL#1 \n"
837 " ADD R0, R1, R0, LSL#2 \n"
838 " SUB R8, R0, #8 \n"
839 " LDR R0, =0x5CDA0 \n"
840 " ADD R1, SP, #0x14 \n"
841 " BL sub_FF42FA58 \n"
842 " LDR R0, =0x5CDAC \n"
843 " MOV R2, #0xC \n"
844 " ADD R1, SP, #0x14 \n"
845 " BL sub_FF42FA58 \n"
846 " LDR R0, =0x5CDB8 \n"
847 " MOV R2, #0xC \n"
848 " MOV R1, R8 \n"
849 " BL sub_FF42FA58 \n"
850 " B loc_FF0CCA64 \n"
851
852 "loc_FF0CC9EC:\n"
853 " LDR R0, [R1] \n"
854 " MOV R3, #1 \n"
855 " CMP R0, #0xB \n"
856 " BNE loc_FF0CCA30 \n"
857 " MOV R2, #0 \n"
858 " STRD R2, [SP] \n"
859 " MOV R2, R3 \n"
860 " MOV R1, R3 \n"
861 " MOV R0, #0 \n"
862 " BL sub_FF0C7804 \n"
863 " MOV R3, #1 \n"
864 " MOV R2, #0 \n"
865 " STRD R2, [SP] \n"
866 " MOV R2, R3 \n"
867 " MOV R1, R3 \n"
868 " MOV R0, #0 \n"
869 " B loc_FF0CCA60 \n"
870
871 "loc_FF0CCA30:\n"
872 " MOV R2, #1 \n"
873 " STRD R2, [SP] \n"
874 " MOV R3, R2 \n"
875 " MOV R1, R2 \n"
876 " MOV R0, R2 \n"
877 " BL sub_FF0C7804 \n"
878 " MOV R3, #1 \n"
879 " MOV R2, R3 \n"
880 " MOV R1, R3 \n"
881 " MOV R0, R3 \n"
882 " STR R3, [SP] \n"
883 " STR R3, [SP, #4] \n"
884
885 "loc_FF0CCA60:\n"
886 " BL sub_FF0C797C \n"
887
888 "loc_FF0CCA64:\n"
889 " LDR R0, [SP, #0x20] \n"
890 " BL sub_FF0CD83C \n"
891 " B loc_FF0CC428 \n"
892 );
893 }
894
895
896
897 void __attribute__((naked,noinline)) sub_FF0C8958_my() {
898 asm volatile (
899 " STMFD SP!, {R4-R8,LR} \n"
900 " LDR R7, =0x4BF0 \n"
901 " MOV R4, R0 \n"
902 " LDR R0, [R7, #0x1C] \n"
903 " MOV R1, #0x3E \n"
904 " BL sub_FF088B80 /*_ClearEventFlag*/ \n"
905 " MOV R2, #0 \n"
906 " LDRSH R0, [R4, #4] \n"
907 " MOV R1, R2 \n"
908 " BL sub_FF0C74CC \n"
909 " MOV R5, R0 \n"
910 " LDRSH R0, [R4, #6] \n"
911 " BL sub_FF0C761C \n"
912 " LDRSH R0, [R4, #8] \n"
913 " BL sub_FF0C7674 \n"
914 " LDRSH R0, [R4, #0xA] \n"
915 " BL sub_FF0C76CC \n"
916 " LDRSH R0, [R4, #0xC] \n"
917 " MOV R1, #0 \n"
918 " BL sub_FF0C7724 \n"
919 " MOV R6, R0 \n"
920 " LDRSH R0, [R4, #0xE] \n"
921 " BL sub_FF0CD86C \n"
922 " LDR R0, [R4] \n"
923 " LDR R8, =0x5CDB8 \n"
924 " CMP R0, #0xB \n"
925 " MOVEQ R5, #0 \n"
926 " MOVEQ R6, R5 \n"
927 " BEQ loc_FF0C89F4 \n"
928 " CMP R5, #1 \n"
929 " BNE loc_FF0C89F4 \n"
930 " LDRSH R0, [R4, #4] \n"
931 " LDR R1, =0xFF0C742C \n"
932 " MOV R2, #2 \n"
933 " BL sub_FF1BDB08 \n"
934 " STRH R0, [R4, #4] \n"
935 " MOV R0, #0 \n"
936 " STR R0, [R7, #0x28] \n"
937 " B loc_FF0C89FC \n"
938
939 "loc_FF0C89F4:\n"
940 " LDRH R0, [R8] \n"
941 " STRH R0, [R4, #4] \n"
942
943 "loc_FF0C89FC:\n"
944 " CMP R6, #1 \n"
945 " LDRNEH R0, [R8, #8] \n"
946 " BNE loc_FF0C8A18 \n"
947 " LDRSH R0, [R4, #0xC] \n"
948 " LDR R1, =0xFF0C74B0 \n"
949 " MOV R2, #0x20 \n"
950 " BL sub_FF0CD88C \n"
951
952 "loc_FF0C8A18:\n"
953 " STRH R0, [R4, #0xC] \n"
954 " LDRSH R0, [R4, #6] \n"
955 " BL sub_FF0B7684_my \n"
956 " LDR PC, =0xFF0C8A24 \n"
957 );
958 }
959
960
961
962 void __attribute__((naked,noinline)) sub_FF0B7684_my() {
963 asm volatile (
964 " STMFD SP!, {R4-R6,LR} \n"
965 " LDR R5, =0x4898 \n"
966 " MOV R4, R0 \n"
967 " LDR R0, [R5, #4] \n"
968 " CMP R0, #1 \n"
969 " LDRNE R1, =0x14D \n"
970 " LDRNE R0, =0xFF0B74BC /*'Shutter.c'*/ \n"
971 " BLNE _DebugAssert \n"
972 " CMN R4, #0xC00 \n"
973 " LDREQSH R4, [R5, #2] \n"
974 " CMN R4, #0xC00 \n"
975 " LDREQ R1, =0x153 \n"
976 " LDREQ R0, =0xFF0B74BC /*'Shutter.c'*/ \n"
977 " STRH R4, [R5, #2] \n"
978 " BLEQ _DebugAssert \n"
979 " MOV R0, R4 \n"
980 " BL apex2us \n"
981 " LDR PC, =0xFF0B76C8 \n"
982 );
983 }