root/platform/sx150is/sub/100a/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. boot
  3. sub_FF810358_my
  4. sub_FF8111B0_my
  5. sub_FF815F2C_my
  6. sub_FF81FD8C_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. spytask
  10. CreateTask_spytask
  11. CreateTask_PhySw
  12. init_file_modules_task
  13. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 //#include "stdlib.h"
   5 #include "dryos31.h"
   6 
   7 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
   8 
   9 const char * const new_sa = &_end;
  10 
  11 
  12 // Forward declarations
  13 void CreateTask_PhySw();
  14 void CreateTask_spytask();
  15 extern volatile int jogdial_stopped;
  16 void JogDial_task_my(void);
  17 
  18 /*----------------------------------------------------------------------
  19         taskCreateHook()
  20 -----------------------------------------------------------------------*/
  21 
  22 extern void task_CaptSeq();
  23 extern void task_InitFileModules();
  24 extern void task_RotaryEncoder();
  25 extern void task_MovieRecord();
  26 extern void task_ExpDrv();
  27 
  28 void taskCreateHook(context_t **context) { 
  29         task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  30 
  31         // Replace firmware task addresses with ours
  32         if(tcb->entry == (void*)task_CaptSeq)                   tcb->entry = (void*)capt_seq_task; 
  33         if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  34         if(tcb->entry == (void*)task_RotaryEncoder)             tcb->entry = (void*)JogDial_task_my;
  35         if(tcb->entry == (void*)task_MovieRecord)               tcb->entry = (void*)movie_record_task;
  36         if(tcb->entry == (void*)task_ExpDrv)                    tcb->entry = (void*)exp_drv_task;
  37 }
  38 
  39 /*----------------------------------------------------------------------
  40         boot()
  41 
  42         Main entry point for the CHDK code
  43 -----------------------------------------------------------------------*/
  44 void __attribute__((naked,noinline)) boot()
  45 {
  46 asm volatile (
  47 "       LDR     R1, =0xC0410000 \n"                  
  48 "       MOV     R0, #0 \n"                           
  49 "       STR     R0, [R1] \n"                         
  50 "       MOV     R1, #0x78 \n"                        
  51 "       MCR     p15, 0, R1, c1, c0 \n"               
  52 "       MOV     R1, #0 \n"                           
  53 "       MCR     p15, 0, R1, c7, c10, 4 \n"           
  54 "       MCR     p15, 0, R1, c7, c5 \n"               
  55 "       MCR     p15, 0, R1, c7, c6 \n"               
  56 "       MOV     R0, #0x3D \n"                        
  57 "       MCR     p15, 0, R0, c6, c0 \n"               
  58 "       MOV     R0, #0xC000002F \n"                  
  59 "       MCR     p15, 0, R0, c6, c1 \n"               
  60 "       MOV     R0, #0x33 \n"                        
  61 "       MCR     p15, 0, R0, c6, c2 \n"               
  62 "       MOV     R0, #0x40000033 \n"                  
  63 "       MCR     p15, 0, R0, c6, c3 \n"               
  64 "       MOV     R0, #0x80000017 \n"                  
  65 "       MCR     p15, 0, R0, c6, c4 \n"               
  66 "       LDR     R0, =0xFF80002D \n"                  
  67 "       MCR     p15, 0, R0, c6, c5 \n"               
  68 "       MOV     R0, #0x34 \n"                        
  69 "       MCR     p15, 0, R0, c2, c0 \n"               
  70 "       MOV     R0, #0x34 \n"                        
  71 "       MCR     p15, 0, R0, c2, c0, 1 \n"            
  72 "       MOV     R0, #0x34 \n"                        
  73 "       MCR     p15, 0, R0, c3, c0 \n"               
  74 "       LDR     R0, =0x3333330 \n"                   
  75 "       MCR     p15, 0, R0, c5, c0, 2 \n"            
  76 "       LDR     R0, =0x3333330 \n"                   
  77 "       MCR     p15, 0, R0, c5, c0, 3 \n"            
  78 "       MRC     p15, 0, R0, c1, c0 \n"               
  79 "       ORR     R0, R0, #0x1000 \n"                  
  80 "       ORR     R0, R0, #4 \n"                       
  81 "       ORR     R0, R0, #1 \n"                       
  82 "       MCR     p15, 0, R0, c1, c0 \n"               
  83 "       MOV     R1, #0x80000006 \n"                  
  84 "       MCR     p15, 0, R1, c9, c1 \n"               
  85 "       MOV     R1, #6 \n"                           
  86 "       MCR     p15, 0, R1, c9, c1, 1 \n"            
  87 "       MRC     p15, 0, R1, c1, c0 \n"               
  88 "       ORR     R1, R1, #0x50000 \n"                 
  89 "       MCR     p15, 0, R1, c1, c0 \n"               
  90 "       LDR     R2, =0xC0200000 \n"                  
  91 "       MOV     R1, #1 \n"                           
  92 "       STR     R1, [R2, #0x10C] \n"                 
  93 "       MOV     R1, #0xFF \n"                        
  94 "       STR     R1, [R2, #0xC] \n"                   
  95 "       STR     R1, [R2, #0x1C] \n"                  
  96 "       STR     R1, [R2, #0x2C] \n"                  
  97 "       STR     R1, [R2, #0x3C] \n"                  
  98 "       STR     R1, [R2, #0x4C] \n"                  
  99 "       STR     R1, [R2, #0x5C] \n"                  
 100 "       STR     R1, [R2, #0x6C] \n"                  
 101 "       STR     R1, [R2, #0x7C] \n"                  
 102 "       STR     R1, [R2, #0x8C] \n"                  
 103 "       STR     R1, [R2, #0x9C] \n"                  
 104 "       STR     R1, [R2, #0xAC] \n"                  
 105 "       STR     R1, [R2, #0xBC] \n"                  
 106 "       STR     R1, [R2, #0xCC] \n"                  
 107 "       STR     R1, [R2, #0xDC] \n"                  
 108 "       STR     R1, [R2, #0xEC] \n"                  
 109 "       STR     R1, [R2, #0xFC] \n"                  
 110 "       LDR     R1, =0xC0400008 \n"                  
 111 "       LDR     R2, =0x430005 \n"                    
 112 "       STR     R2, [R1] \n"                         
 113 "       MOV     R1, #1 \n"                           
 114 "       LDR     R2, =0xC0243100 \n"                  
 115 "       STR     R2, [R1] \n"                         
 116 "       LDR     R2, =0xC0242010 \n"                  
 117 "       LDR     R1, [R2] \n"                         
 118 "       ORR     R1, R1, #1 \n"                       
 119 "       STR     R1, [R2] \n"                         
 120 "       LDR     R0, =0xFFC73A58 \n"                  
 121 "       LDR     R1, =0x1900 \n"                      
 122 "       LDR     R3, =0xFA30 \n"                      
 123 "loc_FF81013C:\n"
 124 "       CMP     R1, R3 \n"                           
 125 "       LDRCC   R2, [R0], #4 \n"                   
 126 "       STRCC   R2, [R1], #4 \n"                   
 127 "       BCC     loc_FF81013C \n"                     
 128 "       LDR     R1, =0x175CE0 \n"                    
 129 "       MOV     R2, #0 \n"                           
 130 "loc_FF810154:\n"
 131 "       CMP     R3, R1 \n"                           
 132 "       STRCC   R2, [R3], #4 \n"                   
 133 "       BCC     loc_FF810154 \n"                     
 134 //"     B       sub_FF810358 \n"                       
 135 "       B       sub_FF810358_my \n"             // patched --------------->             
 136                 
 137     );
 138 }
 139 
 140 
 141 //** sub_FF810358_my  @ 0xFF810358 
 142 void __attribute__((naked,noinline)) sub_FF810358_my() {
 143 
 144         // SX150
 145     *(int*)0x1938 = (int)taskCreateHook;
 146     *(int*)0x193C = (int)taskCreateHook;
 147 
 148         // SX150 @FF864BEC
 149         // fix for correct power-on
 150         // must also comment out function in taskcreate_Startup_my
 151         if ((*(int*) 0xC0220114) & 1)                   // look at power switch
 152                 *(int*)(0x25A0) = 0x200000;             // start in rec mode    
 153         else
 154                 *(int*)(0x25A0) = 0x100000;             // start in play mode
 155 
 156         asm volatile (
 157         
 158 "       LDR     R0, =0xFF8103D0 \n"                  
 159 "       MOV     R1, #0 \n"                           
 160 "       LDR     R3, =0xFF810408 \n"                  
 161 "loc_FF810364:\n"
 162 "       CMP     R0, R3 \n"                           
 163 "       LDRCC   R2, [R0], #4 \n"                   
 164 "       STRCC   R2, [R1], #4 \n"                   
 165 "       BCC     loc_FF810364 \n"                     
 166 "       LDR     R0, =0xFF810408 \n"                  
 167 "       MOV     R1, #0x4B0 \n"                       
 168 "       LDR     R3, =0xFF81061C \n"                  
 169 "loc_FF810380:\n"
 170 "       CMP     R0, R3 \n"                           
 171 "       LDRCC   R2, [R0], #4 \n"                   
 172 "       STRCC   R2, [R1], #4 \n"                   
 173 "       BCC     loc_FF810380 \n"                     
 174 "       MOV     R0, #0xD2 \n"                        
 175 "       MSR     CPSR_cxsf, R0 \n"                    
 176 "       MOV     SP, #0x1000 \n"                      
 177 "       MOV     R0, #0xD3 \n"                        
 178 "       MSR     CPSR_cxsf, R0 \n"                    
 179 "       MOV     SP, #0x1000 \n"                      
 180 "       LDR     R0, =0x6C4 \n"                       
 181 "       LDR     R2, =0xEEEEEEEE \n"                  
 182 "       MOV     R3, #0x1000 \n"                      
 183 "loc_FF8103B4:\n"
 184 "       CMP     R0, R3 \n"                           
 185 "       STRCC   R2, [R0], #4 \n"                   
 186 "       BCC     loc_FF8103B4 \n"                     
 187 //"     BL      sub_FF8111B0 \n"                      
 188 "       BL      sub_FF8111B0_my \n"             // patched  ------------->
 189   );
 190 }
 191 
 192 
 193 void __attribute__((naked,noinline)) sub_FF8111B0_my() {
 194 
 195         asm volatile (
 196 "       STR     LR, [SP, #-4]! \n"                   
 197 "       SUB     SP, SP, #0x74 \n"                    
 198 "       MOV     R1, #0x74 \n"                        
 199 "       MOV     R0, SP \n"                           
 200 "       BL      sub_FFB8BA64 \n"                      
 201 "       MOV     R0, #0x57000 \n"                     
 202 "       STR     R0, [SP, #4] \n"                     
 203 
 204 #if defined(CHDK_NOT_IN_CANON_HEAP)
 205                "LDR     R0, =0x175CE0\n" // use original heap offset since CHDK is loaded in high memory
 206 #else
 207                "LDR     R0, =new_sa\n"   // otherwise use patched value
 208                "LDR     R0, [R0]\n"      //
 209 #endif
 210 //"     LDR     R0, =0x175CE0 \n"                    
 211 
 212 "       LDR     R2, =0x2EDAD0 \n"                    
 213 "       STR     R0, [SP, #8] \n"                     
 214 "       SUB     R0, R2, R0 \n"                       
 215 "       STR     R0, [SP, #0xC] \n"                   
 216 "       MOV     R0, #0x22 \n"                        
 217 "       STR     R0, [SP, #0x18] \n"                  
 218 "       MOV     R0, #0x68 \n"                        
 219 "       STR     R0, [SP, #0x1C] \n"                  
 220 "       LDR     R1, =0x2F5C00 \n"                    
 221 "       LDR     R0, =0x1CD \n"                       
 222 "       STR     R1, [SP] \n"                         
 223 "       STR     R0, [SP, #0x20] \n"                  
 224 "       MOV     R0, #0x96 \n"                        
 225 "       STR     R2, [SP, #0x10] \n"                  
 226 "       STR     R1, [SP, #0x14] \n"                  
 227 "       STR     R0, [SP, #0x24] \n"                  
 228 "       STR     R0, [SP, #0x28] \n"                  
 229 "       MOV     R0, #0x64 \n"                        
 230 "       STR     R0, [SP, #0x2C] \n"                  
 231 "       MOV     R0, #0 \n"                           
 232 "       STR     R0, [SP, #0x30] \n"                  
 233 "       STR     R0, [SP, #0x34] \n"                  
 234 "       MOV     R0, #0x10 \n"                        
 235 "       STR     R0, [SP, #0x5C] \n"                  
 236 "       MOV     R0, #0x800 \n"                       
 237 "       STR     R0, [SP, #0x60] \n"                  
 238 "       MOV     R0, #0xA0 \n"                        
 239 "       STR     R0, [SP, #0x64] \n"                  
 240 "       MOV     R0, #0x280 \n"                       
 241 "       STR     R0, [SP, #0x68] \n"                  
 242 //"     LDR     R1, =0xFF815F2C \n"                  
 243 "               LDR     R1, =sub_FF815F2C_my \n"        // patched -------------->
 244 
 245 "               B       sub_FF81124C \n "               // Return to firmware ----------->
 246 
 247         );
 248 
 249 }
 250 
 251 //** sub_FF815F2C_my  @ 0xFF815F2C
 252 void __attribute__((naked,noinline)) sub_FF815F2C_my() {
 253         asm volatile (
 254 
 255 "       STMFD   SP!, {R4,LR} \n"                   
 256 "       BL      sub_FF810B28 \n"                      
 257 "       BL      sub_FF81A384 \n"                      
 258 "       CMP     R0, #0 \n"                           
 259 "       LDRLT   R0, =0xFF816040 \n"                
 260 "       BLLT    sub_FF816020 \n"                    
 261 "       BL      sub_FF815B64 \n"                      
 262 "       CMP     R0, #0 \n"                           
 263 "       LDRLT   R0, =0xFF816048 \n"                
 264 "       BLLT    sub_FF816020 \n"                    
 265 "       LDR     R0, =0xFF816058 \n"                  
 266 "       BL      sub_FF815C4C \n"                      
 267 "       CMP     R0, #0 \n"                           
 268 "       LDRLT   R0, =0xFF816060 \n"                
 269 "       BLLT    sub_FF816020 \n"                    
 270 "       LDR     R0, =0xFF816058 \n"                  
 271 "       BL      sub_FF813CA8 \n"                      
 272 "       CMP     R0, #0 \n"                           
 273 "       LDRLT   R0, =0xFF816074 \n"                
 274 "       BLLT    sub_FF816020 \n"                    
 275 "       BL      sub_FF819CEC \n"                      
 276 "       CMP     R0, #0 \n"                           
 277 "       LDRLT   R0, =0xFF816080 \n"                
 278 "       BLLT    sub_FF816020 \n"                    
 279 "       BL      sub_FF811690 \n"                      
 280 "       CMP     R0, #0 \n"                           
 281 "       LDRLT   R0, =0xFF81608C \n"                
 282 "       BLLT    sub_FF816020 \n"                    
 283 "       LDMFD   SP!, {R4,LR} \n"                   
 284 //"     B       taskcreate_Startup_my \n"       //patched
 285 "       B       sub_FF81FD8C_my\n"              //patched
 286         
 287         );
 288 }
 289 
 290 void __attribute__((naked,noinline)) sub_FF81FD8C_my(  ) {
 291 asm volatile (
 292 "       STMFD   SP!, {R4,LR} \n"                   
 293 //"     BL      sub_FF8342BC \n"                      
 294 //"     BL      sub_FF81FDA0 \n"                      
 295 "       BL      taskcreate_Startup_my \n"       //patched
 296 "       MOV     R0, #0 \n"                           
 297 "       LDMFD   SP!, {R4,PC} \n"                   
 298         );
 299 }
 300 
 301 //** taskcreate_Startup_my  @ 0xFF81FDA0
 302 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 303 
 304     asm volatile (
 305 "       STMFD   SP!, {R3-R9,LR} \n"                
 306 "       MOV     R6, #0 \n"                           
 307 "       BL      sub_FF83C678 \n"                      
 308 "       LDR     R9, =0xC0220000 \n"                  
 309 "       MOVS    R7, R0 \n"                          
 310 "       MOV     R8, #1 \n"                           
 311 "       BNE     loc_FF81FE04 \n"                     
 312 "       BL      sub_FF835C90 \n"                      
 313 "       CMP     R0, #0 \n"                           
 314 "       BEQ     loc_FF81FE04 \n"                     
 315 "       LDR     R0, [R9, #0x118] \n"                 
 316 "       BIC     R5, R8, R0 \n"                       
 317 "       LDR     R0, [R9, #0x114] \n"                 
 318 "       BIC     R4, R8, R0 \n"                       
 319 "       BL      sub_FF83354C \n"                      
 320 "       CMP     R0, #1 \n"                           
 321 "       MOVEQ   R6, #1 \n"                         
 322 "       ORR     R0, R4, R5 \n"                       
 323 "       ORRS    R0, R0, R6 \n"                      
 324 "       BNE     loc_FF81FE14 \n"                     
 325 "       BL      sub_FF8338B4 \n"                      
 326 "       MOV     R0, #0x44 \n"                        
 327 "       STR     R0, [R9, #0x1C] \n"                  
 328 "       BL      sub_FF833AA4 \n"                      
 329 "loc_FF81FE00:\n"
 330 "       B       loc_FF81FE00 \n"                       
 331 "loc_FF81FE04:\n"
 332 "       LDR     R0, [R9, #0x114] \n"                 
 333 "       BIC     R4, R8, R0 \n"                       
 334 "       LDR     R0, [R9, #0x118] \n"                 
 335 "       BIC     R5, R8, R0 \n"                       
 336 "loc_FF81FE14:\n"
 337 "       MOV     R3, R6 \n"                           
 338 "       MOV     R2, R7 \n"                           
 339 "       MOV     R1, R5 \n"                           
 340 "       MOV     R0, R4 \n"                           
 341 //"     BL      sub_FF8342C4 \n" // remove for correct power on (hold pwr button for rec)
 342 "       BL      sub_FF8342C0 \n"                      
 343 "       BL      sub_FF83A844 \n"                      
 344 "       LDR     R1, =0x34E000 \n"                    
 345 "       MOV     R0, #0 \n"                           
 346 "       BL      sub_FF83ACB4 \n"                      
 347 "       BL      sub_FF83AA5C \n"                      
 348 "       MOV     R3, #0 \n"                           
 349 "       STR     R3, [SP] \n"                         
 350 
 351 //"     LDR     R3, =0xFF81FD28 \n"                  
 352 "       LDR     R3, =task_Startup_my \n"        // Patched ----------->
 353 
 354 "               B       sub_FF81FE4C \n"                // Return to firmware ----------->
 355 
 356         );
 357 }
 358 
 359 // @ 0xFF81FD28
 360 void __attribute__((naked,noinline)) task_Startup_my() {
 361 
 362                 asm volatile (
 363 "       STMFD   SP!, {R4,LR} \n"                   
 364 "       BL      sub_FF8165DC \n"                      
 365 "       BL      sub_FF8353D4 \n"                      
 366 "       BL      sub_FF83355C \n"                      
 367 //"     BL      sub_FF83C6C0 \n"                      
 368 "       BL      sub_FF83C8AC \n"                      
 369 //"     BL      sub_FF83C754 \n"                // Skip starting diskboot.bin again
 370 "       BL      sub_FF83CA48 \n"                      
 371 "       BL      sub_FF832364 \n"                      
 372 "       BL      sub_FF83C8DC \n"                      
 373 "       BL      sub_FF839FE8 \n"                      
 374 "       BL      sub_FF83CA4C \n"                      
 375 
 376 //"     BL      sub_FF83415C \n"                      
 377 
 378 "               BL      CreateTask_PhySw \n"                    // our keyboard task
 379 "               BL      CreateTask_spytask \n"                  // chdk initialization
 380 
 381 "       B       sub_FF81FD5C \n"                // Return to firmware ----------->
 382         );
 383 
 384 }
 385 
 386 
 387 /*----------------------------------------------------------------------
 388         spytask
 389 -----------------------------------------------------------------------*/
 390 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
 391 {
 392     core_spytask();
 393 }
 394 
 395 
 396 /*----------------------------------------------------------------------
 397         CreateTask_spytask
 398 -----------------------------------------------------------------------*/
 399 void CreateTask_spytask() {
 400 
 401         _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
 402 }
 403 
 404 //** CreateTask_PhySw  @ 0xFF83415C 
 405 void __attribute__((naked,noinline)) CreateTask_PhySw() {
 406 
 407                 asm volatile (
 408 "       STMFD   SP!, {R3-R5,LR} \n"                
 409 "       LDR     R4, =0x1C30 \n"                      
 410 "       LDR     R0, [R4, #4] \n"                     
 411 "       CMP     R0, #0 \n"                           
 412 "       BNE     sub_FF834190 \n"                     
 413 "       MOV     R3, #0 \n"                           
 414 "       STR     R3, [SP] \n"                         
 415 //"     LDR     R3, =0xFF834128 \n"                  
 416 //"     MOV     R2, #0x800 \n"                       
 417 
 418 "               LDR     R3, =mykbd_task \n"             // PhySw Task patch
 419 "               MOV     R2, #0x2000 \n"                 // larger stack
 420 
 421 "       B       sub_FF834180 \n"                // Return to firmware ----------->
 422         );
 423         
 424 }
 425 
 426 
 427 /*----------------------------------------------------------------------
 428         init_file_modules_task()
 429 -----------------------------------------------------------------------*/
 430 //** init_file_modules_task  @ 0xFF89F638 
 431 void __attribute__((naked,noinline)) init_file_modules_task() {
 432 
 433         asm volatile (
 434 "       STMFD   SP!, {R4-R6,LR} \n"                
 435 "       BL      sub_FF89569C \n"                      
 436 "       LDR     R5, =0x5006 \n"                      
 437 "       MOVS    R4, R0 \n"                          
 438 "       MOVNE   R1, #0 \n"                         
 439 "       MOVNE   R0, R5 \n"                         
 440 "       BLNE    sub_FF899828 \n"                    
 441 "       BL      sub_FF8956C8 \n"                      
 442 
 443 "               BL      core_spytask_can_start \n"      // added ------------->
 444 
 445 "               B       sub_FF89F658 \n"                // Return to firmware ----------->
 446         );
 447 }
 448 
 449 /*----------------------------------------------------------------------
 450         JogDial_task_my()
 451 -----------------------------------------------------------------------*/
 452 //** JogDial_task_my  @ 0xFF865420
 453 void __attribute__((naked,noinline)) JogDial_task_my()
 454 {
 455         asm volatile (
 456 "       STMFD   SP!, {R4-R11,LR} \n"               
 457 "       SUB     SP, SP, #0x1C \n"                    
 458 "       BL      sub_FF8657B4 \n"                      
 459 "       LDR     R12, =0x25AC \n"                     
 460 "       LDR     R6, =0xFFB90EA0 \n"                  
 461 "       MOV     R0, #0 \n"                           
 462 "       ADD     R10, SP, #8 \n"                      
 463 "       ADD     R9, SP, #0xC \n"                     
 464 "loc_FF865440:\n"
 465 "       ADD     R2, SP, #0x14 \n"                    
 466 "       MOV     R1, #0 \n"                           
 467 "       ADD     R4, R2, R0, LSL #1 \n"               
 468 "       ADD     R3, SP, #0x10 \n"                    
 469 "       STRH    R1, [R4] \n"                        
 470 "       ADD     R4, R3, R0, LSL #1 \n"               
 471 "       STRH    R1, [R4] \n"                        
 472 "       STR     R1, [R9, R0, LSL #2] \n"             
 473 "       STR     R1, [R10, R0, LSL #2] \n"            
 474 "       ADD     R0, R0, #1 \n"                       
 475 "       CMP     R0, #1 \n"                           
 476 "       BLT     loc_FF865440 \n"                     
 477 "loc_FF865470:\n"
 478 "       LDR     R0, =0x25AC \n"                      
 479 "       MOV     R2, #0 \n"                           
 480 "       LDR     R0, [R0, #8] \n"                     
 481 "       MOV     R1, SP \n"                           
 482 "       BL      sub_FF83A27C \n"                      
 483 "       CMP     R0, #0 \n"                           
 484 "       LDRNE   R1, =0x236 \n"                     
 485 "       LDRNE   R0, =0xFF8656D0 \n" // "RotaryEncoder.c"
 486 "       BLNE    sub_FF81EDBC \n"                    
 487 "       LDR     R0, [SP] \n"                         
 488 "       AND     R4, R0, #0xFF \n"                    
 489 "       AND     R0, R0, #0xFF00 \n"                  
 490 "       CMP     R0, #0x100 \n"                       
 491 "       BEQ     loc_FF8654E0 \n"                     
 492 "       CMP     R0, #0x200 \n"                       
 493 "       BEQ     loc_FF865518 \n"                     
 494 "       CMP     R0, #0x300 \n"                       
 495 "       BEQ     loc_FF865718 \n"                     
 496 "       CMP     R0, #0x400 \n"                       
 497 "       BNE     loc_FF865470 \n"                     
 498 "       CMP     R4, #0 \n"                           
 499 "       LDRNE   R1, =0x2C1 \n"                     
 500 "       LDRNE   R0, =0xFF8656D0 \n" // "RotaryEncoder.c"
 501 "       BLNE    sub_FF81EDBC \n"                    
 502 "       RSB     R0, R4, R4, LSL #3 \n"               
 503 "       LDR     R0, [R6, R0, LSL #2] \n"             
 504 "loc_FF8654D8:\n"
 505 "       BL      sub_FF865798 \n"                      
 506 "       B       loc_FF865470 \n"                       
 507 "loc_FF8654E0:\n"
 508 //------------------  begin added code ---------------
 509 "labelA: \n"
 510                 "LDR    R0, =jogdial_stopped\n"
 511                 "LDR    R0, [R0]\n"
 512                 "CMP    R0, #1\n"
 513                 "BNE    labelB\n"                       // continue on if jogdial_stopped = 0
 514                 "MOV    R0, #40\n"
 515                 "BL     _SleepTask\n"                   // jogdial_stopped=1 -- give time back to OS and suspend jogdial task
 516                 "B      labelA\n"
 517 "labelB: \n" 
 518 //------------------  end added code -----------------
 519 
 520 
 521 "       LDR     R0, =0x25B8 \n"                      
 522 "       LDR     R0, [R0, R4, LSL #2] \n"             
 523 "       BL      sub_FF83B228 \n"                      
 524 "       LDR     R2, =0xFF86536C \n"                  
 525 "       ORR     R3, R4, #0x200 \n"                   
 526 "       ADD     R1, R2, #0 \n"                       
 527 "       MOV     R0, #0x28 \n"                        
 528 "       BL      sub_FF83B144 \n"                      
 529 "       TST     R0, #1 \n"                           
 530 "       CMPNE   R0, #0x15 \n"                      
 531 "       STR     R0, [R10, R4, LSL #2] \n"            
 532 "       BEQ     loc_FF865470 \n"                     
 533 "       MOV     R1, #0x248 \n"                       
 534 "       B       loc_FF8656BC \n"                       
 535 "loc_FF865518:\n"
 536 "       RSB     R5, R4, R4, LSL #3 \n"               
 537 "       LDR     R0, [R6, R5, LSL #2] \n"             
 538 "       LDR     R1, =0xC0240000 \n"                  
 539 "       ADD     R0, R1, R0, LSL #8 \n"               
 540 "       LDR     R0, [R0, #0x104] \n"                 
 541 "       MOV     R1, R0, ASR #0x10 \n"                
 542 "       ADD     R0, SP, #0x14 \n"                    
 543 "       ADD     R11, R0, R4, LSL #1 \n"              
 544 "       ADD     R0, SP, #0x10 \n"                    
 545 "       ADD     R0, R0, R4, LSL #1 \n"               
 546 "       STRH    R1, [R11] \n"                       
 547 "       STR     R0, [SP, #0x18] \n"                  
 548 "       LDRSH   R3, [R0] \n"                       
 549 "       SUB     R2, R1, R3 \n"                       
 550 "       CMP     R2, #0 \n"                           
 551 "       BNE     loc_FF86559C \n"                     
 552 "       LDR     R0, [R9, R4, LSL #2] \n"             
 553 "       CMP     R0, #0 \n"                           
 554 "       BEQ     loc_FF865678 \n"                     
 555 "       LDR     R7, =0x25B8 \n"                      
 556 "       LDR     R0, [R7, R4, LSL #2] \n"             
 557 "       BL      sub_FF83B228 \n"                      
 558 "       LDR     R2, =0xFF865378 \n"                  
 559 "       ORR     R3, R4, #0x300 \n"                   
 560 "       ADD     R1, R2, #0 \n"                       
 561 "       MOV     R0, #0x1F4 \n"                       
 562 "       BL      sub_FF83B144 \n"                      
 563 "       TST     R0, #1 \n"                           
 564 "       CMPNE   R0, #0x15 \n"                      
 565 "       STR     R0, [R7, R4, LSL #2] \n"             
 566 "       BEQ     loc_FF865678 \n"                     
 567 "       LDR     R1, =0x261 \n"                       
 568 "       B       loc_FF865670 \n"                       
 569 "loc_FF86559C:\n"
 570 "       MOV     R0, R2 \n"                           
 571 "       RSBLT   R0, R0, #0 \n"                     
 572 "       MOVLE   R7, #0 \n"                         
 573 "       MOVGT   R7, #1 \n"                         
 574 "       CMP     R0, #0xFF \n"                        
 575 "       BLS     loc_FF8655D8 \n"                     
 576 "       LDR     R0, =0x7FFF \n"                      
 577 "       CMP     R2, #0 \n"                           
 578 "       SUBLE   R0, R0, R3 \n"                     
 579 "       ADDLE   R0, R0, R1 \n"                     
 580 "       SUBGT   R0, R0, R1 \n"                     
 581 "       ADDGT   R0, R0, R3 \n"                     
 582 "       MVN     R1, #0x8000 \n"                      
 583 "       SUB     R0, R0, R1 \n"                       
 584 "       EOR     R7, R7, #1 \n"                       
 585 "loc_FF8655D8:\n"
 586 "       STR     R0, [SP, #4] \n"                     
 587 "       LDR     R0, [R9, R4, LSL #2] \n"             
 588 "       CMP     R0, #0 \n"                           
 589 "       ADDEQ   R0, R6, R5, LSL #2 \n"             
 590 "       LDREQ   R0, [R0, #8] \n"                   
 591 "       BEQ     loc_FF865610 \n"                     
 592 "       ADD     R8, R6, R5, LSL #2 \n"               
 593 "       ADD     R1, R8, R7, LSL #2 \n"               
 594 "       LDR     R1, [R1, #0x10] \n"                  
 595 "       CMP     R1, R0 \n"                           
 596 "       BEQ     loc_FF865614 \n"                     
 597 "       LDR     R0, [R8, #0xC] \n"                   
 598 "       BL      sub_FF8341B4 \n"                      
 599 "       LDR     R0, [R8, #8] \n"                     
 600 "loc_FF865610:\n"
 601 "       BL      sub_FF8341B4 \n"                      
 602 "loc_FF865614:\n"
 603 "       ADD     R0, R6, R5, LSL #2 \n"               
 604 "       ADD     R7, R0, R7, LSL #2 \n"               
 605 "       LDR     R0, [R7, #0x10] \n"                  
 606 "       LDR     R1, [SP, #4] \n"                     
 607 "       BL      sub_FF8341C4 \n"                      
 608 "       LDR     R0, [R7, #0x10] \n"                  
 609 "       LDR     R7, =0x25B8 \n"                      
 610 "       STR     R0, [R9, R4, LSL #2] \n"             
 611 "       LDRH    R1, [R11] \n"                       
 612 "       LDR     R0, [SP, #0x18] \n"                  
 613 "       STRH    R1, [R0] \n"                        
 614 "       LDR     R0, [R7, R4, LSL #2] \n"             
 615 "       BL      sub_FF83B228 \n"                      
 616 "       LDR     R2, =0xFF865378 \n"                  
 617 "       ORR     R3, R4, #0x300 \n"                   
 618 "       ADD     R1, R2, #0 \n"                       
 619 "       MOV     R0, #0x1F4 \n"                       
 620 "       BL      sub_FF83B144 \n"                      
 621 "       TST     R0, #1 \n"                           
 622 "       CMPNE   R0, #0x15 \n"                      
 623 "       STR     R0, [R7, R4, LSL #2] \n"             
 624 "       BEQ     loc_FF865678 \n"                     
 625 "       LDR     R1, =0x2A3 \n"                       
 626 "loc_FF865670:\n"
 627 "       LDR     R0, =0xFF8656D0 \n" // "RotaryEncoder.c"
 628 "       BL      sub_FF81EDBC \n"                      
 629 "loc_FF865678:\n"
 630 "       ADD     R0, R6, R5, LSL #2 \n"               
 631 "       LDR     R0, [R0, #0x18] \n"                  
 632 "       CMP     R0, #1 \n"                           
 633 "       BNE     loc_FF865710 \n"                     
 634 "       LDR     R0, =0x25AC \n"                      
 635 "       LDR     R0, [R0, #0x10] \n"                  
 636 "       CMP     R0, #0 \n"                           
 637 "       BEQ     loc_FF865710 \n"                     
 638 "       LDR     R2, =0xFF86536C \n"                  
 639 "       ORR     R3, R4, #0x400 \n"                   
 640 "       ADD     R1, R2, #0 \n"                       
 641 "       BL      sub_FF83B144 \n"                      
 642 "       TST     R0, #1 \n"                           
 643 "       CMPNE   R0, #0x15 \n"                      
 644 "       STR     R0, [R10, R4, LSL #2] \n"            
 645 "       BEQ     loc_FF865470 \n"                     
 646 "       LDR     R1, =0x2AA \n"                       
 647 "loc_FF8656BC:\n"
 648 "       LDR     R0, =0xFF8656D0 \n" // "RotaryEncoder.c"
 649 "       BL      sub_FF81EDBC \n"                      
 650 "       B       loc_FF865470 \n"                       
 651 "loc_FF865710:\n"
 652 "       LDR     R0, [R6, R5, LSL #2] \n"             
 653 "       B       loc_FF8654D8 \n"                       
 654 "loc_FF865718:\n"
 655 "       LDR     R0, [R9, R4, LSL #2] \n"             
 656 "       CMP     R0, #0 \n"                           
 657 "       MOVEQ   R1, #0x2B4 \n"                     
 658 "       LDREQ   R0, =0xFF8656D0 \n" // "RotaryEncoder.c"
 659 "       BLEQ    sub_FF81EDBC \n"                    
 660 "       RSB     R0, R4, R4, LSL #3 \n"               
 661 "       ADD     R0, R6, R0, LSL #2 \n"               
 662 "       LDR     R0, [R0, #0xC] \n"                   
 663 "       BL      sub_FF8341B4 \n"                      
 664 "       MOV     R0, #0 \n"                           
 665 "       STR     R0, [R9, R4, LSL #2] \n"             
 666 "       B       loc_FF865470 \n"                       
 667         );
 668 }

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