This source file includes following definitions.
- filewritetask
- sub_FF367534_my
- sub_FF367BF0_my
- sub_FF3676C0_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6
7 typedef struct {
8 unsigned int address;
9 unsigned int length;
10 } cam_ptp_data_chunk;
11
12 #define MAX_CHUNKS_FOR_FWT 7
13
14
15
16
17
18
19 typedef struct
20 {
21 int unkn1;
22 int file_offset;
23 int full_size;
24 int unkn2, unkn3;
25 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
26 int seek_flag;
27 int unkn4, unkn5;
28 char name[32];
29 } fwt_data_struct;
30
31
32
33
34
35 #define FWT_MUSTSEEK 0x40
36 #define FWT_SEEKMASK 0x40
37
38 #include "../../../generic/filewrite.c"
39
40
41
42 void __attribute__((naked,noinline)) filewritetask() {
43 asm volatile (
44 " STMFD SP!, {R1-R7,LR} \n"
45 " LDR R5, =0x10E44 \n"
46 " MOV R6, #0 \n"
47
48 "loc_FF367854:\n"
49 " LDR R0, [R5, #0x10] \n"
50 " MOV R2, #0 \n"
51 " ADD R1, SP, #8 \n"
52 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
53 " CMP R0, #0 \n"
54 " MOVNE R1, #0x3EC \n"
55 " LDRNE R0, =0xFF367A14 /*'dwFWrite.c'*/ \n"
56 " BLNE _DebugAssert \n"
57 " LDR R0, [SP, #8] \n"
58 " LDR R1, [R0] \n"
59 " CMP R1, #0xD \n"
60 " ADDCC PC, PC, R1, LSL#2 \n"
61 " B loc_FF367854 \n"
62 " B loc_FF3679DC \n"
63 " B loc_FF3679DC \n"
64 " B loc_FF3679DC \n"
65 " B loc_FF3679DC \n"
66 " B loc_FF3679DC \n"
67 " B loc_FF3679DC \n"
68 " B loc_FF3679DC \n"
69 " B loc_FF3679E4 \n"
70 " B loc_FF3678BC \n"
71 " B loc_FF367958 \n"
72 " B loc_FF367988 \n"
73 " B loc_FF367924 \n"
74 " B loc_FF367950 \n"
75
76 "loc_FF3678BC:\n"
77 " MOV R4, R5 \n"
78 " STR R6, [SP] \n"
79
80 "loc_FF3678C4:\n"
81 " LDR R0, [R4, #0x10] \n"
82 " MOV R1, SP \n"
83 " BL sub_0068C024 /*_GetNumberOfPostedMessages*/ \n"
84 " LDR R0, [SP] \n"
85 " CMP R0, #0 \n"
86 " BEQ loc_FF3678F0 \n"
87 " LDR R0, [R4, #0x10] \n"
88 " MOV R2, #0 \n"
89 " ADD R1, SP, #4 \n"
90 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
91 " B loc_FF3678C4 \n"
92
93 "loc_FF3678F0:\n"
94 " LDR R0, [R4, #4] \n"
95 " CMN R0, #1 \n"
96 " BEQ loc_FF367918 \n"
97 " BL fwt_close \n"
98 " MVN R0, #0 \n"
99 " STR R0, [R4, #4] \n"
100 " LDR R0, =0x1628F8 \n"
101 " BL sub_FF073ED8 \n"
102 " MOV R1, #0 \n"
103 " BL sub_FF072128 \n"
104
105 "loc_FF367918:\n"
106 " LDR R0, [R4, #0xC] \n"
107 " BL _GiveSemaphore \n"
108 " B loc_FF367854 \n"
109
110 "loc_FF367924:\n"
111 " MOV R4, R0 \n"
112 " ADD R0, R0, #0x58 \n"
113 " BL sub_FF073ED8 \n"
114 " MOV R1, #0 \n"
115 " BL sub_FF071FEC \n"
116 " LDR R0, [R4, #0xC] \n"
117 " BL sub_FF000370 \n"
118 " ADD R0, R4, #0x58 \n"
119
120 " LDR R3, =ignore_current_write\n"
121 " LDR R3, [R3]\n"
122 " CMP R3, #0\n"
123 " BNE loc_A\n"
124
125 " BL sub_FF01D1F0 \n"
126 " ADD R0, R4, #0x58 \n"
127 " B loc_FF3679BC \n"
128
129 "loc_FF367950:\n"
130 " BL sub_FF367534_my \n"
131 " B loc_FF367854 \n"
132
133 "loc_FF367958:\n"
134 " LDR R1, [R0, #4] \n"
135 " MOV R4, R0 \n"
136 " LDR R0, [R5, #4] \n"
137 " MOV R2, #0 \n"
138 " BL fwt_lseek \n"
139 " CMN R0, #1 \n"
140 " LDREQ R0, =0x9200013 \n"
141 " MOVEQ R1, R4 \n"
142 " STREQ R0, [R4, #0x10] \n"
143 " MOVEQ R0, #7 \n"
144 " BLEQ sub_FF367474 \n"
145 " B loc_FF367854 \n"
146
147 "loc_FF367988:\n"
148 " MOV R4, R0 \n"
149 " LDRSB R0, [R0, #0x58] \n"
150 " CMP R0, #0 \n"
151 " BEQ loc_FF367854 \n"
152 " STRB R0, [SP, #4] \n"
153 " ADD R0, R4, #0x58 \n"
154 " STRB R6, [SP, #5] \n"
155 " BL sub_FF073ED8 \n"
156 " MOV R1, #0 \n"
157 " BL sub_FF071FEC \n"
158
159 " LDR R3, =ignore_current_write\n"
160 " LDR R3, [R3]\n"
161 " CMP R3, #0\n"
162 " BNE loc_B\n"
163
164 " ADD R0, SP, #4 \n"
165 " BL sub_FF070EF0 \n"
166 "loc_B:\n"
167 " ADD R0, R4, #0x58 \n"
168
169 "loc_FF3679BC:\n"
170 "loc_A:\n"
171 " BL sub_FF073ED8 \n"
172 " LDR R1, [R5, #0x18] \n"
173 " BL sub_FF072128 \n"
174 " LDR R1, [R5, #0x14] \n"
175 " CMP R1, #0 \n"
176 " LDRNE R0, [R4, #0x10] \n"
177 " BLXNE R1 \n"
178 " B loc_FF367854 \n"
179
180 "loc_FF3679DC:\n"
181 " BL sub_FF367BF0_my \n"
182 " B loc_FF367854 \n"
183
184 "loc_FF3679E4:\n"
185 " BL sub_FF3676C0_my \n"
186 " B loc_FF367854 \n"
187 );
188 }
189
190
191
192 void __attribute__((naked,noinline)) sub_FF367534_my() {
193 asm volatile (
194 " STMFD SP!, {R4-R8,LR} \n"
195 " MOV R4, R0 \n"
196
197
198 " BL filewrite_main_hook\n"
199 " MOV R0, R4\n"
200
201 " LDR R0, [R0, #0x4C] \n"
202 " SUB SP, SP, #0x38 \n"
203 " TST R0, #1 \n"
204 " BEQ loc_FF367690 \n"
205 " ADD R0, R4, #0x58 \n"
206 " BL sub_FF073ED8 \n"
207 " MOV R1, #0 \n"
208 " BL sub_FF071FEC \n"
209 " LDR R0, [R4, #0xC] \n"
210 " BL sub_FF000370 \n"
211 " LDR R0, [R4, #0x4C] \n"
212 " LDR R5, =0x301 \n"
213 " TST R0, #0x10 \n"
214 " MOVNE R5, #9 \n"
215 " BNE loc_FF367580 \n"
216 " TST R0, #0x40 \n"
217 " MOVNE R5, #1 \n"
218
219 "loc_FF367580:\n"
220 " TST R0, #0x20 \n"
221 " BNE loc_FF367594 \n"
222 " LDR R0, [R4, #0x54] \n"
223 " CMP R0, #1 \n"
224 " BNE loc_FF367598 \n"
225
226 "loc_FF367594:\n"
227 " ORR R5, R5, #0x8000 \n"
228
229 "loc_FF367598:\n"
230 " LDR R8, =0x1B6 \n"
231 " ADD R7, R4, #0x58 \n"
232 " LDR R6, [R4, #0xC] \n"
233 " MOV R2, R8 \n"
234 " MOV R1, R5 \n"
235 " MOV R0, R7 \n"
236 " BL fwt_open \n"
237 " CMN R0, #1 \n"
238 " BNE loc_FF367618 \n"
239 " MOV R0, R7 \n"
240 " BL sub_FF01D1F0 \n"
241 " MOV R2, #0xF \n"
242 " MOV R1, R7 \n"
243 " MOV R0, SP \n"
244 " BL sub_00690174 \n"
245 " MOV R0, #0 \n"
246 " LDR R1, =0x41FF \n"
247 " STRB R0, [SP, #0xF] \n"
248 " STR R1, [SP, #0x20] \n"
249 " MOV R1, #0x10 \n"
250 " STR R0, [SP, #0x28] \n"
251 " STR R1, [SP, #0x24] \n"
252 " ADD R1, SP, #0x20 \n"
253 " MOV R0, SP \n"
254 " STR R6, [SP, #0x2C] \n"
255 " STR R6, [SP, #0x30] \n"
256 " STR R6, [SP, #0x34] \n"
257 " BL sub_FF071968 \n"
258 " MOV R2, R8 \n"
259 " MOV R1, R5 \n"
260 " MOV R0, R7 \n"
261 " BL _Open \n"
262
263 "loc_FF367618:\n"
264 " LDR R6, =0x10E44 \n"
265 " CMN R0, #1 \n"
266 " MOV R5, R0 \n"
267 " STR R0, [R6, #4] \n"
268 " BNE loc_FF367658 \n"
269 " ADD R0, R4, #0x58 \n"
270 " BL sub_FF073ED8 \n"
271 " LDR R1, [R6, #0x18] \n"
272 " BL sub_FF072128 \n"
273 " LDR R1, [R6, #0x14] \n"
274 " CMP R1, #0 \n"
275 " BEQ loc_FF3676B8 \n"
276 " ADD SP, SP, #0x38 \n"
277 " LDMFD SP!, {R4-R8,LR} \n"
278 " LDR R0, =0x9200001 \n"
279 " BX R1 \n"
280
281 "loc_FF367658:\n"
282 " LDR R0, =0x1628F8 \n"
283 " MOV R2, #0x20 \n"
284 " ADD R1, R4, #0x58 \n"
285 " BL sub_0069035C \n"
286
287
288 " LDR R3, =current_write_ignored\n"
289 " LDR R3, [R3]\n"
290 " CMP R3, #0\n"
291 " BNE loc_C\n"
292
293
294 " LDR R0, [R4, #0x4C] \n"
295 " TST R0, #0x80 \n"
296 " BEQ loc_FF367690 \n"
297 " LDR R1, [R4, #8] \n"
298 " MOV R0, R5 \n"
299 " BL sub_FF01CEC0 \n"
300 " CMP R0, #0 \n"
301 " MOVEQ R1, R4 \n"
302 " MOVEQ R0, #7 \n"
303 " BEQ loc_FF3676B4 \n"
304
305 "loc_FF367690:\n"
306 "loc_C:\n"
307 " LDR R0, [R4, #0x4C] \n"
308 " TST R0, #0x40 \n"
309 " LDREQ R0, [R4, #4] \n"
310 " CMPEQ R0, #0 \n"
311 " MOVNE R1, R4 \n"
312 " MOVNE R0, #9 \n"
313 " BLNE sub_FF367474 \n"
314 " MOV R1, R4 \n"
315 " MOV R0, #0 \n"
316
317 "loc_FF3676B4:\n"
318 " BL sub_FF367474 \n"
319
320 "loc_FF3676B8:\n"
321 " ADD SP, SP, #0x38 \n"
322 " LDMFD SP!, {R4-R8,PC} \n"
323 );
324 }
325
326
327
328 void __attribute__((naked,noinline)) sub_FF367BF0_my() {
329 asm volatile (
330 " STMFD SP!, {R4-R10,LR} \n"
331 " MOV R5, R0 \n"
332 " LDR R0, [R0] \n"
333 " CMP R0, #6 \n"
334 " BHI loc_FF367C1C \n"
335 " ADD R0, R5, R0, LSL#3 \n"
336 " LDR R8, [R0, #0x14]! \n"
337 " LDR R7, [R0, #4] \n"
338 " CMP R7, #0 \n"
339 " BNE loc_FF367C34 \n"
340 " B loc_FF367C28 \n"
341
342 "loc_FF367C1C:\n"
343 " LDR R1, =0x341 \n"
344 " LDR R0, =0xFF367A14 /*'dwFWrite.c'*/ \n"
345 " BL _DebugAssert \n"
346
347 "loc_FF367C28:\n"
348 " MOV R1, R5 \n"
349 " MOV R0, #7 \n"
350 " B loc_FF367CC8 \n"
351
352 "loc_FF367C34:\n"
353 " LDR R9, =0x10E44 \n"
354 " MOV R4, R7 \n"
355
356 "loc_FF367C3C:\n"
357 " LDR R0, [R5, #4] \n"
358 " CMP R4, #0x1000000 \n"
359 " MOVLS R6, R4 \n"
360 " MOVHI R6, #0x1000000 \n"
361 " BIC R1, R0, #0xFF000000 \n"
362 " CMP R1, #0 \n"
363 " BICNE R0, R0, #0xFF000000 \n"
364 " RSBNE R0, R0, #0x1000000 \n"
365 " CMPNE R6, R0 \n"
366 " MOVHI R6, R0 \n"
367 " LDR R0, [R9, #4] \n"
368 " MOV R2, R6 \n"
369 " MOV R1, R8 \n"
370 " BL fwt_write \n"
371 " LDR R1, [R5, #4] \n"
372 " CMP R6, R0 \n"
373 " ADD R1, R1, R0 \n"
374 " STR R1, [R5, #4] \n"
375 " BEQ loc_FF367C9C \n"
376 " CMN R0, #1 \n"
377 " LDRNE R0, =0x9200015 \n"
378 " LDREQ R0, =0x9200005 \n"
379 " STR R0, [R5, #0x10] \n"
380 " B loc_FF367C28 \n"
381
382 "loc_FF367C9C:\n"
383 " SUB R4, R4, R0 \n"
384 " CMP R4, R7 \n"
385 " ADD R8, R8, R0 \n"
386 " MOVCS R1, #0x36C \n"
387 " LDRCS R0, =0xFF367A14 /*'dwFWrite.c'*/ \n"
388 " BLCS _DebugAssert \n"
389 " CMP R4, #0 \n"
390 " BNE loc_FF367C3C \n"
391 " LDR R0, [R5] \n"
392 " MOV R1, R5 \n"
393 " ADD R0, R0, #1 \n"
394
395 "loc_FF367CC8:\n"
396 " LDMFD SP!, {R4-R10,LR} \n"
397 " B sub_FF367474 \n"
398 );
399 }
400
401
402
403 void __attribute__((naked,noinline)) sub_FF3676C0_my() {
404 asm volatile (
405 " STMFD SP!, {R4-R6,LR} \n"
406 " MOV R4, R0 \n"
407 " LDR R0, [R0, #0x4C] \n"
408 " LDR R5, =0x10E44 \n"
409 " TST R0, #2 \n"
410 " SUB SP, SP, #0x38 \n"
411 " BEQ sub_FF367828 \n"
412 " LDR R0, [R5, #4] \n"
413 " CMN R0, #1 \n"
414 " BEQ sub_FF367714 \n"
415 " LDR R1, [R4, #0x54] \n"
416 " LDR R6, =0x9200003 \n"
417 " CMP R1, #1 \n"
418 " BNE loc_FF367700 \n"
419
420
421 " LDR R3, =current_write_ignored\n"
422 " LDR R3, [R3]\n"
423 " CMP R3, #0\n"
424 " BNE loc_D\n"
425
426
427 " BL sub_FF01CC14 \n"
428 " B sub_FF367704 \n"
429
430 "loc_FF367700:\n"
431 "loc_D:\n"
432 " BL fwt_close \n"
433 " LDR PC, =0xFF367704 \n"
434 );
435 }