root/platform/sx730hs/sub/100c/capt_seq.c

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DEFINITIONS

This source file includes following definitions.
  1. log_capt_seq
  2. log_capt_seq2
  3. log_capt_seq_override
  4. captseq_raw_addr_init_my
  5. clear_current_raw_addr
  6. capt_seq_task
  7. sub_fc18e188_my
  8. sub_fc18e0fe_my
  9. sub_fc18df56_my
  10. log_nr_call
  11. log_remote_hook
  12. log_rh
  13. sub_fc244522_my
  14. exp_drv_task
  15. sub_fc2abf7e_my
  16. sub_fc3c6d08_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 // debug
   6 #define CAPTSEQ_DEBUG_LOG 1
   7 extern void _LogCameraEvent(int id,const char *fmt,...);
   8 
   9 #define USE_STUBS_NRFLAG 1
  10 #define NR_AUTO (-1) // default value if NRTBL.SetDarkSubType not used is -1 (0 probalby works the same), set to enable auto
  11 
  12 #ifdef CAPTSEQ_DEBUG_LOG
  13 
  14 extern char *hook_raw_image_addr(void);
  15 
  16 void log_capt_seq(int m)
  17 {
  18     _LogCameraEvent(0x60,"cs m:%d rb:0x%08x i:%04d",
  19                     m,
  20                     hook_raw_image_addr(),
  21                     get_exposure_counter());
  22 }
  23 void log_capt_seq2(int m)
  24 {
  25     _LogCameraEvent(0x60,"cs end m:%d rb:0x%08x i:%04d",
  26                     m,
  27                     hook_raw_image_addr(),
  28                     get_exposure_counter());
  29 }
  30 void log_capt_seq_override(void)
  31 {
  32     _LogCameraEvent(0x60,"cs override rb:0x%08x i:%04d",
  33                     hook_raw_image_addr(),
  34                     get_exposure_counter());
  35 }
  36 #endif
  37 
  38 #include "../../../generic/capt_seq.c"
  39 
  40 // first paramter matches active_raw_buffer
  41 // second is pointer to structure
  42 extern int _captseq_raw_addr_init(int raw_index, char **ptr);
  43 char *current_raw_addr;
  44 
  45 void captseq_raw_addr_init_my(int raw_index,char **ptr) {
  46     _captseq_raw_addr_init(raw_index,ptr);
  47     current_raw_addr=*(ptr + 0x60/4); // @0xfc0f5fe8 [r4,#0x60]
  48 #ifdef CAPTSEQ_DEBUG_LOG
  49     _LogCameraEvent(0x60,"rawinit i:0x%x p:0x%x v:0x%x",raw_index,ptr,current_raw_addr);
  50 #endif
  51 }
  52 
  53 void clear_current_raw_addr(void) {
  54     current_raw_addr=NULL;
  55 }
  56 
  57 // -f=chdk -s=task_CaptSeq -c=183
  58 void __attribute__((naked,noinline)) capt_seq_task() {
  59     asm volatile (
  60 // task_CaptSeq 0xfc0f2b07
  61 "    push    {r3, r4, r5, r6, r7, lr}\n"
  62 "    ldr     r4, =0x0003e6f8\n"
  63 "    movs    r6, #0\n"
  64 "    ldr     r5, =0x0000bfc8\n"
  65 "loc_fc0f2b0e:\n"
  66 "    movs    r2, #0\n"
  67 "    mov     r1, sp\n"
  68 "    ldr     r0, [r5, #8]\n"
  69 "    bl      sub_fc344686\n" // ReceiveMessageQueue
  70 "    lsls    r0, r0, #0x1f\n"
  71 "    beq     loc_fc0f2b30\n"
  72 "    movw    r2, #0x453\n"
  73 "    ldr     r1, =0xfc0f2750\n" //  *"SsShootTask.c"
  74 "    movs    r0, #0\n"
  75 "    bl      _DebugAssert\n"
  76 "    bl      _ExitTask\n"
  77 "    pop     {r3, r4, r5, r6, r7, pc}\n"
  78 "loc_fc0f2b30:\n"
  79 "    ldr     r0, [sp]\n"
  80 "    ldr     r0, [r0]\n"
  81 "    cmp     r0, #1\n"
  82 "    beq     loc_fc0f2b4c\n"
  83 "    cmp     r0, #0x2d\n"
  84 "    beq     loc_fc0f2b4c\n"
  85 "    cmp     r0, #0x2e\n"
  86 "    beq     loc_fc0f2b4c\n"
  87 "    cmp     r0, #0x21\n"
  88 "    beq     loc_fc0f2b4c\n"
  89 "    cmp     r0, #0x25\n"
  90 "    beq     loc_fc0f2b4c\n"
  91 "    bl      sub_fc18ef40\n"
  92 "loc_fc0f2b4c:\n"
  93 #ifdef CAPTSEQ_DEBUG_LOG
  94 // debug message
  95 "ldr     r0, [sp]\n"
  96 "ldr     r0, [r0]\n"
  97 "bl log_capt_seq\n"
  98 #endif
  99 "    ldr     r0, [sp]\n"
 100 "    ldr     r1, [r0]\n"
 101 "    cmp     r1, #0x37\n"
 102 "    bhs     loc_fc0f2c36\n"
 103 "    tbb     [pc, r1]\n" // (jumptable r1 55 elements)
 104 "branchtable_fc0f2b58:\n"
 105 "    .byte((loc_fc0f2b90 - branchtable_fc0f2b58) / 2)\n" // (case 0)
 106 "    .byte((loc_fc0f2ba6 - branchtable_fc0f2b58) / 2)\n" // (case 1)
 107 "    .byte((loc_fc0f2bae - branchtable_fc0f2b58) / 2)\n" // (case 2)
 108 "    .byte((loc_fc0f2bbc - branchtable_fc0f2b58) / 2)\n" // (case 3)
 109 "    .byte((loc_fc0f2bb6 - branchtable_fc0f2b58) / 2)\n" // (case 4)
 110 "    .byte((loc_fc0f2bd4 - branchtable_fc0f2b58) / 2)\n" // (case 5)
 111 "    .byte((loc_fc0f2bda - branchtable_fc0f2b58) / 2)\n" // (case 6)
 112 "    .byte((loc_fc0f2be4 - branchtable_fc0f2b58) / 2)\n" // (case 7)
 113 "    .byte((loc_fc0f2bec - branchtable_fc0f2b58) / 2)\n" // (case 8)
 114 "    .byte((loc_fc0f2bfc - branchtable_fc0f2b58) / 2)\n" // (case 9)
 115 "    .byte((loc_fc0f2c04 - branchtable_fc0f2b58) / 2)\n" // (case 10)
 116 "    .byte((loc_fc0f2c0a - branchtable_fc0f2b58) / 2)\n" // (case 11)
 117 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 12)
 118 "    .byte((loc_fc0f2c12 - branchtable_fc0f2b58) / 2)\n" // (case 13)
 119 "    .byte((loc_fc0f2c18 - branchtable_fc0f2b58) / 2)\n" // (case 14)
 120 "    .byte((loc_fc0f2c1e - branchtable_fc0f2b58) / 2)\n" // (case 15)
 121 "    .byte((loc_fc0f2c24 - branchtable_fc0f2b58) / 2)\n" // (case 16)
 122 "    .byte((loc_fc0f2c2a - branchtable_fc0f2b58) / 2)\n" // (case 17)
 123 "    .byte((loc_fc0f2c30 - branchtable_fc0f2b58) / 2)\n" // (case 18)
 124 "    .byte((loc_fc0f2c38 - branchtable_fc0f2b58) / 2)\n" // (case 19)
 125 "    .byte((loc_fc0f2c3e - branchtable_fc0f2b58) / 2)\n" // (case 20)
 126 "    .byte((loc_fc0f2c44 - branchtable_fc0f2b58) / 2)\n" // (case 21)
 127 "    .byte((loc_fc0f2c48 - branchtable_fc0f2b58) / 2)\n" // (case 22)
 128 "    .byte((loc_fc0f2c4e - branchtable_fc0f2b58) / 2)\n" // (case 23)
 129 "    .byte((loc_fc0f2c54 - branchtable_fc0f2b58) / 2)\n" // (case 24)
 130 "    .byte((loc_fc0f2c5a - branchtable_fc0f2b58) / 2)\n" // (case 25)
 131 "    .byte((loc_fc0f2c5e - branchtable_fc0f2b58) / 2)\n" // (case 26)
 132 "    .byte((loc_fc0f2c62 - branchtable_fc0f2b58) / 2)\n" // (case 27)
 133 "    .byte((loc_fc0f2c6a - branchtable_fc0f2b58) / 2)\n" // (case 28)
 134 "    .byte((loc_fc0f2c72 - branchtable_fc0f2b58) / 2)\n" // (case 29)
 135 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 30)
 136 "    .byte((loc_fc0f2c7a - branchtable_fc0f2b58) / 2)\n" // (case 31)
 137 "    .byte((loc_fc0f2c80 - branchtable_fc0f2b58) / 2)\n" // (case 32)
 138 "    .byte((loc_fc0f2c84 - branchtable_fc0f2b58) / 2)\n" // (case 33)
 139 "    .byte((loc_fc0f2c8c - branchtable_fc0f2b58) / 2)\n" // (case 34)
 140 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 35)
 141 "    .byte((loc_fc0f2c92 - branchtable_fc0f2b58) / 2)\n" // (case 36)
 142 "    .byte((loc_fc0f2c98 - branchtable_fc0f2b58) / 2)\n" // (case 37)
 143 "    .byte((loc_fc0f2c9e - branchtable_fc0f2b58) / 2)\n" // (case 38)
 144 "    .byte((loc_fc0f2ca4 - branchtable_fc0f2b58) / 2)\n" // (case 39)
 145 "    .byte((loc_fc0f2caa - branchtable_fc0f2b58) / 2)\n" // (case 40)
 146 "    .byte((loc_fc0f2cb2 - branchtable_fc0f2b58) / 2)\n" // (case 41)
 147 "    .byte((loc_fc0f2cb8 - branchtable_fc0f2b58) / 2)\n" // (case 42)
 148 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 43)
 149 "    .byte((loc_fc0f2cdc - branchtable_fc0f2b58) / 2)\n" // (case 44)
 150 "    .byte((loc_fc0f2ce2 - branchtable_fc0f2b58) / 2)\n" // (case 45)
 151 "    .byte((loc_fc0f2cee - branchtable_fc0f2b58) / 2)\n" // (case 46)
 152 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 47)
 153 "    .byte((loc_fc0f2d08 - branchtable_fc0f2b58) / 2)\n" // (case 48)
 154 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 49)
 155 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 50)
 156 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 51)
 157 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 52)
 158 "    .byte((loc_fc0f2cfa - branchtable_fc0f2b58) / 2)\n" // (case 53)
 159 "    .byte((loc_fc0f2cf4 - branchtable_fc0f2b58) / 2)\n" // (case 54)
 160 ".align 1\n"
 161 "loc_fc0f2b90:\n"
 162 "    ldr     r0, [r0, #0xc]\n"
 163 "    bl      sub_fc0f31c0\n"
 164 #ifdef CAPTSEQ_DEBUG_LOG
 165 "bl log_capt_seq_override\n"
 166 #endif
 167 "    BL      clear_current_raw_addr\n" // +
 168 "    BL      shooting_expo_param_override\n" // +
 169 "    bl      sub_fc0f0526\n"
 170 "    ldr     r0, [r4, #0x24]\n"
 171 "    cmp     r0, #0\n"
 172 "    beq     loc_fc0f2ba4\n"
 173 //"    bl      sub_fc18e188\n"
 174 "    bl      sub_fc18e188_my\n" // ->
 175 "loc_fc0f2ba4:\n"
 176 "    b       loc_fc0f2d08\n"
 177 "loc_fc0f2ba6:\n" // case 1: normal shoot
 178 "    ldr     r0, [r0, #0x10]\n"
 179 //"    bl      sub_fc18e0fe\n"
 180 "    bl      sub_fc18e0fe_my\n" // ->
 181 "    b       loc_fc0f2d08\n"
 182 "loc_fc0f2bae:\n"
 183 "    movs    r0, #1\n"
 184 "    bl      sub_fc0f358a\n"
 185 "    b       loc_fc0f2d08\n"
 186 "loc_fc0f2bb6:\n"
 187 "    bl      sub_fc0f2e0a\n"
 188 "    b       loc_fc0f2bc2\n"
 189 "loc_fc0f2bbc:\n"
 190 "    ldr     r0, [r0, #0xc]\n"
 191 "    bl      sub_fc0f316e\n"
 192 "loc_fc0f2bc2:\n"
 193 "    str     r6, [r4, #0x24]\n"
 194 "    b       loc_fc0f2d08\n"
 195 ".ltorg\n"
 196 // firmware had literal pool here
 197 // 00 00 
 198 // 14 e9 03 00
 199 // f8 e6 03 00
 200 // c8 bf 00 00
 201 "loc_fc0f2bd4:\n"
 202 "    bl      sub_fc0f3176\n"
 203 "    b       loc_fc0f2d08\n"
 204 "loc_fc0f2bda:\n"
 205 "    bl      sub_fc0f34aa\n"
 206 "    bl      sub_fc0f0526\n"
 207 "    b       loc_fc0f2d08\n"
 208 "loc_fc0f2be4:\n"
 209 "    ldr     r0, [r0, #0x10]\n"
 210 "    bl      sub_fc18e21c\n"
 211 "    b       loc_fc0f2d08\n"
 212 "loc_fc0f2bec:\n"
 213 "    bl      sub_fc0f350c\n"
 214 "    bl      sub_fc0f0526\n"
 215 "    movs    r0, #0\n"
 216 "    bl      sub_fc27eab2\n"
 217 "    b       loc_fc0f2d08\n"
 218 "loc_fc0f2bfc:\n"
 219 "    ldr     r0, [r4, #0x50]\n"
 220 "    bl      sub_fc0f499c\n"
 221 "    b       loc_fc0f2d08\n"
 222 "loc_fc0f2c04:\n"
 223 "    bl      sub_fc0f4c48\n"
 224 "    b       loc_fc0f2d08\n"
 225 "loc_fc0f2c0a:\n"
 226 "    ldr     r0, [r0, #0xc]\n"
 227 "    bl      sub_fc0f4c94\n"
 228 "    b       loc_fc0f2d08\n"
 229 "loc_fc0f2c12:\n"
 230 "    bl      sub_fc0f4de8\n"
 231 "    b       loc_fc0f2d08\n"
 232 "loc_fc0f2c18:\n"
 233 "    bl      sub_fc0f51b0\n"
 234 "    b       loc_fc0f2d08\n"
 235 "loc_fc0f2c1e:\n"
 236 "    bl      sub_fc0f5246\n"
 237 "    b       loc_fc0f2d08\n"
 238 "loc_fc0f2c24:\n"
 239 "    bl      sub_fc18cb4c\n"
 240 "    b       loc_fc0f2d08\n"
 241 "loc_fc0f2c2a:\n"
 242 "    bl      sub_fc18ccb2\n"
 243 "    b       loc_fc0f2d08\n"
 244 "loc_fc0f2c30:\n"
 245 "    bl      sub_fc18cd28\n"
 246 "    b       loc_fc0f2d08\n"
 247 "loc_fc0f2c36:\n"
 248 "    b       loc_fc0f2cfa\n"
 249 "loc_fc0f2c38:\n"
 250 "    bl      sub_fc18cdb0\n"
 251 "    b       loc_fc0f2d08\n"
 252 "loc_fc0f2c3e:\n"
 253 "    bl      sub_fc18ce56\n"
 254 "    b       loc_fc0f2d08\n"
 255 "loc_fc0f2c44:\n"
 256 "    movs    r0, #0\n"
 257 "    b       loc_fc0f2c64\n"
 258 "loc_fc0f2c48:\n"
 259 "    bl      sub_fc18d154\n"
 260 "    b       loc_fc0f2d08\n"
 261 "loc_fc0f2c4e:\n"
 262 "    bl      sub_fc18d1a6\n"
 263 "    b       loc_fc0f2d08\n"
 264 "loc_fc0f2c54:\n"
 265 "    bl      sub_fc18d1aa\n"
 266 "    b       loc_fc0f2d08\n"
 267 "loc_fc0f2c5a:\n"
 268 "    movs    r0, #0\n"
 269 "    b       loc_fc0f2c6c\n"
 270 "loc_fc0f2c5e:\n"
 271 "    movs    r0, #0\n"
 272 "    b       loc_fc0f2c74\n"
 273 "loc_fc0f2c62:\n"
 274 "    movs    r0, #1\n"
 275 "loc_fc0f2c64:\n"
 276 "    bl      sub_fc18d040\n"
 277 "    b       loc_fc0f2d08\n"
 278 "loc_fc0f2c6a:\n"
 279 "    movs    r0, #1\n"
 280 "loc_fc0f2c6c:\n"
 281 "    bl      sub_fc18d1bc\n"
 282 "    b       loc_fc0f2d08\n"
 283 "loc_fc0f2c72:\n"
 284 "    movs    r0, #1\n"
 285 "loc_fc0f2c74:\n"
 286 "    bl      sub_fc18d25a\n"
 287 "    b       loc_fc0f2d08\n"
 288 "loc_fc0f2c7a:\n"
 289 "    bl      sub_fc0f365c\n"
 290 "    b       loc_fc0f2d08\n"
 291 "loc_fc0f2c80:\n"
 292 "    movs    r0, #0\n"
 293 "    b       loc_fc0f2c86\n"
 294 "loc_fc0f2c84:\n"
 295 "    ldr     r0, [r0, #0xc]\n"
 296 "loc_fc0f2c86:\n"
 297 "    bl      sub_fc0f36d8\n"
 298 "    b       loc_fc0f2d08\n"
 299 "loc_fc0f2c8c:\n"
 300 "    bl      sub_fc18cf70\n"
 301 "    b       loc_fc0f2d08\n"
 302 "loc_fc0f2c92:\n"
 303 "    bl      sub_fc18cfd0\n"
 304 "    b       loc_fc0f2d08\n"
 305 "loc_fc0f2c98:\n"
 306 "    bl      sub_fc18e91a\n"
 307 "    b       loc_fc0f2d08\n"
 308 "loc_fc0f2c9e:\n"
 309 "    bl      sub_fc0f8196\n"
 310 "    b       loc_fc0f2d08\n"
 311 "loc_fc0f2ca4:\n"
 312 "    bl      sub_fc0f8250\n"
 313 "    b       loc_fc0f2d08\n"
 314 "loc_fc0f2caa:\n"
 315 "    ldr     r0, [r0, #0xc]\n"
 316 "    bl      sub_fc18d334\n"
 317 "    b       loc_fc0f2d08\n"
 318 "loc_fc0f2cb2:\n"
 319 "    bl      sub_fc18d39c\n"
 320 "    b       loc_fc0f2d08\n"
 321 "loc_fc0f2cb8:\n"
 322 "    bl      sub_fc0fa154\n"
 323 "    ldrh.w  r0, [r4, #0x1b8]\n"
 324 "    cmp     r0, #4\n"
 325 "    beq     loc_fc0f2cce\n"
 326 "    ldrh    r0, [r4]\n"
 327 "    sub.w   r1, r0, #0x4200\n"
 328 "    subs    r1, #0x38\n"
 329 "    bne     loc_fc0f2d08\n"
 330 "loc_fc0f2cce:\n"
 331 "    bl      sub_fc0f8250\n"
 332 "    bl      sub_fc0f8796\n"
 333 "    bl      sub_fc0f85f4\n"
 334 "    b       loc_fc0f2d08\n"
 335 "loc_fc0f2cdc:\n"
 336 "    movs    r2, #0\n"
 337 "    movs    r1, #0x12\n"
 338 "    b       loc_fc0f2ce6\n"
 339 "loc_fc0f2ce2:\n"
 340 "    movs    r2, #0\n"
 341 "    movs    r1, #0x10\n"
 342 "loc_fc0f2ce6:\n"
 343 "    movs    r0, #0\n"
 344 "    bl      sub_fc0f110c\n"
 345 "    b       loc_fc0f2d08\n"
 346 "loc_fc0f2cee:\n"
 347 "    movs    r2, #0\n"
 348 "    movs    r1, #0x11\n"
 349 "    b       loc_fc0f2ce6\n"
 350 "loc_fc0f2cf4:\n"
 351 "    bl      sub_fc0f48e8\n"
 352 "    b       loc_fc0f2d08\n"
 353 "loc_fc0f2cfa:\n"
 354 "    movw    r2, #0x58f\n"
 355 "    ldr     r1, =0xfc0f2750\n" //  *"SsShootTask.c"
 356 "    movs    r0, #0\n"
 357 "    bl      _DebugAssert\n"
 358 "loc_fc0f2d08:\n"
 359 // debug after message handled
 360 #ifdef CAPTSEQ_DEBUG_LOG
 361 "ldr     r0, [sp]\n"
 362 "ldr     r0, [r0]\n"
 363 "bl log_capt_seq2\n"
 364 #endif
 365 "    ldr     r0, [sp]\n"
 366 "    ldr     r1, [r0, #4]\n"
 367 "    ldr     r0, [r5, #4]\n"
 368 "    bl      _SetEventFlag\n"
 369 "    ldr     r7, [sp]\n"
 370 "    ldr     r0, [r7, #8]\n"
 371 "    cbnz    r0, loc_fc0f2d26\n"
 372 "    movw    r2, #0x102\n"
 373 "    ldr     r1, =0xfc0f2750\n" //  *"SsShootTask.c"
 374 "    movs    r0, #0\n"
 375 "    bl      _DebugAssert\n"
 376 "loc_fc0f2d26:\n"
 377 "    str     r6, [r7, #8]\n"
 378 "    b       loc_fc0f2b0e\n"
 379 ".ltorg\n"
 380     );
 381 }
 382 // -f=chdk -s=0xfc18e189 -eret=2
 383 void __attribute__((naked,noinline)) sub_fc18e188_my() {
 384     asm volatile (
 385 "    push    {r3, r4, r5, r6, r7, lr}\n"
 386 "    bl      sub_fc0f221a\n"
 387 "    mov     r4, r0\n"
 388 "    movs    r0, #0xc\n"
 389 "    bl      sub_fc309ad0\n"
 390 "    ldr     r6, =0x00014c10\n"
 391 "    lsls    r0, r0, #0x1f\n"
 392 "    mov.w   r5, #1\n"
 393 "    bne     loc_fc18e218\n"
 394 "    movs    r2, #2\n"
 395 "    mov     r1, sp\n"
 396 "    movw    r0, #0x115\n"
 397 "    bl      _GetPropertyCase\n" //  PROPCASE_TV (277)
 398 "    lsls    r0, r0, #0x1f\n"
 399 "    beq     loc_fc18e1bc\n"
 400 "    movs    r0, #0\n"
 401 "    movw    r2, #0x1be\n"
 402 "    ldr     r1, =0xfc18e2dc\n" //  *"SsCaptureCtrl.c"
 403 "    bl      _DebugAssert\n"
 404 "loc_fc18e1bc:\n"
 405 "    ldrsh.w r0, [sp]\n"
 406 "    bl      sub_fc0dbe02\n"
 407 "    cbz     r0, loc_fc18e1ce\n"
 408 "    str     r5, [r6]\n"
 409 "    bl      sub_fc309b08\n"
 410 "loc_fc18e1cc:\n"
 411 "    pop     {r3, r4, r5, r6, r7, pc}\n"
 412 "loc_fc18e1ce:\n"
 413 "    bl      sub_fc114d58\n"
 414 "    bl      sub_fc0f317e\n"
 415 "    mov     r0, r4\n"
 416 "    bl      sub_fc0f5f4e\n"
 417 "    mov     r1, r4\n"
 418 //"    bl      _captseq_raw_addr_init\n"
 419 "bl captseq_raw_addr_init_my\n" // +
 420 "    movs    r2, #4\n"
 421 "    movw    r0, #0x11b\n"
 422 "    add.w   r1, r4, #0x5c\n"
 423 "    bl      _SetPropertyCase\n" //  (283)
 424 "    movs    r2, #4\n"
 425 "    movs    r0, #0x33\n"
 426 "    add.w   r1, r4, #0x60\n"
 427 "    bl      _SetPropertyCase\n" //  (51)
 428 "    movs    r2, #4\n"
 429 "    movs    r0, #0x47\n"
 430 "    add.w   r1, r4, #8\n"
 431 "    bl      _SetPropertyCase\n" //  (71)
 432 "    mov     r0, r4\n"
 433 "    bl      sub_fc18dcf6\n"
 434 "    mov     r0, r4\n"
 435 //"    bl      sub_fc244522\n"
 436 "    bl      sub_fc244522_my\n" // ->
 437 "    lsls    r0, r0, #0x1f\n"
 438 "    beq     loc_fc18e1cc\n" //  return
 439 "loc_fc18e218:\n"
 440 "    str     r5, [r6]\n"
 441 "    pop     {r3, r4, r5, r6, r7, pc}\n"
 442 ".ltorg\n"
 443     );
 444 }
 445 
 446 // -f=chdk -s=0xfc18e0ff -eret
 447 void __attribute__((naked,noinline)) sub_fc18e0fe_my() {
 448     asm volatile (
 449 "    push    {r3, r4, r5, r6, r7, lr}\n"
 450 "    ldr     r6, =0x0003e6f8\n"
 451 "    movs    r4, #0\n"
 452 "    mov     r5, r0\n"
 453 "    movw    r0, #0x120\n"
 454 "    ldr     r1, [r6, #0x24]\n"
 455 "    cbz     r1, loc_fc18e15e\n"
 456 "    ldr.w   r2, [r5, #0x128]\n"
 457 "    ldr     r1, =0xfc18e2f4\n" //  *"  CaptCtrl: Quick(%d)"
 458 "    bl      _LogCameraEvent\n"
 459 "    ldr     r0, =0x00014c10\n"
 460 "    ldr     r0, [r0]\n"
 461 "    cbz     r0, loc_fc18e120\n"
 462 "    movs    r4, #0x1d\n"
 463 "loc_fc18e120:\n"
 464 "    movw    r7, #0x15d\n"
 465 "    movs    r2, #2\n"
 466 "    mov     r1, sp\n"
 467 "    mov     r0, r7\n"
 468 "    bl      _GetPropertyCase\n"
 469 "    lsls    r0, r0, #0x1f\n"
 470 "    beq     loc_fc18e13e\n"
 471 "    movs    r0, #0\n"
 472 "    movw    r2, #0x175\n"
 473 "    ldr     r1, =0xfc18e2dc\n" //  *"SsCaptureCtrl.c"
 474 "    bl      _DebugAssert\n"
 475 "loc_fc18e13e:\n"
 476 "    ldr     r0, [r5, #0x1c]\n"
 477 "    movs    r3, #2\n"
 478 "    mov     r2, sp\n"
 479 "    mov     r1, r7\n"
 480 "    bl      sub_fc35b984\n"
 481 "    movs    r1, #2\n"
 482 "    mov     r2, r5\n"
 483 "    mov     r0, r4\n"
 484 "    bl      sub_fc0f110c\n"
 485 "    mov     r1, r4\n"
 486 "    mov     r0, r5\n"
 487 "    bl      sub_fc18ed9e\n"
 488 "    b       loc_fc18e182\n"
 489 "loc_fc18e15e:\n"
 490 "    ldr     r1, =0xfc18e310\n" //  *"  CaptCtrl: ExecCapt"
 491 "    bl      _LogCameraEvent\n"
 492 "    mov     r0, r5\n"
 493 //"    bl      sub_fc18df56\n"
 494 "    bl      sub_fc18df56_my\n" // -> to hooks
 495 "    mov     r4, r0\n"
 496 "    lsls    r0, r0, #0x1f\n"
 497 "    beq     loc_fc18e182\n"
 498 "    movs    r1, #2\n"
 499 "    mov     r2, r5\n"
 500 "    mov     r0, r4\n"
 501 "    bl      sub_fc0f110c\n"
 502 "    mov     r1, r4\n"
 503 "    mov     r0, r5\n"
 504 "    bl      sub_fc18ef00\n"
 505 "loc_fc18e182:\n"
 506 "    movs    r0, #0\n"
 507 "    str     r0, [r6, #0x24]\n"
 508 "    pop     {r3, r4, r5, r6, r7, pc}\n"
 509 ".ltorg\n"
 510     );
 511 }
 512 
 513 // -f=chdk -s=0xfc18df57 -c=155
 514 void __attribute__((naked,noinline)) sub_fc18df56_my() {
 515     asm volatile (
 516 "    push.w  {r2, r3, r4, r5, r6, r7, r8, lr}\n"
 517 "    mov     r4, r0\n"
 518 "    bl      sub_fc0f5f4e\n"
 519 "    mov     r1, r4\n"
 520 //"    bl      _captseq_raw_addr_init\n"
 521 "    bl      captseq_raw_addr_init_my\n"
 522 "    movs    r2, #4\n"
 523 "    movw    r0, #0x11b\n"
 524 "    add.w   r1, r4, #0x5c\n"
 525 "    bl      _SetPropertyCase\n" //  (283)
 526 "    movs    r2, #4\n"
 527 "    movs    r0, #0x33\n"
 528 "    add.w   r1, r4, #0x60\n"
 529 "    bl      _SetPropertyCase\n" //  (51)
 530 "    ldr     r5, =0x0003e6f8\n"
 531 "    ldr.w   r0, [r5, #0x108]\n"
 532 "    cbnz    r0, loc_fc18df98\n"
 533 "    ldrh.w  r0, [r5, #0x1b6]\n"
 534 "    cmp     r0, #3\n"
 535 "    beq     loc_fc18df9e\n"
 536 "    ldr     r0, [r4, #8]\n"
 537 "    cmp     r0, #1\n"
 538 "    bhi     loc_fc18dfae\n"
 539 "    b       loc_fc18df9e\n"
 540 "loc_fc18df98:\n"
 541 "    ldr     r0, [r4, #0xc]\n"
 542 "    cmp     r0, #1\n"
 543 "    bne     loc_fc18dfae\n"
 544 "loc_fc18df9e:\n"
 545 "    movs    r0, #0xc\n"
 546 "    bl      sub_fc309ad0\n"
 547 "    lsls    r0, r0, #0x1f\n"
 548 "    beq     loc_fc18dfae\n"
 549 "    bl      sub_fc0f0e26\n"
 550 "    b       loc_fc18dffa\n" //  return 0x1
 551 "loc_fc18dfae:\n"
 552 "    ldr.w   r0, [r5, #0xec]\n"
 553 "    cbz     r0, loc_fc18dfce\n"
 554 "    ldrh.w  r0, [r5, #0x1b6]\n"
 555 "    cmp     r0, #3\n"
 556 "    beq     loc_fc18dfc2\n"
 557 "    ldr     r0, [r4, #8]\n"
 558 "    cmp     r0, #1\n"
 559 "    bhi     loc_fc18e000\n"
 560 "loc_fc18dfc2:\n"
 561 "    ldr.w   r0, [r5, #0x108]\n"
 562 "    cbz     r0, loc_fc18dfce\n"
 563 "    ldr     r0, [r4, #0xc]\n"
 564 "    cmp     r0, #1\n"
 565 "    bhi     loc_fc18e000\n"
 566 "loc_fc18dfce:\n"
 567 "    movs    r2, #2\n"
 568 "    movw    r0, #0x115\n"
 569 "    add     r1, sp, #4\n"
 570 "    bl      _GetPropertyCase\n" //  PROPCASE_TV (277)
 571 "    lsls    r0, r0, #0x1f\n"
 572 "    beq     loc_fc18dfe8\n"
 573 "    movs    r2, #0xcd\n"
 574 "    movs    r0, #0\n"
 575 "    ldr     r1, =0xfc18e2dc\n" //  *"SsCaptureCtrl.c"
 576 "    bl      _DebugAssert\n"
 577 "loc_fc18dfe8:\n"
 578 "    ldrsh.w r0, [sp, #4]\n"
 579 "    bl      sub_fc0dbe02\n"
 580 "    cbz     r0, loc_fc18e000\n"
 581 "    bl      sub_fc0f0e26\n"
 582 "    bl      sub_fc309b08\n"
 583 "loc_fc18dffa:\n"
 584 "    movs    r0, #1\n"
 585 "loc_fc18dffc:\n"
 586 "    pop.w   {r2, r3, r4, r5, r6, r7, r8, pc}\n"
 587 "loc_fc18e000:\n"
 588 "    mov     r0, r4\n"
 589 "    bl      sub_fc0f36a2\n"
 590 "    lsls    r1, r0, #0x1f\n"
 591 "    bne     loc_fc18dffc\n" //  return
 592 "    ldr     r7, =0x0003e914\n"
 593 "    ldr     r0, [r7]\n"
 594 "    cbz     r0, loc_fc18e022\n"
 595 "    ldr.w   r0, [r5, #0x19c]\n"
 596 "    cbz     r0, loc_fc18e022\n"
 597 "    mov     r0, r4\n"
 598 "    bl      sub_fc18ea84\n" //  return
 599 "    mov     r0, r4\n"
 600 "    bl      sub_fc18ea86\n" //  return
 601 "loc_fc18e022:\n"
 602 "    mov     r0, r4\n"
 603 "    bl      sub_fc18c8a8\n"
 604 "    mov     r6, r0\n"
 605 "    lsls    r0, r0, #0x1f\n"
 606 "    bne     loc_fc18e0fa\n"
 607 "    ldr     r0, [r7]\n"
 608 "    cbnz    r0, loc_fc18e03e\n"
 609 "    ldr.w   r0, [r5, #0x19c]\n"
 610 "    cbz     r0, loc_fc18e03e\n"
 611 "    mov     r0, r4\n"
 612 "    bl      sub_fc18ea84\n" //  return
 613 "loc_fc18e03e:\n"
 614 "    bl      sub_fc114d58\n"
 615 "    bl      sub_fc0f317e\n"
 616 "    mov     r0, r4\n"
 617 "    bl      sub_fc18dcf6\n"
 618 "    ldr.w   r0, [r5, #0x12c]\n"
 619 "    cbnz    r0, loc_fc18e060\n"
 620 "    ldrh.w  r0, [r5, #0x1b6]\n"
 621 "    cmp     r0, #3\n"
 622 "    beq     loc_fc18e060\n"
 623 "    ldr     r0, [r4, #8]\n"
 624 "    cmp     r0, #1\n"
 625 "    bhi     loc_fc18e066\n"
 626 "loc_fc18e060:\n"
 627 "    movs    r0, #2\n"
 628 "    bl      sub_fc0fb3ea\n"
 629 "loc_fc18e066:\n"
 630 "    ldr.w   r0, [r5, #0xa0]\n"
 631 "    cmp     r0, #0\n"
 632 "    beq     loc_fc18e0d8\n"
 633 "    ldrh.w  r0, [r5, #0x1b6]\n"
 634 "    movw    r7, #0x800\n"
 635 "    cmp     r0, #3\n"
 636 "    beq     loc_fc18e096\n"
 637 "    ldr     r0, [r4, #8]\n"
 638 "    cmp     r0, #1\n"
 639 "    bls     loc_fc18e096\n"
 640 "    bl      sub_fc18e896\n"
 641 "    movw    r3, #0x12a\n"
 642 "    movw    r2, #0x3a98\n"
 643 "    mov     r1, r7\n"
 644 "    str     r3, [sp]\n"
 645 "    ldr     r3, =0xfc18e2dc\n" //  *"SsCaptureCtrl.c"
 646 "    bl      sub_fc309ea8\n"
 647 "loc_fc18e096:\n"
 648 "    movs    r2, #4\n"
 649 "    movw    r0, #0x18c\n"
 650 "    add     r1, sp, #4\n"
 651 "    bl      _GetPropertyCase\n" //  (396)
 652 "    lsls    r0, r0, #0x1f\n"
 653 "    beq     loc_fc18e0b2\n"
 654 "    movs    r0, #0\n"
 655 "    movw    r2, #0x12e\n"
 656 "    ldr     r1, =0xfc18e2dc\n" //  *"SsCaptureCtrl.c"
 657 "    bl      _DebugAssert\n"
 658 "loc_fc18e0b2:\n"
 659 "    ldr     r0, [sp, #4]\n"
 660 "    cbnz    r0, loc_fc18e0c2\n"
 661 "    bl      sub_fc18e896\n"
 662 "    mov     r1, r7\n"
 663 "    bl      _SetEventFlag\n"
 664 "    b       loc_fc18e0d8\n"
 665 "loc_fc18e0c2:\n"
 666 "    bl      sub_fc18e896\n"
 667 "    mov     r1, r7\n"
 668 "    bl      sub_fc369bc2\n" // ClearEventFlag
 669 "    ldr     r2, =0xfc18df45\n"
 670 "    mov     r3, r7\n"
 671 "    ldr     r0, [sp, #4]\n"
 672 "    mov     r1, r2\n"
 673 "    bl      sub_fc3415c4\n"
 674 "loc_fc18e0d8:\n"
 675 "    ldr.w   r0, [r5, #0xac]\n"
 676 "    cbz     r0, loc_fc18e0e6\n"
 677 "    mov     r0, r4\n"
 678 "    bl      sub_fc244a44\n"
 679 "    b       loc_fc18e0fa\n"
 680 "loc_fc18e0e6:\n"
 681 "    ldr.w   r0, [r5, #0xb0]\n"
 682 "    cmp     r0, #0\n"
 683 "    mov     r0, r4\n"
 684 "    beq     loc_fc18e0f6\n"
 685 "    bl      sub_fc244de6\n"
 686 "    b       loc_fc18e0fa\n"
 687 "loc_fc18e0f6:\n"
 688 //"    bl      sub_fc244522\n"
 689 "    bl      sub_fc244522_my\n" // ->
 690 "loc_fc18e0fa:\n"
 691 "    mov     r0, r6\n"
 692 "    b       loc_fc18dffc\n" //  return
 693 ".ltorg\n"
 694     );
 695 }
 696 #ifdef CAPTSEQ_DEBUG_LOG
 697 void log_nr_call(void) {
 698     _LogCameraEvent(0x60,"nr hook %d",_nrflag);
 699 }
 700 void log_remote_hook(void) {
 701     _LogCameraEvent(0x60,"remote hook");
 702 }
 703 void log_rh(void) {
 704     _LogCameraEvent(0x60,"raw hook rb:0x%08x rbc:0x%08x",hook_raw_image_addr(),current_raw_addr);
 705 }
 706 #endif
 707 
 708 // -f=chdk -s=0xfc244523 -eret
 709 void __attribute__((naked,noinline)) sub_fc244522_my() {
 710     asm volatile (
 711 "    push.w  {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl, lr}\n"
 712 "    mov     r4, r0\n"
 713 "    bl      sub_fc0f5ffa\n"
 714 "    ldr     r7, =0x0003e6f8\n"
 715 "    ldr.w   r0, [r7, #0x168]\n"
 716 "    cbz     r0, loc_fc244542\n"
 717 "    ldrh.w  r0, [r7, #0x1b6]\n"
 718 "    cmp     r0, #3\n"
 719 "    beq     loc_fc244542\n"
 720 "    ldr     r0, [r4, #8]\n"
 721 "    cmp     r0, #1\n"
 722 "    bhi     loc_fc24454c\n"
 723 "loc_fc244542:\n"
 724 "    mov     r0, r4\n"
 725 "    bl      sub_fc18dc48\n"
 726 "    bl      sub_fc18e760\n"
 727 "loc_fc24454c:\n"
 728 "    ldr.w   r0, [r7, #0x9c]\n"
 729 "    cbnz    r0, loc_fc24455c\n"
 730 "    movs    r0, #1\n"
 731 "    bl      sub_fc0f367e\n"
 732 "    bl      sub_fc18e342\n"
 733 "loc_fc24455c:\n"
 734 "    ldr     r0, [r4, #0x1c]\n"
 735 "    movs    r3, #4\n"
 736 "    add     r2, sp, #0xc\n"
 737 "    movw    r1, #0x13c\n"
 738 "    bl      sub_fc35ba00\n"
 739 "    lsls    r0, r0, #0x1f\n"
 740 "    beq     loc_fc24457a\n"
 741 "    movs    r0, #0\n"
 742 "    movw    r2, #0x1c4\n"
 743 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 744 "    bl      _DebugAssert\n"
 745 "loc_fc24457a:\n"
 746 "    ldr     r0, [sp, #0xc]\n"
 747 "    ubfx    r0, r0, #8, #8\n"
 748 "    cmp     r0, #6\n"
 749 "    bne     loc_fc24458a\n"
 750 "    ldr     r0, =0xfc244521\n"
 751 "    movs    r1, #0\n"
 752 "    b       loc_fc24458e\n"
 753 "loc_fc24458a:\n"
 754 "    ldr     r0, =0xfc18d879\n"
 755 "    mov     r1, r4\n"
 756 "loc_fc24458e:\n"
 757 "    bl      sub_fc1137b0\n"
 758 "    ldr     r0, [r4, #0x1c]\n"
 759 "    movs    r3, #2\n"
 760 "    add     r2, sp, #8\n"
 761 "    movw    r1, #0x117\n"
 762 "    bl      sub_fc35ba00\n"
 763 "    lsls    r0, r0, #0x1f\n"
 764 "    beq     loc_fc2445b0\n"
 765 "    movs    r0, #0\n"
 766 "    movw    r2, #0x1cd\n"
 767 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 768 "    bl      _DebugAssert\n"
 769 "loc_fc2445b0:\n"
 770 "    ldr.w   r0, [r7, #0x104]\n"
 771 "    cbz     r0, loc_fc2445e2\n"
 772 "    ldrh.w  r0, [r7, #0x1b6]\n"
 773 "    cmp     r0, #3\n"
 774 "    beq     loc_fc2445c4\n"
 775 "    ldr     r0, [r4, #8]\n"
 776 "    cmp     r0, #1\n"
 777 "    bhi     loc_fc2445e2\n"
 778 "loc_fc2445c4:\n"
 779 "    movs    r0, #1\n"
 780 "    movw    r5, #0x16b\n"
 781 "    movs    r2, #2\n"
 782 "    mov     r1, sp\n"
 783 "    str     r0, [sp]\n"
 784 "    mov     r0, r5\n"
 785 "    bl      _SetPropertyCase\n"
 786 "    ldr     r0, [r4, #0x1c]\n"
 787 "    movs    r3, #2\n"
 788 "    mov     r2, sp\n"
 789 "    mov     r1, r5\n"
 790 "    bl      sub_fc35b984\n"
 791 "loc_fc2445e2:\n"
 792 // nr hook
 793 "bl capt_seq_hook_set_nr\n"
 794 #ifdef CAPTSEQ_DEBUG_LOG
 795 "bl log_nr_call\n"
 796 #endif
 797 "    mov     r0, r4\n"
 798 "    bl      sub_fc18ddc2\n"
 799 "    ldr     r0, [r4, #0x1c]\n"
 800 "    movs    r3, #4\n"
 801 "    movs    r1, #0x93\n"
 802 "    add     r2, sp, #4\n"
 803 "    bl      sub_fc35ba00\n"
 804 "    lsls    r0, r0, #0x1f\n"
 805 "    beq     loc_fc244604\n"
 806 "    movs    r0, #0\n"
 807 "    movw    r2, #0x1dd\n"
 808 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 809 "    bl      _DebugAssert\n"
 810 "loc_fc244604:\n"
 811 // later than this point crashes with a HardwareDefect 14
 812 "    BL      wait_until_remote_button_is_released\n" // + remote hook, might be able to go later
 813 #ifdef CAPTSEQ_DEBUG_LOG
 814 "bl log_remote_hook\n"
 815 #endif
 816 "    ldrh    r0, [r4, #0x18]\n"
 817 "    cbnz    r0, loc_fc244612\n"
 818 "    ldr     r1, [r4, #0x60]\n"
 819 "    mov     r0, r4\n"
 820 "    ldr     r2, [sp, #4]\n"
 821 "    bl      sub_fc18d68c\n"
 822 "loc_fc244612:\n"
 823 "    ldr.w   r0, [r7, #0x188]\n"
 824 "    cbz     r0, loc_fc24461c\n"
 825 "    bl      sub_fc18db4e\n"
 826 "loc_fc24461c:\n"
 827 "    bl      sub_fc309f48\n"
 828 "    cbz     r0, loc_fc244626\n"
 829 "    bl      sub_fc112730\n"
 830 "loc_fc244626:\n"
 831 "    ldr     r0, =0x0003e914\n"
 832 "    ldr     r0, [r0]\n"
 833 "    cbnz    r0, loc_fc244638\n"
 834 "    ldr.w   r0, [r7, #0x19c]\n"
 835 "    cbz     r0, loc_fc244638\n"
 836 "    mov     r0, r4\n"
 837 "    bl      sub_fc18ea86\n" //  return
 838 "loc_fc244638:\n"
 839 "    ldr     r1, =0x00021c64\n"
 840 "    ldr     r0, [sp, #4]\n"
 841 "    str     r0, [r1]\n"
 842 "    bl      sub_fc0f75b2\n"
 843 "    bl      sub_fc18de66\n"
 844 "    movs    r1, #0\n"
 845 "    mov     r0, r4\n"
 846 "    bl      sub_fc2449e2\n"
 847 "    mov     r6, r0\n"
 848 "    ldr     r0, [sp, #0xc]\n"
 849 "    ubfx    r0, r0, #8, #8\n"
 850 "    cmp     r0, #6\n"
 851 "    bne     loc_fc24465e\n"
 852 "    ldr     r5, =0xfc18db19\n"
 853 "    b       loc_fc244660\n"
 854 "loc_fc24465e:\n"
 855 "    ldr     r5, =0xfc18db2f\n"
 856 "loc_fc244660:\n"
 857 "    ldrh    r0, [r4, #0x18]\n"
 858 "    cbz     r0, loc_fc244682\n"
 859 "    cmp     r0, #1\n"
 860 "    beq     loc_fc244692\n"
 861 "    cmp     r0, #4\n"
 862 "    bne     loc_fc244706\n"
 863 "    str     r6, [sp]\n"
 864 "    mov     r3, r5\n"
 865 "    ldr     r1, [r4, #0x60]\n"
 866 "    mov     r0, r4\n"
 867 "    ldr     r2, [sp, #4]\n"
 868 "    bl      sub_fc18d6ea\n"
 869 "loc_fc24467a:\n"
 870 "    mov     r5, r0\n"
 871 "    bl      sub_fc3c9dba\n"
 872 "    b       loc_fc244714\n"
 873 "loc_fc244682:\n"
 874 "    str     r6, [sp]\n"
 875 "    mov     r3, r5\n"
 876 "    ldr     r1, [r4, #0x60]\n"
 877 "    mov     r0, r4\n"
 878 "    ldr     r2, [sp, #4]\n"
 879 "    bl      sub_fc18d5a2\n"
 880 "    b       loc_fc24467a\n"
 881 "loc_fc244692:\n"
 882 "    ldr.w   r0, [r7, #0xc4]\n"
 883 "    cbz     r0, loc_fc2446a4\n"
 884 "    movs    r0, #0\n"
 885 "    movw    r2, #0x221\n"
 886 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 887 "    bl      _DebugAssert\n"
 888 "loc_fc2446a4:\n"
 889 "    str     r6, [sp]\n"
 890 "    mov     r3, r5\n"
 891 "    ldr     r1, [r4, #0x60]\n"
 892 "    mov     r0, r4\n"
 893 "    ldr     r2, [sp, #4]\n"
 894 "    bl      sub_fc18d716\n"
 895 "    movs    r2, #1\n"
 896 "    mov     r5, r0\n"
 897 "    movs    r1, #0\n"
 898 "    movs    r0, #0x45\n"
 899 "    bl      sub_fc28061e\n"
 900 "    lsls    r0, r5, #0x1f\n"
 901 "    bne     loc_fc244714\n"
 902 "    ldr.w   r0, [r7, #0xfc]\n"
 903 "    cbz     r0, loc_fc2446d8\n"
 904 "    ldr     r1, [r4, #8]\n"
 905 "    ldr     r2, =0x001dbfb8\n"
 906 "    ldr     r0, [r4, #0x60]\n"
 907 "    add.w   r1, r2, r1, lsl #2\n"
 908 "    str     r0, [r1, #-0x4]\n"
 909 "    b       loc_fc2446fe\n"
 910 "loc_fc2446d8:\n"
 911 "    ldr     r0, =0xfc244521\n"
 912 "    movs    r1, #0\n"
 913 "    bl      sub_fc1137b0\n"
 914 "    movs    r1, #1\n"
 915 "    mov     r0, r4\n"
 916 "    bl      sub_fc2449e2\n"
 917 "    mov     r6, r0\n"
 918 "    ldr     r0, [sp, #4]\n"
 919 "    bl      sub_fc18dbaa\n"
 920 "    ldr     r1, [r4, #0x60]\n"
 921 "    mov     r3, r6\n"
 922 "    ldr     r2, [sp, #4]\n"
 923 "    mov     r0, r4\n"
 924 "    bl      sub_fc18d78a\n"
 925 "    mov     r5, r0\n"
 926 "loc_fc2446fe:\n"
 927 "    movs    r0, #0\n"
 928 "    bl      sub_fc18d580\n"
 929 "    b       loc_fc244714\n"
 930 "loc_fc244706:\n"
 931 "    movs    r0, #0\n"
 932 "    movw    r2, #0x24b\n"
 933 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 934 "    bl      _DebugAssert\n"
 935 "    movs    r5, #0x1d\n"
 936 "loc_fc244714:\n"
 937 "    bl      sub_fc18de6a\n"
 938 "    ldr.w   r8, =0xfc244521\n"
 939 "    lsls    r0, r5, #0x1f\n"
 940 "    bne     loc_fc244770\n"
 941 "    ldr.w   r0, [r7, #0x104]\n"
 942 "    cbnz    r0, loc_fc24473c\n"
 943 "    mov     r0, r4\n"
 944 "    bl      sub_fc18f2f8\n"
 945 "    lsls    r0, r0, #0x1f\n"
 946 "    beq     loc_fc24473c\n"
 947 "    movs    r0, #0\n"
 948 "    movw    r2, #0x268\n"
 949 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 950 "    bl      _DebugAssert\n"
 951 "loc_fc24473c:\n"
 952 // raw hook
 953 #ifdef CAPTSEQ_DEBUG_LOG
 954 "bl log_rh\n"
 955 #endif
 956 "    BL      capt_seq_hook_raw_here\n"
 957 "    BL      clear_current_raw_addr\n"
 958 "    mov     r0, r4\n"
 959 "    bl      sub_fc18de56\n"
 960 "    mov     r0, r4\n"
 961 "    bl      sub_fc18de2a\n"
 962 "    cmp     r6, r8\n"
 963 "    beq     loc_fc244770\n"
 964 "    bl      sub_fc18e896\n"
 965 "    movs    r1, #4\n"
 966 "    movw    sb, #0x275\n"
 967 "    ldr     r3, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 968 "    movw    r2, #0x3a98\n"
 969 "    str.w   sb, [sp]\n"
 970 "    bl      sub_fc309ea8\n"
 971 "    cbz     r0, loc_fc244770\n"
 972 "    movs    r0, #0\n"
 973 "    mov     r2, sb\n"
 974 "    ldr     r1, =0xfc244924\n" //  *"SsStandardCaptureSeq.c"
 975 "    bl      _DebugAssert\n"
 976 "loc_fc244770:\n"
 977 "    ldr.w   r0, [r7, #0x188]\n"
 978 "    cbz     r0, loc_fc244780\n"
 979 "    movs    r2, #1\n"
 980 "    movs    r1, #0\n"
 981 "    movs    r0, #0x46\n"
 982 "    bl      sub_fc28061e\n"
 983 "loc_fc244780:\n"
 984 "    movs    r1, #2\n"
 985 "    mov     r2, r4\n"
 986 "    mov     r0, r5\n"
 987 "    bl      sub_fc0f110c\n"
 988 "    ldr     r0, [r7, #0x24]\n"
 989 "    cmp     r0, #0\n"
 990 "    mov     r0, r8\n"
 991 "    beq     loc_fc2447a6\n"
 992 "    cmp     r6, r0\n"
 993 "    beq     loc_fc24479a\n"
 994 "    movs    r1, #1\n"
 995 "    b       loc_fc24479c\n"
 996 "loc_fc24479a:\n"
 997 "    movs    r1, #0\n"
 998 "loc_fc24479c:\n"
 999 "    mov     r2, r5\n"
1000 "    mov     r0, r4\n"
1001 "    bl      sub_fc18ed5c\n"
1002 "    b       loc_fc2447b8\n"
1003 "loc_fc2447a6:\n"
1004 "    cmp     r6, r0\n"
1005 "    beq     loc_fc2447ae\n"
1006 "    movs    r1, #1\n"
1007 "    b       loc_fc2447b0\n"
1008 "loc_fc2447ae:\n"
1009 "    movs    r1, #0\n"
1010 "loc_fc2447b0:\n"
1011 "    mov     r2, r5\n"
1012 "    mov     r0, r4\n"
1013 "    bl      sub_fc18ed16\n"
1014 "loc_fc2447b8:\n"
1015 "    add     sp, #0x10\n"
1016 "    mov     r0, r5\n"
1017 "    pop.w   {r4, r5, r6, r7, r8, sb, sl, pc}\n"
1018 ".ltorg\n"
1019     );
1020 }
1021 
1022 // exp_drv not needed for extended exposure, probably works up to 1024s but required for shorter than 1/3200
1023 // literal pool fc2af418-fc2af434
1024 // -f=chdk -s=task_ExpDrvTask -c=494
1025 void __attribute__((naked,noinline)) exp_drv_task() {
1026     asm volatile (
1027 // task_ExpDrv 0xfc2af0a3
1028 "    push.w  {r4, r5, r6, r7, r8, sb, sl, fp, lr}\n"
1029 "    sub     sp, #0x2c\n"
1030 "    ldr.w   fp, =0x0000e1d0\n"
1031 "    ldr.w   sl, =0xfffff400\n"
1032 "    movs    r0, #0\n"
1033 "    ldr.w   r8, =0x00065508\n"
1034 "    movs    r4, #0x47\n"
1035 "    add.w   sb, sp, #0x1c\n"
1036 "    str     r0, [sp, #0xc]\n"
1037 "loc_fc2af0be:\n"
1038 "    ldr.w   r0, [fp, #0x20]\n"
1039 "    movs    r2, #0\n"
1040 "    add     r1, sp, #0x28\n"
1041 "    mov     r5, fp\n"
1042 "    bl      sub_fc344686\n" // ReceiveMessageQueue
1043 "    ldr     r0, [sp, #0x28]\n"
1044 "    movs    r1, #0\n"
1045 "    cmp     r4, #0x19\n"
1046 "    ldr     r0, [r0]\n"
1047 "    beq     loc_fc2af0ea\n"
1048 "    cmp     r4, #0x1a\n"
1049 "    beq     loc_fc2af0ea\n"
1050 "    cmp     r4, #0x1b\n"
1051 "    beq     loc_fc2af0ea\n"
1052 "    cmp     r4, #0x1c\n"
1053 "    beq     loc_fc2af0ea\n"
1054 "    cmp     r4, #0x1d\n"
1055 "    beq     loc_fc2af0ea\n"
1056 "    cmp     r4, #0x1e\n"
1057 "    bne     loc_fc2af10c\n"
1058 "loc_fc2af0ea:\n"
1059 "    cmp     r0, #0x19\n"
1060 "    beq     loc_fc2af10c\n"
1061 "    cmp     r0, #0x1a\n"
1062 "    beq     loc_fc2af10c\n"
1063 "    cmp     r0, #0x1b\n"
1064 "    beq     loc_fc2af10c\n"
1065 "    cmp     r0, #0x1c\n"
1066 "    beq     loc_fc2af10c\n"
1067 "    cmp     r0, #0x1d\n"
1068 "    beq     loc_fc2af10c\n"
1069 "    cmp     r0, #0x1e\n"
1070 "    beq     loc_fc2af10c\n"
1071 "    cmp     r0, #0x44\n"
1072 "    beq     loc_fc2af10c\n"
1073 "    cmp     r0, #0x3f\n"
1074 "    beq     loc_fc2af10c\n"
1075 "    movs    r1, #1\n"
1076 "loc_fc2af10c:\n"
1077 "    cmp     r1, #1\n"
1078 "    bne     loc_fc2af118\n"
1079 "    movs    r0, #0\n"
1080 "    add     r1, sp, #0xc\n"
1081 "    bl      sub_fc2af05e\n"
1082 "loc_fc2af118:\n"
1083 "    ldr     r0, [sp, #0x28]\n"
1084 "    ldr     r1, [r0]\n"
1085 "    cmp     r1, #0x44\n"
1086 "    beq     loc_fc2af1ca\n"
1087 "    cmp     r1, #0x47\n"
1088 "    mov     r4, r1\n"
1089 "    bne     loc_fc2af13c\n"
1090 "    bl      sub_fc2b0374\n"
1091 "    ldr.w   r0, [fp, #0x1c]\n"
1092 "    movs    r1, #1\n"
1093 "    bl      _SetEventFlag\n"
1094 "    bl      _ExitTask\n"
1095 // below should not be reached
1096 //"    add     sp, #0x2c\n"
1097 //"    b       loc_fc2aede6\n" //  return
1098 "loc_fc2af13c:\n"
1099 "    cmp     r1, #0x46\n"
1100 "    bne     loc_fc2af14e\n"
1101 "    add.w   r0, r0, #0xac\n"
1102 "    ldrd    r2, r1, [r0]\n"
1103 "    mov     r0, r1\n"
1104 "    blx     r2\n"
1105 "    b       loc_fc2af614\n"
1106 "loc_fc2af14e:\n"
1107 "    cmp     r1, #0x3d\n"
1108 "    bne     loc_fc2af186\n"
1109 "    ldr     r0, [r5, #0x1c]\n"
1110 "    movs    r1, #0x80\n"
1111 "    bl      sub_fc369bc2\n" // ClearEventFlag
1112 "    ldr     r0, =0xfc2aa815\n"
1113 "    movs    r1, #0x80\n"
1114 "    bl      sub_fc0ecd5a\n"
1115 "    ldr     r0, [r5, #0x1c]\n"
1116 "    movs    r1, #0x80\n"
1117 "    movw    r2, #0xbb8\n"
1118 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1119 "    lsls    r0, r0, #0x1f\n"
1120 "    beq     loc_fc2af178\n"
1121 "    movw    r2, #0x1aa6\n"
1122 "    b       loc_fc2af216\n"
1123 "loc_fc2af178:\n"
1124 "    ldr     r1, [sp, #0x28]\n"
1125 "    add.w   r1, r1, #0xac\n"
1126 "    ldrd    r1, r0, [r1]\n"
1127 "    blx     r1\n"
1128 "    b       loc_fc2af614\n"
1129 "loc_fc2af186:\n"
1130 "    cmp     r1, #0x3e\n"
1131 "    bne     loc_fc2af1ba\n"
1132 "    add     r1, sp, #0xc\n"
1133 "    bl      sub_fc2af05e\n"
1134 "    movw    r6, #0x100\n"
1135 "    ldr     r0, [r5, #0x1c]\n"
1136 "    mov     r1, r6\n"
1137 "    bl      sub_fc369bc2\n" // ClearEventFlag
1138 "    ldr     r0, =0xfc2aa81f\n"
1139 "    mov     r1, r6\n"
1140 "    bl      sub_fc0ed72c\n"
1141 "    ldr     r0, [r5, #0x1c]\n"
1142 "    movw    r2, #0xbb8\n"
1143 "    mov     r1, r6\n"
1144 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1145 "    lsls    r0, r0, #0x1f\n"
1146 "    beq     loc_fc2af178\n"
1147 "    movw    r2, #0x1ab0\n"
1148 "    b       loc_fc2af216\n"
1149 "loc_fc2af1ba:\n"
1150 "    cmp     r1, #0x3f\n"
1151 "    bne     loc_fc2af1c6\n"
1152 "    add     r1, sp, #0xc\n"
1153 "    bl      sub_fc2af05e\n"
1154 "    b       loc_fc2af178\n"
1155 "loc_fc2af1c6:\n"
1156 "    cmp     r1, #0x44\n"
1157 "    bne     loc_fc2af1d8\n"
1158 "loc_fc2af1ca:\n"
1159 "    bl      sub_fc3c6f88\n"
1160 "    bl      sub_fc13cd64\n"
1161 "    bl      sub_fc13ca44\n"
1162 "    b       loc_fc2af178\n"
1163 "loc_fc2af1d8:\n"
1164 "    cmp     r1, #0x45\n"
1165 "    bne     loc_fc2af220\n"
1166 "    ldr     r0, [r5, #0x44]\n"
1167 "    bl      sub_fc30eca6\n"
1168 "    movs    r1, #4\n"
1169 "    mov     r6, r0\n"
1170 "    ldr     r0, [r5, #0x1c]\n"
1171 "    bl      sub_fc369bc2\n" // ClearEventFlag
1172 "    movs    r3, #1\n"
1173 "    ldr     r2, =0xfc2aa833\n"
1174 "    mov     r1, r6\n"
1175 "    mov     r0, sl\n"
1176 "    str     r3, [sp]\n"
1177 "    str     r3, [sp, #4]\n"
1178 "    movs    r3, #4\n"
1179 "    bl      sub_fc2aae72\n"
1180 "    bl      sub_fc3c6c90\n"
1181 "    ldr     r0, [r5, #0x1c]\n"
1182 "    movs    r1, #4\n"
1183 "    movw    r2, #0xbb8\n"
1184 "    bl      sub_fc369998\n" // WaitForAnyEventFlag
1185 "    lsls    r0, r0, #0x1f\n"
1186 "    beq     loc_fc2af178\n"
1187 "    movw    r2, #0x1bba\n"
1188 "loc_fc2af216:\n"
1189 "    ldr     r1, =0xfc2ab038\n" //  **"ExpDrv.c"
1190 "    movs    r0, #0\n"
1191 "    bl      _DebugAssert\n"
1192 "    b       loc_fc2af178\n"
1193 "loc_fc2af220:\n"
1194 "    movs    r6, #1\n"
1195 "    cmp     r1, #0x17\n"
1196 "    beq     loc_fc2af22a\n"
1197 "    cmp     r1, #0x18\n"
1198 "    bne     loc_fc2af268\n"
1199 "loc_fc2af22a:\n"
1200 "    ldr.w   r1, [r0, #0x94]\n"
1201 "    mov     r5, sb\n"
1202 "    add.w   r1, r1, r1, lsl #1\n"
1203 "    add.w   r1, r0, r1, lsl #2\n"
1204 "    subs    r1, #8\n"
1205 "    ldm     r1!, {r2, r3, r7}\n"
1206 "    stm     r5!, {r2, r3, r7}\n"
1207 "    bl      sub_fc2ad82a\n"
1208 "    ldr     r0, [sp, #0x28]\n"
1209 "    add.w   r0, r0, #0x94\n"
1210 "    ldrd    r3, r2, [r0, #0x18]\n"
1211 "    ldr     r1, [r0]\n"
1212 "    sub.w   r0, r0, #0x90\n"
1213 "    blx     r3\n"
1214 "    ldr     r0, [sp, #0x28]\n"
1215 "    bl      sub_fc2b04ee\n"
1216 "    ldr     r0, [sp, #0x28]\n"
1217 "    add.w   r0, r0, #0x94\n"
1218 "    ldr     r1, [r0]\n"
1219 "    ldrd    r3, r2, [r0, #0x20]\n"
1220 "    b       loc_fc2af510\n"
1221 "loc_fc2af268:\n"
1222 "    cmp     r1, #0x19\n"
1223 "    beq     loc_fc2af280\n"
1224 "    cmp     r1, #0x1a\n"
1225 "    beq     loc_fc2af280\n"
1226 "    cmp     r1, #0x1b\n"
1227 "    beq     loc_fc2af280\n"
1228 "    cmp     r1, #0x1c\n"
1229 "    beq     loc_fc2af280\n"
1230 "    cmp     r1, #0x1d\n"
1231 "    beq     loc_fc2af280\n"
1232 "    cmp     r1, #0x1e\n"
1233 "    bne     loc_fc2af2f2\n"
1234 "loc_fc2af280:\n"
1235 "    add     r3, sp, #0xc\n"
1236 "    mov     r2, sp\n"
1237 "    add     r1, sp, #0x1c\n"
1238 "    bl      sub_fc2ada14\n"
1239 "    cmp     r0, #1\n"
1240 "    mov     r5, r0\n"
1241 "    beq     loc_fc2af294\n"
1242 "    cmp     r5, #5\n"
1243 "    bne     loc_fc2af2aa\n"
1244 "loc_fc2af294:\n"
1245 "    ldr     r0, [sp, #0x28]\n"
1246 "    mov     r2, r5\n"
1247 "    add.w   r0, r0, #0x94\n"
1248 "    ldrd    r7, r3, [r0, #0x18]\n"
1249 "    ldr     r1, [r0]\n"
1250 "    sub.w   r0, r0, #0x90\n"
1251 "    blx     r7\n"
1252 "    b       loc_fc2af2d0\n"
1253 "loc_fc2af2aa:\n"
1254 "    cmp     r5, #2\n"
1255 "    beq     loc_fc2af2b2\n"
1256 "    cmp     r5, #6\n"
1257 "    bne     loc_fc2af2dc\n"
1258 "loc_fc2af2b2:\n"
1259 "    ldr     r0, [sp, #0x28]\n"
1260 "    mov     r2, r5\n"
1261 "    add.w   r0, r0, #0x94\n"
1262 "    ldrd    r7, r3, [r0, #0x18]\n"
1263 "    ldr     r1, [r0]\n"
1264 "    sub.w   r0, r0, #0x90\n"
1265 "    blx     r7\n"
1266 "    ldr     r0, [sp, #0x28]\n"
1267 "    add     r1, sp, #0x1c\n"
1268 "    mov     r2, sp\n"
1269 "    bl      sub_fc2aedea\n"
1270 "loc_fc2af2d0:\n"
1271 "    ldr     r2, [sp, #0xc]\n"
1272 "    mov     r1, r5\n"
1273 "    ldr     r0, [sp, #0x28]\n"
1274 "    bl      sub_fc2af00e\n"
1275 "loc_fc2af2da:\n"
1276 "    b       loc_fc2af516\n"
1277 "loc_fc2af2dc:\n"
1278 "    ldr     r0, [sp, #0x28]\n"
1279 "    mov     r2, r5\n"
1280 "    add.w   r0, r0, #0x94\n"
1281 "    ldrd    r7, r3, [r0, #0x18]\n"
1282 "    ldr     r1, [r0]\n"
1283 "    sub.w   r0, r0, #0x90\n"
1284 "    blx     r7\n"
1285 "    b       loc_fc2af516\n"
1286 "loc_fc2af2f2:\n"
1287 "    cmp     r1, #0x36\n"
1288 "    beq     loc_fc2af2fa\n"
1289 "    cmp     r1, #0x37\n"
1290 "    bne     loc_fc2af36a\n"
1291 "loc_fc2af2fa:\n"
1292 "    ldr.w   r1, [r0, #0x94]\n"
1293 "    mov     r7, sb\n"
1294 "    add.w   r1, r1, r1, lsl #1\n"
1295 "    add.w   r1, r0, r1, lsl #2\n"
1296 "    subs    r1, #8\n"
1297 "    ldm     r1, {r1, r2, r3}\n"
1298 "    stm     r7!, {r1, r2, r3}\n"
1299 "    bl      sub_fc2ac9c2\n"
1300 "    ldr     r0, [sp, #0x28]\n"
1301 "    add.w   r0, r0, #0x94\n"
1302 "    ldrd    r3, r2, [r0, #0x18]\n"
1303 "    ldr     r1, [r0]\n"
1304 "    sub.w   r0, r0, #0x90\n"
1305 "    blx     r3\n"
1306 "    bl      sub_fc3c6f88\n"
1307 "    bl      sub_fc13cd64\n"
1308 "    bl      sub_fc13ca44\n"
1309 "    movw    r7, #0xbb8\n"
1310 "    ldr     r0, [r5, #0x1c]\n"
1311 "    movs    r1, #2\n"
1312 "    mov     r2, r7\n"
1313 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1314 "    lsls    r0, r0, #0x1f\n"
1315 "    beq     loc_fc2af34e\n"
1316 "    ldr     r1, =0xfc2ab038\n" //  **"ExpDrv.c"
1317 "    movs    r0, #0\n"
1318 "    movw    r2, #0xf05\n"
1319 "    bl      _DebugAssert\n"
1320 "loc_fc2af34e:\n"
1321 "    ldr     r0, [r5, #0x1c]\n"
1322 "    movs    r1, #0x20\n"
1323 "    mov     r2, r7\n"
1324 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1325 "    lsls    r0, r0, #0x1f\n"
1326 "    beq     loc_fc2af2da\n"
1327 "    ldr     r1, =0xfc2ab038\n" //  **"ExpDrv.c"
1328 "    movs    r0, #0\n"
1329 "    movw    r2, #0xf09\n"
1330 "    bl      _DebugAssert\n"
1331 "    b       loc_fc2af516\n"
1332 "loc_fc2af36a:\n"
1333 "    adds    r2, r0, #4\n"
1334 "    mov     r1, sb\n"
1335 "    ldm     r2!, {r3, r5, r7}\n"
1336 "    stm     r1!, {r3, r5, r7}\n"
1337 "    ldr     r1, [r0]\n"
1338 "    cmp     r1, #0x3d\n"
1339 "    bhs     loc_fc2af3be\n"
1340 "    tbb     [pc, r1]\n" // (jumptable r1 61 elements)
1341 "branchtable_fc2af37c:\n"
1342 "    .byte((loc_fc2af3ba - branchtable_fc2af37c) / 2)\n" // (case 0)
1343 "    .byte((loc_fc2af3ba - branchtable_fc2af37c) / 2)\n" // (case 1)
1344 "    .byte((loc_fc2af3ba - branchtable_fc2af37c) / 2)\n" // (case 2)
1345 "    .byte((loc_fc2af3c0 - branchtable_fc2af37c) / 2)\n" // (case 3)
1346 "    .byte((loc_fc2af3c6 - branchtable_fc2af37c) / 2)\n" // (case 4)
1347 "    .byte((loc_fc2af3c6 - branchtable_fc2af37c) / 2)\n" // (case 5)
1348 "    .byte((loc_fc2af3c6 - branchtable_fc2af37c) / 2)\n" // (case 6)
1349 "    .byte((loc_fc2af3ba - branchtable_fc2af37c) / 2)\n" // (case 7)
1350 "    .byte((loc_fc2af3c0 - branchtable_fc2af37c) / 2)\n" // (case 8)
1351 "    .byte((loc_fc2af3c6 - branchtable_fc2af37c) / 2)\n" // (case 9)
1352 "    .byte((loc_fc2af3c6 - branchtable_fc2af37c) / 2)\n" // (case 10)
1353 "    .byte((loc_fc2af3d8 - branchtable_fc2af37c) / 2)\n" // (case 11)
1354 "    .byte((loc_fc2af3d8 - branchtable_fc2af37c) / 2)\n" // (case 12)
1355 "    .byte((loc_fc2af3de - branchtable_fc2af37c) / 2)\n" // (case 13)
1356 "    .byte((loc_fc2af3de - branchtable_fc2af37c) / 2)\n" // (case 14)
1357 "    .byte((loc_fc2af3de - branchtable_fc2af37c) / 2)\n" // (case 15)
1358 "    .byte((loc_fc2af3de - branchtable_fc2af37c) / 2)\n" // (case 16)
1359 "    .byte((loc_fc2af4f4 - branchtable_fc2af37c) / 2)\n" // (case 17)
1360 "    .byte((loc_fc2af4fa - branchtable_fc2af37c) / 2)\n" // (case 18)
1361 "    .byte((loc_fc2af4fa - branchtable_fc2af37c) / 2)\n" // (case 19)
1362 "    .byte((loc_fc2af4fa - branchtable_fc2af37c) / 2)\n" // (case 20)
1363 "    .byte((loc_fc2af4fa - branchtable_fc2af37c) / 2)\n" // (case 21)
1364 "    .byte((loc_fc2af500 - branchtable_fc2af37c) / 2)\n" // (case 22)
1365 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 23)
1366 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 24)
1367 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 25)
1368 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 26)
1369 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 27)
1370 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 28)
1371 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 29)
1372 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 30)
1373 "    .byte((loc_fc2af3cc - branchtable_fc2af37c) / 2)\n" // (case 31)
1374 "    .byte((loc_fc2af3d2 - branchtable_fc2af37c) / 2)\n" // (case 32)
1375 "    .byte((loc_fc2af3d2 - branchtable_fc2af37c) / 2)\n" // (case 33)
1376 "    .byte((loc_fc2af3d2 - branchtable_fc2af37c) / 2)\n" // (case 34)
1377 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 35)
1378 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 36)
1379 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 37)
1380 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 38)
1381 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 39)
1382 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 40)
1383 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 41)
1384 "    .byte((loc_fc2af3e4 - branchtable_fc2af37c) / 2)\n" // (case 42)
1385 "    .byte((loc_fc2af3ea - branchtable_fc2af37c) / 2)\n" // (case 43)
1386 "    .byte((loc_fc2af43e - branchtable_fc2af37c) / 2)\n" // (case 44)
1387 "    .byte((loc_fc2af472 - branchtable_fc2af37c) / 2)\n" // (case 45)
1388 "    .byte((loc_fc2af472 - branchtable_fc2af37c) / 2)\n" // (case 46)
1389 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 47)
1390 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 48)
1391 "    .byte((loc_fc2af47a - branchtable_fc2af37c) / 2)\n" // (case 49)
1392 "    .byte((loc_fc2af47a - branchtable_fc2af37c) / 2)\n" // (case 50)
1393 "    .byte((loc_fc2af4ae - branchtable_fc2af37c) / 2)\n" // (case 51)
1394 "    .byte((loc_fc2af4e2 - branchtable_fc2af37c) / 2)\n" // (case 52)
1395 "    .byte((loc_fc2af4e2 - branchtable_fc2af37c) / 2)\n" // (case 53)
1396 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 54)
1397 "    .byte((loc_fc2af504 - branchtable_fc2af37c) / 2)\n" // (case 55)
1398 "    .byte((loc_fc2af4e8 - branchtable_fc2af37c) / 2)\n" // (case 56)
1399 "    .byte((loc_fc2af4e8 - branchtable_fc2af37c) / 2)\n" // (case 57)
1400 "    .byte((loc_fc2af4e8 - branchtable_fc2af37c) / 2)\n" // (case 58)
1401 "    .byte((loc_fc2af4ee - branchtable_fc2af37c) / 2)\n" // (case 59)
1402 "    .byte((loc_fc2af4ee - branchtable_fc2af37c) / 2)\n" // (case 60)
1403 ".align 1\n"
1404 "loc_fc2af3ba:\n"
1405 "    bl      sub_fc2ab0e0\n"
1406 "loc_fc2af3be:\n"
1407 "    b       loc_fc2af504\n"
1408 "loc_fc2af3c0:\n"
1409 "    bl      sub_fc2ab36e\n"
1410 "    b       loc_fc2af504\n"
1411 "loc_fc2af3c6:\n"
1412 "    bl      sub_fc2ab5a2\n"
1413 "    b       loc_fc2af504\n"
1414 "loc_fc2af3cc:\n"
1415 "    bl      sub_fc2ab868\n"
1416 "    b       loc_fc2af504\n"
1417 "loc_fc2af3d2:\n"
1418 "    bl      sub_fc2aba2e\n"
1419 "    b       loc_fc2af504\n"
1420 "loc_fc2af3d8:\n"
1421 "    bl      sub_fc2abe8c\n"
1422 "    b       loc_fc2af504\n"
1423 "loc_fc2af3de:\n"
1424 //"    bl      sub_fc2abf7e\n"
1425 "    bl      sub_fc2abf7e_my\n" // ->
1426 "    b       loc_fc2af476\n"
1427 "loc_fc2af3e4:\n"
1428 "    bl      sub_fc2ac078\n"
1429 "    b       loc_fc2af504\n"
1430 "loc_fc2af3ea:\n"
1431 "    ldrh    r1, [r0, #4]\n"
1432 "    strh.w  r1, [sp, #0x1c]\n"
1433 "    ldrh.w  r2, [r8, #2]\n"
1434 "    strh.w  r2, [sp, #0x1e]\n"
1435 "    ldrh.w  r2, [r8, #4]\n"
1436 "    strh.w  r2, [sp, #0x20]\n"
1437 "    ldrh.w  r2, [r8, #6]\n"
1438 "    strh.w  r2, [sp, #0x22]\n"
1439 "    ldrh    r2, [r0, #0xc]\n"
1440 "    strh.w  r2, [sp, #0x24]\n"
1441 "    ldrh.w  r1, [r8, #0xa]\n"
1442 "    strh.w  r1, [sp, #0x26]\n"
1443 "    b       loc_fc2af438\n"
1444 ".ltorg\n"
1445 // firmware had literal pool here
1446 // d0 e1 00 00
1447 // 38 b0 2a fc
1448 // 29 a8 2a fc
1449 // 08 55 06 00
1450 // 00 f4 ff ff
1451 // 15 a8 2a fc
1452 // 15 a8 2a fc
1453 // 33 a8 2a fc
1454 "loc_fc2af438:\n"
1455 "    bl      sub_fc2ac652\n"
1456 "    b       loc_fc2af504\n"
1457 "loc_fc2af43e:\n"
1458 "    ldrh    r1, [r0, #4]\n"
1459 "    strh.w  r1, [sp, #0x1c]\n"
1460 "    ldrh.w  r2, [r8, #2]\n"
1461 "    strh.w  r2, [sp, #0x1e]\n"
1462 "    ldrh.w  r2, [r8, #4]\n"
1463 "    strh.w  r2, [sp, #0x20]\n"
1464 "    ldrh.w  r2, [r8, #6]\n"
1465 "    strh.w  r2, [sp, #0x22]\n"
1466 "    ldrh.w  r2, [r8, #8]\n"
1467 "    strh.w  r2, [sp, #0x24]\n"
1468 "    ldrh.w  r1, [r8, #0xa]\n"
1469 "    strh.w  r1, [sp, #0x26]\n"
1470 "    bl      sub_fc2ac70c\n"
1471 "    b       loc_fc2af504\n"
1472 "loc_fc2af472:\n"
1473 "    bl      sub_fc2ac70c\n"
1474 "loc_fc2af476:\n"
1475 "    movs    r6, #0\n"
1476 "    b       loc_fc2af504\n"
1477 "loc_fc2af47a:\n"
1478 "    ldrh.w  r2, [r8]\n"
1479 "    strh.w  r2, [sp, #0x1c]\n"
1480 "    ldrh    r2, [r0, #6]\n"
1481 "    strh.w  r2, [sp, #0x1e]\n"
1482 "    ldrh.w  r2, [r8, #4]\n"
1483 "    strh.w  r2, [sp, #0x20]\n"
1484 "    ldrh.w  r2, [r8, #6]\n"
1485 "    strh.w  r2, [sp, #0x22]\n"
1486 "    ldrh.w  r2, [r8, #8]\n"
1487 "    strh.w  r2, [sp, #0x24]\n"
1488 "    ldrh.w  r1, [r8, #0xa]\n"
1489 "    strh.w  r1, [sp, #0x26]\n"
1490 "    bl      sub_fc2b03f0\n"
1491 "    b       loc_fc2af504\n"
1492 "loc_fc2af4ae:\n"
1493 "    ldrh.w  r2, [r8]\n"
1494 "    strh.w  r2, [sp, #0x1c]\n"
1495 "    ldrh.w  r2, [r8, #2]\n"
1496 "    strh.w  r2, [sp, #0x1e]\n"
1497 "    ldrh.w  r2, [r8, #4]\n"
1498 "    strh.w  r2, [sp, #0x20]\n"
1499 "    ldrh.w  r2, [r8, #6]\n"
1500 "    strh.w  r2, [sp, #0x22]\n"
1501 "    ldrh    r2, [r0, #0xc]\n"
1502 "    strh.w  r2, [sp, #0x24]\n"
1503 "    ldrh.w  r1, [r8, #0xa]\n"
1504 "    strh.w  r1, [sp, #0x26]\n"
1505 "    bl      sub_fc2b047c\n"
1506 "    b       loc_fc2af504\n"
1507 "loc_fc2af4e2:\n"
1508 "    bl      sub_fc2ac7a6\n"
1509 "    b       loc_fc2af504\n"
1510 "loc_fc2af4e8:\n"
1511 "    bl      sub_fc2acdcc\n"
1512 "    b       loc_fc2af504\n"
1513 "loc_fc2af4ee:\n"
1514 "    bl      sub_fc2ad1a4\n"
1515 "    b       loc_fc2af504\n"
1516 "loc_fc2af4f4:\n"
1517 "    bl      sub_fc2ad3ee\n"
1518 "    b       loc_fc2af504\n"
1519 "loc_fc2af4fa:\n"
1520 "    bl      sub_fc2ad554\n"
1521 "    b       loc_fc2af504\n"
1522 "loc_fc2af500:\n"
1523 "    bl      sub_fc2ad682\n"
1524 "loc_fc2af504:\n"
1525 "    ldr     r0, [sp, #0x28]\n"
1526 "    add.w   r0, r0, #0x94\n"
1527 "    ldrd    r3, r2, [r0, #0x18]\n"
1528 "    ldr     r1, [r0]\n"
1529 "loc_fc2af510:\n"
1530 "    sub.w   r0, r0, #0x90\n"
1531 "    blx     r3\n"
1532 "loc_fc2af516:\n"
1533 "    ldr     r0, [sp, #0x28]\n"
1534 "    ldr     r0, [r0]\n"
1535 "    cmp     r0, #0x14\n"
1536 "    beq     loc_fc2af570\n"
1537 "    bgt     loc_fc2af532\n"
1538 "    cmp     r0, #1\n"
1539 "    beq     loc_fc2af542\n"
1540 "    cmp     r0, #5\n"
1541 "    beq     loc_fc2af542\n"
1542 "    cmp     r0, #0x12\n"
1543 "    beq     loc_fc2af570\n"
1544 "    cmp     r0, #0x13\n"
1545 "    bne     loc_fc2af586\n"
1546 "    b       loc_fc2af542\n"
1547 "loc_fc2af532:\n"
1548 "    cmp     r0, #0x15\n"
1549 "    beq     loc_fc2af542\n"
1550 "    cmp     r0, #0x18\n"
1551 "    beq     loc_fc2af542\n"
1552 "    cmp     r0, #0x1e\n"
1553 "    beq     loc_fc2af542\n"
1554 "    cmp     r0, #0x21\n"
1555 "    bne     loc_fc2af586\n"
1556 "loc_fc2af542:\n"
1557 "    ldrsh.w r0, [r8]\n"
1558 "    mov     r1, r8\n"
1559 "    mov     r2, sl\n"
1560 "    cmp     r0, sl\n"
1561 "    beq     loc_fc2af556\n"
1562 "    ldrsh.w r1, [r1, #8]\n"
1563 "    cmp     r1, r2\n"
1564 "    bne     loc_fc2af566\n"
1565 "loc_fc2af556:\n"
1566 "    add     r0, sp, #0x10\n"
1567 "    bl      sub_fc2f8d68\n" // get_current_exp
1568 "    ldrh.w  r0, [sp, #0x10]\n"
1569 "    strh.w  r0, [sp, #0x1c]\n"
1570 "    b       loc_fc2af57e\n"
1571 "loc_fc2af566:\n"
1572 "    strh.w  r0, [sp, #0x1c]\n"
1573 "    strh.w  r1, [sp, #0x24]\n"
1574 "    b       loc_fc2af586\n"
1575 "loc_fc2af570:\n"
1576 "    ldrsh.w r0, [r8, #8]\n"
1577 "    cmp     r0, sl\n"
1578 "    bne     loc_fc2af582\n"
1579 "    add     r0, sp, #0x10\n"
1580 "    bl      sub_fc2f8d68\n" // get_current_exp
1581 "loc_fc2af57e:\n"
1582 "    ldrh.w  r0, [sp, #0x18]\n"
1583 "loc_fc2af582:\n"
1584 "    strh.w  r0, [sp, #0x24]\n"
1585 "loc_fc2af586:\n"
1586 "    cmp     r6, #1\n"
1587 "    ldr     r0, [sp, #0x28]\n"
1588 "    bne     loc_fc2af5be\n"
1589 "    movs    r2, #0xc\n"
1590 "    ldr.w   r1, [r0, #0x94]\n"
1591 "    add.w   r1, r1, r1, lsl #1\n"
1592 "    add.w   r5, r0, r1, lsl #2\n"
1593 "    ldr     r0, =0x00065508\n"
1594 "    subs    r5, #8\n"
1595 "    add     r1, sp, #0x1c\n"
1596 "    blx     sub_fc301dbc\n"
1597 "    ldr     r0, =0x00065508\n"
1598 "    movs    r2, #0xc\n"
1599 "    add     r1, sp, #0x1c\n"
1600 "    adds    r0, #0xc\n"
1601 "    blx     sub_fc301dbc\n"
1602 "    ldr     r0, =0x00065508\n"
1603 "    movs    r2, #0xc\n"
1604 "    mov     r1, r5\n"
1605 "    adds    r0, #0x18\n"
1606 "    blx     sub_fc301dbc\n"
1607 "    b       loc_fc2af614\n"
1608 "loc_fc2af5be:\n"
1609 "    ldr     r0, [r0]\n"
1610 "    mov.w   r3, #1\n"
1611 "    cmp     r0, #0xf\n"
1612 "    bne     loc_fc2af5e8\n"
1613 "    movs    r2, #0\n"
1614 "    mov     r1, r3\n"
1615 "    strd    r2, r3, [sp]\n"
1616 "    movs    r0, #0\n"
1617 "    mov     r2, r3\n"
1618 "    bl      sub_fc2aaeac\n"
1619 "    movs    r3, #1\n"
1620 "    movs    r2, #0\n"
1621 "    mov     r1, r3\n"
1622 "    movs    r0, #0\n"
1623 "    strd    r2, r3, [sp]\n"
1624 "    mov     r2, r3\n"
1625 "    b       loc_fc2af610\n"
1626 "loc_fc2af5e8:\n"
1627 "    movs    r2, #1\n"
1628 "    strd    r2, r3, [sp]\n"
1629 "    mov     r3, r2\n"
1630 "    mov     r1, r2\n"
1631 "    mov     r0, r2\n"
1632 "    bl      sub_fc2aaeac\n"
1633 "    ldr     r0, [sp, #0x28]\n"
1634 "    ldr     r0, [r0]\n"
1635 "    cmp     r0, #0x2f\n"
1636 "    beq     loc_fc2af614\n"
1637 "    cmp     r0, #0x30\n"
1638 "    beq     loc_fc2af614\n"
1639 "    movs    r3, #1\n"
1640 "    str     r3, [sp]\n"
1641 "    mov     r2, r3\n"
1642 "    mov     r1, r3\n"
1643 "    mov     r0, r3\n"
1644 "    str     r3, [sp, #4]\n"
1645 "loc_fc2af610:\n"
1646 "    bl      sub_fc2ab05c\n"
1647 "loc_fc2af614:\n"
1648 "    ldr     r0, [sp, #0x28]\n"
1649 "    bl      sub_fc2b0374\n"
1650 "    b       loc_fc2af0be\n"
1651 ".ltorg\n"
1652     );
1653 }
1654 
1655 // -f=chdk -s=0xfc2abf7f -eret
1656 void __attribute__((naked,noinline)) sub_fc2abf7e_my() {
1657     asm volatile (
1658 "    push.w  {r4, r5, r6, r7, r8, lr}\n"
1659 "    ldr     r7, =0x0000e1d0\n"
1660 "    movs    r1, #0x3e\n"
1661 "    mov     r4, r0\n"
1662 "    ldr     r0, [r7, #0x1c]\n"
1663 "    bl      sub_fc369bc2\n" // ClearEventFlag
1664 "    movs    r2, #0\n"
1665 "    ldrsh.w r0, [r4, #4]\n"
1666 "    movs    r3, #1\n"
1667 "    mov     r1, r2\n"
1668 "    bl      sub_fc2aa874\n"
1669 "    mov     r6, r0\n"
1670 "    ldrsh.w r0, [r4, #6]\n"
1671 "    bl      sub_fc2aaa0e\n"
1672 "    ldrsh.w r0, [r4, #8]\n"
1673 "    bl      sub_fc2aaa54\n"
1674 "    ldrsh.w r0, [r4, #0xa]\n"
1675 "    bl      sub_fc2aaa9a\n"
1676 "    ldrsh.w r0, [r4, #0xc]\n"
1677 "    movs    r1, #0\n"
1678 "    bl      sub_fc2aaae0\n"
1679 "    mov     r5, r0\n"
1680 "    ldr     r0, [r4]\n"
1681 "    ldr.w   r8, =0x00065520\n"
1682 "    cmp     r0, #0xf\n"
1683 "    beq     loc_fc2abfd0\n"
1684 "    cmp     r0, #0x10\n"
1685 "    bne     loc_fc2abfd6\n"
1686 "loc_fc2abfd0:\n"
1687 "    movs    r6, #0\n"
1688 "    mov     r5, r6\n"
1689 "    b       loc_fc2abfee\n"
1690 "loc_fc2abfd6:\n"
1691 "    cmp     r6, #1\n"
1692 "    bne     loc_fc2abfee\n"
1693 "    ldrsh.w r0, [r4, #4]\n"
1694 "    movs    r2, #2\n"
1695 "    ldr     r1, =0xfc2aa80b\n"
1696 "    bl      sub_fc0ecf9e\n"
1697 "    strh    r0, [r4, #4]\n"
1698 "    movs    r0, #0\n"
1699 "    str     r0, [r7, #0x28]\n"
1700 "    b       loc_fc2abff4\n"
1701 "loc_fc2abfee:\n"
1702 "    ldrh.w  r0, [r8]\n"
1703 "    strh    r0, [r4, #4]\n"
1704 "loc_fc2abff4:\n"
1705 "    cmp     r5, #1\n"
1706 "    bne     loc_fc2ac006\n"
1707 "    ldrsh.w r0, [r4, #0xc]\n"
1708 "    movs    r2, #0x20\n"
1709 "    ldr     r1, =0xfc2aa85f\n"
1710 "    bl      sub_fc2b03c6\n"
1711 "    b       loc_fc2ac00a\n"
1712 "loc_fc2ac006:\n"
1713 "    ldrh.w  r0, [r8, #8]\n"
1714 "loc_fc2ac00a:\n"
1715 "    strh    r0, [r4, #0xc]\n"
1716 "    ldrsh.w r0, [r4, #6]\n"
1717 //"    bl      sub_fc3c6d08\n"
1718 "    bl      sub_fc3c6d08_my\n" // ->
1719 "    ldr     pc, =0xfc2ac015\n" // continue in firmware
1720 ".ltorg\n"
1721 /*
1722 "    ldrsh.w r0, [r4, #8]\n"
1723 "    movs    r1, #1\n"
1724 "    bl      sub_fc13c774\n"
1725 "    movs    r1, #0\n"
1726 "    add.w   r0, r4, #8\n"
1727 "    bl      sub_fc13c7dc\n"
1728 "    ldrsh.w r0, [r4, #0xe]\n"
1729 "    bl      sub_fc120df8\n"
1730 "    cmp     r6, #1\n"
1731 "    movw    r4, #0xbb8\n"
1732 "    bne     loc_fc2ac052\n"
1733 "    ldr     r0, [r7, #0x1c]\n"
1734 "    movs    r1, #2\n"
1735 "    mov     r2, r4\n"
1736 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1737 "    lsls    r0, r0, #0x1f\n"
1738 "    beq     loc_fc2ac052\n"
1739 "    ldr     r1, =0xfc2ab038\n" //  **"ExpDrv.c"
1740 "    movs    r0, #0\n"
1741 "    movw    r2, #0xa27\n"
1742 "    bl      _DebugAssert\n"
1743 "loc_fc2ac052:\n"
1744 "    cmp     r5, #1\n"
1745 "    bne     loc_fc2ac074\n" //  return
1746 "    ldr     r0, [r7, #0x1c]\n"
1747 "    movs    r1, #0x20\n"
1748 "    mov     r2, r4\n"
1749 "    bl      sub_fc369a18\n" // WaitForAllEventFlag
1750 "    lsls    r0, r0, #0x1f\n"
1751 "    beq     loc_fc2ac074\n" //  return
1752 "    pop.w   {r4, r5, r6, r7, r8, lr}\n"
1753 "    ldr     r1, =0xfc2ab038\n" //  **"ExpDrv.c"
1754 "    movs    r0, #0\n"
1755 "    movw    r2, #0xa2d\n"
1756 "    b.w     _DebugAssert\n"
1757 "loc_fc2ac074:\n"
1758 "    pop.w   {r4, r5, r6, r7, r8, pc}\n"
1759 */
1760     );
1761 }
1762 
1763 // -f=chdk -s=0xfc3c6d09 -eret
1764 void __attribute__((naked,noinline)) sub_fc3c6d08_my() {
1765 asm volatile (
1766 "    push    {r4, r5, r6, lr}\n"
1767 "    ldr     r5, =0x0000f0f4\n"
1768 "    mov     r4, r0\n"
1769 "    ldr     r0, [r5, #4]\n"
1770 "    cmp     r0, #1\n"
1771 "    beq     loc_fc3c6d22\n"
1772 "    movw    r2, #0x174\n"
1773 "    ldr     r1, =0xfc3c6cf0\n" //  *"Shutter.c"
1774 "    movs    r0, #0\n"
1775 "    bl      _DebugAssert\n"
1776 "loc_fc3c6d22:\n"
1777 "    ldr     r0, =0xfffff400\n"
1778 "    cmp     r4, r0\n"
1779 "    bne     loc_fc3c6d2c\n"
1780 "    ldrsh.w r4, [r5, #2]\n"
1781 "loc_fc3c6d2c:\n"
1782 "    strh    r4, [r5, #2]\n"
1783 "    cmp     r4, r0\n"
1784 "    bne     loc_fc3c6d40\n"
1785 "    movw    r2, #0x17a\n"
1786 "    ldr     r1, =0xfc3c6cf0\n" //  *"Shutter.c"
1787 "    movs    r0, #0\n"
1788 "    bl      _DebugAssert\n"
1789 "loc_fc3c6d40:\n"
1790 "    mov     r0, r4\n"
1791 //"    bl      _apex2us\n"
1792 "    bl      apex2us\n" // +
1793 "    ldr     pc, =0xfc3c6d47\n" // jump back to firmware
1794 /*
1795 "    mov     r4, r0\n"
1796 "    bl      sub_fc3c64d6\n" //  return
1797 "    mov     r0, r4\n"
1798 "    bl      sub_fc1419f4\n"
1799 "    lsls    r0, r0, #0x1f\n"
1800 "    beq     loc_fc3c6d68\n" //  return
1801 "    movw    r2, #0x17f\n"
1802 "    ldr     r1, =0xfc3c6cf0\n" //  *"Shutter.c"
1803 "    pop.w   {r4, r5, r6, lr}\n"
1804 "    movs    r0, #0\n"
1805 "    b.w     _DebugAssert\n"
1806 "loc_fc3c6d68:\n"
1807 "    pop     {r4, r5, r6, pc}\n"
1808 */
1809 ".ltorg\n"
1810     );
1811 }

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