This source file includes following definitions.
- taskHook
- CreateTask_spytask
- boot
- sub_FFC00354_my
- sub_FFC01198_my
- sub_FFC05E58_my
- taskcreate_Startup_my
- taskcreate_PhySw_my
- task_Startup_my
- init_file_modules_task
- sub_FFC714F4_my
- sub_FFC556EC_my
- sub_FFC55314_my
- sub_FFC55034_my
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4 #include "dryos31.h"
5
6 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
7
8 const char * const new_sa = &_end;
9
10 extern void task_PhySw();
11 extern void task_CaptSeq();
12 extern void task_InitFileModules();
13 extern void task_RotaryEncoder();
14 extern void task_MovieRecord();
15 extern void task_ExpDrv();
16 extern void task_FileWrite();
17
18 void taskHook(context_t **context)
19 {
20 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
21
22 if(tcb->entry == (void*)task_PhySw) tcb->entry = (void*)mykbd_task;
23 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
24 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
25 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
26 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
27 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
28 }
29
30 void CreateTask_spytask() {
31 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
32 };
33
34 void __attribute__((naked,noinline)) boot() {
35 asm volatile (
36 "LDR R1, =0xC0410000\n"
37 "MOV R0, #0\n"
38 "STR R0, [R1]\n"
39 "MOV R1, #0x78\n"
40 "MCR p15, 0, R1,c1,c0\n"
41 "MOV R1, #0\n"
42 "MCR p15, 0, R1,c7,c10, 4\n"
43 "loc_FFC00028:\n"
44 "MCR p15, 0, R1,c7,c5\n"
45 "MCR p15, 0, R1,c7,c6\n"
46 "MOV R0, #0x3D\n"
47 "MCR p15, 0, R0,c6,c0\n"
48 "MOV R0, #0xC000002F\n"
49 "MCR p15, 0, R0,c6,c1\n"
50 "MOV R0, #0x33\n"
51 "MCR p15, 0, R0,c6,c2\n"
52 "MOV R0, #0x40000033\n"
53 "MCR p15, 0, R0,c6,c3\n"
54 "MOV R0, #0x80000017\n"
55 "MCR p15, 0, R0,c6,c4\n"
56 "LDR R0, =0xFFC0002B\n"
57 "MCR p15, 0, R0,c6,c5\n"
58 "MOV R0, #0x34\n"
59 "MCR p15, 0, R0,c2,c0\n"
60 "MOV R0, #0x34\n"
61 "MCR p15, 0, R0,c2,c0, 1\n"
62 "MOV R0, #0x34\n"
63 "MCR p15, 0, R0,c3,c0\n"
64 "LDR R0, =0x3333330\n"
65 "MCR p15, 0, R0,c5,c0, 2\n"
66 "LDR R0, =0x3333330\n"
67 "MCR p15, 0, R0,c5,c0, 3\n"
68 "MRC p15, 0, R0,c1,c0\n"
69 "ORR R0, R0, #0x1000\n"
70 "ORR R0, R0, #4\n"
71 "ORR R0, R0, #1\n"
72 "MCR p15, 0, R0,c1,c0\n"
73 "MOV R1, #0x80000006\n"
74 "MCR p15, 0, R1,c9,c1\n"
75 "MOV R1, #6\n"
76 "MCR p15, 0, R1,c9,c1, 1\n"
77 "MRC p15, 0, R1,c1,c0\n"
78 "ORR R1, R1, #0x50000\n"
79 "MCR p15, 0, R1,c1,c0\n"
80 "LDR R2, =0xC0200000\n"
81 "MOV R1, #1\n"
82 "STR R1, [R2,#0x10C]\n"
83 "MOV R1, #0xFF\n"
84 "STR R1, [R2,#0xC]\n"
85 "STR R1, [R2,#0x1C]\n"
86 "STR R1, [R2,#0x2C]\n"
87 "STR R1, [R2,#0x3C]\n"
88 "STR R1, [R2,#0x4C]\n"
89 "STR R1, [R2,#0x5C]\n"
90 "STR R1, [R2,#0x6C]\n"
91 "STR R1, [R2,#0x7C]\n"
92 "STR R1, [R2,#0x8C]\n"
93 "STR R1, [R2,#0x9C]\n"
94 "STR R1, [R2,#0xAC]\n"
95 "STR R1, [R2,#0xBC]\n"
96 "STR R1, [R2,#0xCC]\n"
97 "STR R1, [R2,#0xDC]\n"
98 "STR R1, [R2,#0xEC]\n"
99 "STR R1, [R2,#0xFC]\n"
100 "LDR R1, =0xC0400008\n"
101 "LDR R2, =0x430005\n"
102 "STR R2, [R1]\n"
103 "MOV R1, #1\n"
104 "LDR R2, =0xC0243100\n"
105 "STR R2, [R1]\n"
106 "LDR R2, =0xC0242010\n"
107 "LDR R1, [R2]\n"
108 "ORR R1, R1, #1\n"
109 "STR R1, [R2]\n"
110 "LDR R0, =0xFFF16384\n"
111 "LDR R1, =0x1900\n"
112 "LDR R3, =0xB4B8\n"
113 "loc_FFC0013C:\n"
114 "CMP R1, R3\n"
115 "LDRCC R2, [R0],#4\n"
116 "STRCC R2, [R1],#4\n"
117 "BCC loc_FFC0013C\n"
118 "LDR R1, =0x12E9FC\n"
119 "MOV R2, #0\n"
120 "loc_FFC00154:\n"
121 "CMP R3, R1\n"
122 "STRCC R2, [R3],#4\n"
123 "BCC loc_FFC00154\n"
124 "B sub_FFC00354_my\n"
125 );
126 };
127
128
129 void __attribute__((naked,noinline)) sub_FFC00354_my() {
130
131 *(int*)0x1938=(int)taskHook;
132 *(int*)(0x221c+4)= (*(int*)0xc0220024)&1 ? 0x200000 : 0x100000;
133 asm volatile (
134 "LDR R0, =0xFFC003CC\n"
135 "MOV R1, #0\n"
136 "LDR R3, =0xFFC00404\n"
137 "loc_FFC00360:\n"
138 "CMP R0, R3\n"
139 "LDRCC R2, [R0],#4\n"
140 "STRCC R2, [R1],#4\n"
141 "BCC loc_FFC00360\n"
142 "LDR R0, =0xFFC00404\n"
143 "MOV R1, #0x4B0\n"
144 "LDR R3, =0xFFC00618\n"
145 "loc_FFC0037C:\n"
146 "CMP R0, R3\n"
147 "LDRCC R2, [R0],#4\n"
148 "STRCC R2, [R1],#4\n"
149 "BCC loc_FFC0037C\n"
150 "MOV R0, #0xD2\n"
151 "MSR CPSR_cxsf, R0\n"
152 "MOV SP, #0x1000\n"
153 "MOV R0, #0xD3\n"
154 "MSR CPSR_cxsf, R0\n"
155 "MOV SP, #0x1000\n"
156 "LDR R0, =0x6C4\n"
157 "LDR R2, =0xEEEEEEEE\n"
158 "MOV R3, #0x1000\n"
159 "loc_FFC003B0:\n"
160 "CMP R0, R3\n"
161 "STRCC R2, [R0],#4\n"
162 "BCC loc_FFC003B0\n"
163 "BL sub_FFC01198_my\n"
164 );
165 }
166
167 void __attribute__((naked,noinline)) sub_FFC01198_my() {
168 asm volatile (
169 "STR LR, [SP,#-4]!\n"
170 "SUB SP, SP, #0x74\n"
171 "MOV R0, SP\n"
172 "MOV R1, #0x74\n"
173 "BL sub_FFEA2FB4\n"
174 "MOV R0, #0x53000\n"
175 "STR R0, [SP,#4]\n"
176
177 #if defined(CHDK_NOT_IN_CANON_HEAP)
178 "LDR R0, =0x12E9FC\n"
179 #else
180 "LDR R0, =new_sa\n"
181 "LDR R0, [R0]\n"
182 #endif
183 "LDR R2, =0x2F9C00\n"
184 "LDR R1, =0x2F24A8\n"
185 "STR R0, [SP,#8]\n"
186 "SUB R0, R1, R0\n"
187 "ADD R3, SP, #0xC\n"
188 "STR R2, [SP]\n"
189 "STMIA R3, {R0-R2}\n"
190 "MOV R0, #0x22\n"
191 "STR R0, [SP,#0x18]\n"
192 "MOV R0, #0x68\n"
193 "STR R0, [SP,#0x1C]\n"
194 "LDR R0, =0x19B\n"
195 "LDR R1, =sub_FFC05E58_my\n"
196 "STR R0, [SP,#0x20]\n"
197 "MOV R0, #0x96\n"
198 "STR R0, [SP,#0x24]\n"
199 "MOV R0, #0x78\n"
200 "STR R0, [SP,#0x28]\n"
201 "MOV R0, #0x64\n"
202 "STR R0, [SP,#0x2C]\n"
203 "MOV R0, #0\n"
204 "STR R0, [SP,#0x30]\n"
205 "STR R0, [SP,#0x34]\n"
206 "MOV R0, #0x10\n"
207 "STR R0, [SP,#0x5C]\n"
208 "MOV R0, #0x800\n"
209 "STR R0, [SP,#0x60]\n"
210 "MOV R0, #0xA0\n"
211 "STR R0, [SP,#0x64]\n"
212 "MOV R0, #0x280\n"
213 "STR R0, [SP,#0x68]\n"
214 "MOV R0, SP\n"
215 "MOV R2, #0\n"
216 "BL sub_FFC03404\n"
217 "ADD SP, SP, #0x74\n"
218 "LDR PC, [SP],#4\n"
219 );
220 }
221
222
223 void __attribute__((naked,noinline)) sub_FFC05E58_my() {
224 asm volatile (
225 "STMFD SP!, {R4,LR}\n"
226 "BL sub_FFC00B20\n"
227 "BL sub_FFC0A244\n"
228 "CMP R0, #0\n"
229 "LDRLT R0, =0xFFC05F6C\n"
230 "BLLT sub_FFC05F4C\n"
231 "BL sub_FFC05A94\n"
232 "CMP R0, #0\n"
233 "LDRLT R0, =0xffc05f74\n"
234 "BLLT sub_ffc05f4c\n"
235 "LDR R0, =0xffc05f84\n"
236 "BL sub_ffc05b7c\n"
237 "CMP R0, #0\n"
238 "LDRLT R0, =0xffc05f8c\n"
239 "BLLT sub_ffc05f4c\n"
240 "LDR R0, =0xffc05f84\n"
241 "BL sub_ffc03bf0\n"
242 "CMP R0, #0\n"
243 "LDRLT R0, =0xffc05fa0\n"
244 "BLLT sub_ffc05f4c\n"
245 "BL sub_ffc09c3c\n"
246 "CMP R0, #0\n"
247 "LDRLT R0, =0xffc05fac\n"
248 "BLLT sub_ffc05f4c\n"
249 "BL sub_ffc0167c\n"
250 "CMP R0, #0\n"
251 "LDRLT R0, =0xffc05fb8\n"
252 "BLLT sub_ffc05f4c\n"
253 "LDMFD SP!, {R4,LR}\n"
254 "B taskcreate_Startup_my\n"
255 );
256 };
257
258
259 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
260 asm volatile (
261 "STMFD SP!, {R3,LR}\n"
262 "BL sub_ffc24318\n"
263 "BL sub_ffc2b704\n"
264 "CMP R0, #0\n"
265 "BNE loc_ffc0fb34\n"
266 "BL sub_ffc25b08\n"
267 "CMP R0, #0\n"
268 "BEQ loc_ffc0fb34\n"
269 "BL sub_ffc24314\n"
270 "CMP R0, #0\n"
271 "BNE loc_ffc0fb34\n"
272 "BL sub_ffc239e4\n"
273 "LDR R1, =0xC0220000\n"
274 "MOV R0, #0x44\n"
275 "STR R0, [R1,#0x1c]\n"
276 "BL sub_ffc23bd0\n"
277 "loc_ffc0fb30:\n"
278 "B loc_ffc0fb30\n"
279 "loc_ffc0fb34:\n"
280
281 "BL sub_ffc2431c\n"
282 "BL sub_ffc29938\n"
283 "LDR R1, =0x34e000\n"
284 "MOV R0, #0\n"
285 "BL sub_ffc29d80\n"
286 "BL sub_ffc29b2c\n"
287 "MOV R3, #0\n"
288 "STR R3, [SP]\n"
289 "LDR R3, =task_Startup_my\n"
290 "MOV R2, #0\n"
291 "MOV R1, #0x19\n"
292 "LDR R0, =0xffc0fb7c\n"
293 "BL sub_ffc0e83c\n"
294 "MOV R0, #0\n"
295 "LDMFD SP!, {R12,PC}\n"
296
297 );
298 }
299
300 void __attribute__((naked,noinline)) taskcreate_PhySw_my() {
301 asm volatile(
302 "STMFD SP!, {R3-R5,LR}\n"
303 "LDR R4, =0x1C20\n"
304 "LDR R0, [R4,#0x10]\n"
305 "CMP R0, #0\n"
306 "BNE loc_FFC2423C\n"
307 "MOV R3, #0\n"
308 "STR R3, [SP]\n"
309 "LDR R3, =mykbd_task\n"
310
311 "MOV R2, #0x2000\n"
312 "B sub_FFC2422C\n"
313 "loc_FFC2423C:\n"
314 "B sub_FFC2423C\n"
315 );
316 }
317
318 void __attribute__((naked,noinline)) task_Startup_my() {
319 asm volatile (
320 "STMFD SP!, {R4,LR}\n"
321 "BL sub_ffc0650c\n"
322 "BL sub_ffc25418\n"
323 "BL sub_ffc23638\n"
324 "BL sub_ffc2b744\n"
325 "BL sub_ffc2b930\n"
326
327 "BL sub_ffc2bacc\n"
328 "BL sub_ffc222e4\n"
329 "BL sub_ffc2b960\n"
330 "BL sub_ffc290dc\n"
331 "BL CreateTask_spytask\n"
332 "BL sub_ffc2bad0\n"
333
334 "BL taskcreate_PhySw_my\n"
335 "BL sub_ffc27744\n"
336 "BL sub_ffc2bae8\n"
337 "BL sub_ffc216a8\n"
338 "BL sub_ffc23090\n"
339 "BL sub_ffc2b4e0\n"
340 "BL sub_ffc235ec\n"
341 "BL sub_ffc2302c\n"
342 "BL sub_ffc22318\n"
343 "BL sub_ffc2c528\n"
344 "BL sub_ffc23004\n"
345 "LDMFD SP!, {R4,LR}\n"
346 "B sub_ffc0662c\n"
347 );
348 }
349
350
351
352
353 void __attribute__((naked,noinline)) init_file_modules_task()
354 {
355 asm volatile (
356 " STMFD SP!, {R4-R6,LR}\n"
357 " BL sub_FFC714C8\n"
358 " LDR R5, =0x5006\n"
359 " MOVS R4, R0\n"
360 " MOVNE R1, #0\n"
361 " MOVNE R0, R5\n"
362 " BLNE sub_FFC73D80\n"
363 " BL sub_FFC714F4_my\n"
364 " BL core_spytask_can_start\n"
365 " CMP R4, #0\n"
366 " MOVEQ R0, R5\n"
367 " LDMEQFD SP!, {R4-R6,LR}\n"
368 " MOVEQ R1, #0\n"
369 " BEQ sub_FFC73D80\n"
370 " LDMFD SP!, {R4-R6,PC}\n"
371 );
372 }
373
374
375
376
377 void __attribute__((naked,noinline)) sub_FFC714F4_my()
378 {
379 asm volatile (
380 " STMFD SP!, {R4,LR}\n"
381 " MOV R0, #3\n"
382 " BL sub_FFC556EC_my\n"
383 " BL sub_FFD04AC8\n"
384 " LDR R4, =0x2BD4\n"
385 " LDR R0, [R4,#4]\n"
386 " CMP R0, #0\n"
387 " BNE loc_FFC7152C\n"
388 " BL sub_FFC54934\n"
389 " BL sub_FFCFB098\n"
390 " BL sub_FFC54934\n"
391 " BL sub_FFC513AC\n"
392 " BL sub_FFC54834\n"
393 " BL sub_FFCFB12C\n"
394 "loc_FFC7152C:\n"
395 " MOV R0, #1\n"
396 " STR R0, [R4]\n"
397 " LDMFD SP!, {R4,PC}\n"
398
399 );
400 }
401
402
403
404
405 void __attribute__((naked,noinline)) sub_FFC556EC_my()
406 {
407 asm volatile (
408 " STMFD SP!, {R4-R8,LR}\n"
409 " MOV R8, R0\n"
410 " BL sub_FFC5566C \n"
411 " LDR R1, =0x33940\n"
412 " MOV R6, R0\n"
413 " ADD R4, R1, R0,LSL#7\n"
414 " LDR R0, [R4,#0x6C]\n"
415 " CMP R0, #4\n"
416 " LDREQ R1, =0x817\n"
417 " LDREQ R0, =0xFFC551AC\n"
418 " BLEQ sub_FFC0EB14\n"
419 " MOV R1, R8\n"
420 " MOV R0, R6\n"
421 " BL sub_FFC54F24 \n"
422 " LDR R0, [R4,#0x38]\n"
423 " BL sub_FFC55D8C \n"
424 " CMP R0, #0\n"
425 " STREQ R0, [R4,#0x6C]\n"
426 " MOV R0, R6\n"
427 " BL sub_FFC54FB4 \n"
428 " MOV R0, R6\n"
429 " BL sub_FFC55314_my \n"
430 " MOV R5, R0\n"
431 " MOV R0, R6\n"
432 " BL sub_FFC55544 \n"
433 " LDR R6, [R4,#0x3C]\n"
434 " AND R7, R5, R0\n"
435 " CMP R6, #0\n"
436 " LDR R1, [R4,#0x38]\n"
437 " MOVEQ R0, #0x80000001\n"
438 " MOV R5, #0\n"
439 " BEQ loc_FFC5579C\n"
440 " MOV R0, R1\n"
441 " BL sub_FFC54A9C \n"
442 " CMP R0, #0\n"
443 " MOVNE R5, #4\n"
444 " CMP R6, #5\n"
445 " ORRNE R0, R5, #1\n"
446 " BICEQ R0, R5, #1\n"
447 " CMP R7, #0\n"
448 " BICEQ R0, R0, #2\n"
449 " ORREQ R0, R0, #0x80000000\n"
450 " BICNE R0, R0, #0x80000000\n"
451 " ORRNE R0, R0, #2\n"
452
453 "loc_FFC5579C:\n"
454 " CMP R8, #7\n"
455 " STR R0, [R4,#0x40]\n"
456 " LDMNEFD SP!, {R4-R8,PC}\n"
457 " MOV R0, R8\n"
458 " BL sub_FFC556BC\n"
459 " CMP R0, #0\n"
460 " LDMEQFD SP!, {R4-R8,LR}\n"
461 " LDREQ R0, =0xFFC557E8\n"
462 " BEQ sub_FFC0177C\n"
463 " LDMFD SP!, {R4-R8,PC}\n"
464 );
465 }
466
467
468
469
470 void __attribute__((naked,noinline)) sub_FFC55314_my()
471 {
472 asm volatile (
473 " STMFD SP!, {R4-R6,LR} \n"
474 " MOV R5, R0 \n"
475 " LDR R0, =0x33940 \n"
476 " ADD R4, R0, R5,LSL#7 \n"
477 " LDR R0, [R4,#0x6C] \n"
478 " TST R0, #2 \n"
479 " MOVNE R0, #1 \n"
480 " LDMNEFD SP!, {R4-R6,PC} \n"
481 " LDR R0, [R4,#0x38] \n"
482 " MOV R1, R5 \n"
483 " BL sub_FFC55034_my \n"
484 " CMP R0, #0 \n"
485 " LDRNE R0, [R4,#0x38] \n"
486 " MOVNE R1, R5 \n"
487 " BLNE sub_FFC551D0 \n"
488 " LDR R2, =0x339C0 \n"
489 " ADD R1, R5, R5,LSL#4 \n"
490 " LDR R1, [R2,R1,LSL#2] \n"
491 " CMP R1, #4 \n"
492 " BEQ loc_FFC55374 \n"
493 " CMP R0, #0 \n"
494 " LDMEQFD SP!, {R4-R6,PC} \n"
495 " MOV R0, R5 \n"
496 " BL sub_FFC54B2C \n"
497
498 "loc_FFC55374: \n"
499 " CMP R0, #0 \n"
500 " LDRNE R1, [R4,#0x6C] \n"
501 " ORRNE R1, R1, #2 \n"
502 " STRNE R1, [R4,#0x6C] \n"
503 " LDMFD SP!, {R4-R6,PC} \n"
504 );
505 }
506
507
508
509
510 void __attribute__((naked,noinline)) sub_FFC55034_my()
511 {
512 asm volatile (
513 " STMFD SP!, {R4-R10,LR}\n"
514 " MOV R9, R0\n"
515 " LDR R0, =0x33940\n"
516 " MOV R8, #0\n"
517 " ADD R5, R0, R1,LSL#7\n"
518 " LDR R0, [R5,#0x3C]\n"
519 " MOV R7, #0\n"
520 " CMP R0, #7\n"
521 " MOV R6, #0\n"
522 " ADDLS PC, PC, R0,LSL#2\n"
523 " B loc_FFC5518C\n"
524
525 "loc_FFC55060:\n"
526 " B loc_FFC55098\n"
527
528 "loc_FFC55064:\n"
529 " B loc_FFC55080\n"
530
531 "loc_FFC55068:\n"
532 " B loc_FFC55080\n"
533
534 "loc_FFC5506C:\n"
535 " B loc_FFC55080\n"
536
537 "loc_FFC55070:\n"
538 " B loc_FFC55080\n"
539
540 "loc_FFC55074:\n"
541 " B loc_FFC55184\n"
542
543 "loc_FFC55078:\n"
544 " B loc_FFC55080\n"
545
546 "loc_FFC5507C:\n"
547 " B loc_FFC55080\n"
548
549 "loc_FFC55080:\n"
550 " MOV R2, #0\n"
551 " MOV R1, #0x200\n"
552 " MOV R0, #2\n"
553 " BL sub_FFC6B628\n"
554 " MOVS R4, R0\n"
555 " BNE loc_FFC550A0\n"
556
557 "loc_FFC55098:\n"
558 " MOV R0, #0\n"
559 " LDMFD SP!, {R4-R10,PC}\n"
560
561 "loc_FFC550A0:\n"
562 " LDR R12, [R5,#0x50]\n"
563 " MOV R3, R4\n"
564 " MOV R2, #1\n"
565 " MOV R1, #0\n"
566 " MOV R0, R9\n"
567 " BLX R12\n"
568 " CMP R0, #1\n"
569 " BNE loc_FFC550CC\n"
570 " MOV R0, #2\n"
571 " BL sub_FFC6B774 \n"
572 " B loc_FFC55098\n"
573
574 "loc_FFC550CC:\n"
575 " LDR R1, [R5,#0x64]\n"
576 " MOV R0, R9\n"
577 " BLX R1\n"
578
579 "MOV R1, R4\n"
580 "BL mbr_read_dryos\n"
581
582
583
584
585
586
587 "MOV R12, R4\n"
588 "MOV LR, R4\n"
589 "MOV R1, #1\n"
590 "B dg_sd_fat32_enter\n"
591 "dg_sd_fat32:\n"
592 "CMP R1, #4\n"
593 "BEQ dg_sd_fat32_end\n"
594 "ADD R12, R12, #0x10\n"
595 "ADD R1, R1, #1\n"
596 "dg_sd_fat32_enter:\n"
597 "LDRB R2, [R12, #0x1BE]\n"
598 "LDRB R3, [R12, #0x1C2]\n"
599 "CMP R3, #0xB\n"
600 "CMPNE R3, #0xC\n"
601 "BNE dg_sd_fat32\n"
602 "CMP R2, #0x00\n"
603 "CMPNE R2, #0x80\n"
604 "BNE dg_sd_fat32\n"
605
606 "MOV R4, R12\n"
607
608 "dg_sd_fat32_end:\n"
609
610
611
612 " LDRB R1, [R4,#0x1C9]\n"
613 " LDRB R3, [R4,#0x1C8]\n"
614 " LDRB R12, [R4,#0x1CC]\n"
615 " MOV R1, R1,LSL#24\n"
616 " ORR R1, R1, R3,LSL#16\n"
617 " LDRB R3, [R4,#0x1C7]\n"
618 " LDRB R2, [R4,#0x1BE]\n"
619
620 " ORR R1, R1, R3,LSL#8\n"
621 " LDRB R3, [R4,#0x1C6]\n"
622 " CMP R2, #0\n"
623 " CMPNE R2, #0x80\n"
624 " ORR R1, R1, R3\n"
625 " LDRB R3, [R4,#0x1CD]\n"
626 " MOV R3, R3,LSL#24\n"
627 " ORR R3, R3, R12,LSL#16\n"
628 " LDRB R12, [R4,#0x1CB]\n"
629 " ORR R3, R3, R12,LSL#8\n"
630 " LDRB R12, [R4,#0x1CA]\n"
631 " ORR R3, R3, R12\n"
632
633 "LDRB R12, [LR,#0x1FE]\n"
634 "LDRB LR, [LR,#0x1FF]\n"
635 " BNE loc_FFC55158\n"
636 " CMP R0, R1\n"
637 " BCC loc_FFC55158\n"
638 " ADD R2, R1, R3\n"
639 " CMP R2, R0\n"
640 " CMPLS R12, #0x55\n"
641 " CMPEQ LR, #0xAA\n"
642 " MOVEQ R7, R1\n"
643 " MOVEQ R6, R3\n"
644 " MOVEQ R4, #1\n"
645 " BEQ loc_FFC5515C\n"
646
647 "loc_FFC55158:\n"
648 " MOV R4, R8\n"
649
650 "loc_FFC5515C:\n"
651 " MOV R0, #2\n"
652 " BL sub_FFC6B774 \n"
653 " CMP R4, #0\n"
654 " BNE loc_FFC55198\n"
655 " LDR R1, [R5,#0x64]\n"
656 " MOV R7, #0\n"
657 " MOV R0, R9\n"
658 " BLX R1\n"
659 " MOV R6, R0\n"
660 " B loc_FFC55198\n"
661
662 "loc_FFC55184:\n"
663 " MOV R6, #0x40\n"
664 " B loc_FFC55198\n"
665
666 "loc_FFC5518C:\n"
667 " LDR R1, =0x572\n"
668 " LDR R0, =0xFFC551AC\n"
669 " BL sub_FFC0EB14\n"
670
671 "loc_FFC55198:\n"
672 " STR R7, [R5,#0x44]!\n"
673 " STMIB R5, {R6,R8}\n"
674 " MOV R0, #1\n"
675 " LDMFD SP!, {R4-R10,PC}\n"
676 );
677 }
678
679
680