1 #include "lolevel.h"
2 #include "platform.h"
3
4 typedef struct {
5 unsigned int address;
6 unsigned int length;
7 } cam_ptp_data_chunk; //camera specific structure
8
9 #define MAX_CHUNKS_FOR_FWT 4 //model specific
10 /*
11 * fwt_data_struct: defined here as it's camera dependent
12 * unneeded members are designated with unkn
13 * file_offset, full_size, seek_flag only needs to be defined for DryOS>=r50 generation cameras
14 * pdc is always required
15 * name is not currently used
16 */
17 typedef struct
18 {
19 int unkn1, unkn2, unkn3, unkn4, unkn5;
20 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
21 int unkn6;
22 char name[32];
23 } fwt_data_struct;
24
25 #include "../../../generic/filewrite.c"
26
27 // ************ filewritetask *************
28
29 void __attribute__((naked,noinline)) filewritetask () { //sub_FFA78FA0_my
30 asm volatile (
31 " STMFD SP!, {R1-R5,LR} \n"
32 " LDR R4, =0xB414 \n"
33 "loc_FFA78FA8:\n"
34 " LDR R0, [R4, #0x10] \n"
35 " MOV R2, #0 \n"
36 " ADD R1, SP, #8 \n"
37 " BL sub_FF8382FC \n"
38 " CMP R0, #0 \n"
39 " BNE loc_FFA78FD8 \n"
40 " LDR R0, [SP, #8] \n"
41 " LDR R1, [R0] \n"
42 " CMP R1, #1 \n"
43 " BNE loc_FFA78FE0 \n"
44 " LDR R0, [R4, #8] \n"
45 " BL sub_FF8387E8 \n"
46 "loc_FFA78FD8:\n"
47 " BL sub_FF81E844 \n"
48 " LDMFD SP!, {R1-R5,PC} \n"
49 "loc_FFA78FE0:\n"
50 " SUB R1, R1, #2 \n"
51 " CMP R1, #6 \n"
52 " ADDLS PC, PC, R1, LSL #2 \n"
53 " B loc_FFA78FA8 \n"
54 " B loc_FFA7900C \n"
55 " B loc_FFA79070 \n"
56 " B loc_FFA79078 \n"
57 " B loc_FFA79078 \n"
58 " B loc_FFA79078 \n"
59 " B loc_FFA79078 \n"
60 " B loc_FFA79080 \n"
61 "loc_FFA7900C:\n"
62 " MOV R0, #0 \n"
63 " STR R0, [SP] \n"
64 "loc_FFA79014:\n"
65 " LDR R0, [R4, #0x10] \n"
66 " MOV R1, SP \n"
67 " BL sub_FF838540 \n"
68 " LDR R0, [SP] \n"
69 " CMP R0, #0 \n"
70 " BEQ loc_FFA79040 \n"
71 " LDR R0, [R4, #0x10] \n"
72 " MOV R2, #0 \n"
73 " ADD R1, SP, #4 \n"
74 " BL sub_FF8382FC \n"
75 " B loc_FFA79014 \n"
76 "loc_FFA79040:\n"
77 " LDR R0, [R4] \n"
78 " CMN R0, #1 \n"
79 " BEQ loc_FFA79064 \n"
80 " BL fwt_close\n" // mod! sub_FF835414
81 " MVN R0, #0 \n"
82 " STR R0, [R4] \n"
83 " LDR R0, =0xD1D1C \n"
84 " BL sub_FF86E540 \n"
85 " BL sub_FF86C924 \n"
86 "loc_FFA79064:\n"
87 " LDR R0, [R4, #0xC] \n"
88 " BL sub_FF8387E8 \n"
89 " B loc_FFA78FA8 \n"
90 "loc_FFA79070:\n"
91 " BL sub_FFA7928C_my \n" // -> open
92 " B loc_FFA78FA8 \n"
93 "loc_FFA79078:\n"
94 " BL sub_FFA793C0_my \n" // -> write
95 " B loc_FFA78FA8 \n"
96 "loc_FFA79080:\n"
97 " BL sub_FFA78E38_my \n" // -> close
98 " B loc_FFA78FA8 \n"
99 );
100 }
101
102
103
104 void __attribute__((naked,noinline)) sub_FFA7928C_my( ) { // open
105 asm volatile (
106 " STMFD SP!, {R4-R8,LR} \n"
107 " MOV R4, R0 \n"
108 " ADD R0, R0, #0x38 \n"
109 " SUB SP, SP, #0x38 \n"
110 " BL sub_FF86E540 \n"
111 " MOV R1, #0 \n"
112 " BL sub_FF86C8D4 \n"
113 " LDR R0, [R4, #0xC] \n"
114 " BL sub_FF86B490 \n"
115 " LDR R7, [R4, #8] \n"
116 " LDR R8, =0x1B6 \n"
117 " ADD R6, R4, #0x38 \n"
118 " LDR R5, [R4, #0xC] \n"
119 //place hook here
120 "STMFD SP!, {R4-R12,LR}\n"
121 "MOV R0, R4\n"
122 "BL filewrite_main_hook\n"
123 "LDMFD SP!, {R4-R12,LR}\n"
124 //hook end
125 " MOV R0, R6 \n"
126 " MOV R1, R7 \n"
127 " MOV R2, R8 \n"
128 " BL fwt_open\n" // mod! sub_FF8353BC
129 "LDR PC, =0xffa792d0\n" // continue in ROM
130 /* " CMN R0, #1 \n"
131 " BNE loc_FFA79330 \n"
132 " MOV R0, R6 \n"
133 " BL sub_FF835780 \n"
134 " MOV R2, #0xF \n"
135 " MOV R1, R6 \n"
136 " MOV R0, SP \n"
137 " BL sub_FFB34BC8 \n"
138 " LDR R0, =0x41FF \n"
139 " MOV R1, #0 \n"
140 " STRB R1, [SP, #0xF] \n"
141 " STR R0, [SP, #0x20] \n"
142 " MOV R0, #0x10 \n"
143 " ADD R2, SP, #0x24 \n"
144 " STMIA R2, {R0,R1,R5} \n"
145 " ADD R1, SP, #0x20 \n"
146 " MOV R0, SP \n"
147 " STR R5, [SP, #0x30] \n"
148 " STR R5, [SP, #0x34] \n"
149 " BL sub_FF86C244 \n"
150 " MOV R2, R8 \n"
151 " MOV R1, R7 \n"
152 " MOV R0, R6 \n"
153 " BL sub_FF8353BC \n"
154 "loc_FFA79330:\n"
155 " LDR R5, =0xB414 \n"
156 " CMN R0, #1 \n"
157 " STR R0, [R5] \n"
158 " BNE loc_FFA79378 \n"
159 " LDR R0, [R5, #0x18] \n"
160 " CMP R0, #0 \n"
161 " BLXNE R0 \n"
162 " ADD R0, R4, #0x38 \n"
163 " BL sub_FF86E540 \n"
164 " BL sub_FF86C924 \n"
165 " LDR R1, [R5, #0x14] \n"
166 " CMP R1, #0 \n"
167 " ADDNE SP, SP, #0x38 \n"
168 " LDMNEFD SP!, {R4-R8,LR} \n"
169 " LDRNE R0, =0x9200001 \n"
170 " BXNE R1 \n"
171 "loc_FFA79370:\n"
172 " ADD SP, SP, #0x38 \n"
173 " LDMFD SP!, {R4-R8,PC} \n"
174 "loc_FFA79378:\n"
175 " LDR R0, =0xD1D1C \n"
176 " MOV R2, #0x20 \n"
177 " ADD R1, R4, #0x38 \n"
178 " BL sub_FFB34D30 \n"
179 " MOV R1, R4 \n"
180 " MOV R0, #4 \n"
181 " BL sub_FFA78D78 \n"
182 " B loc_FFA79370 \n" */
183 );
184 }
185
186
187
188 void __attribute__((naked,noinline)) sub_FFA793C0_my( ) { // write
189 asm volatile (
190 " STMFD SP!, {R4-R10,LR} \n"
191 " MOV R4, R0 \n"
192 " LDR R0, [R0] \n"
193 " CMP R0, #4 \n"
194 " LDREQ R6, [R4, #0x18] \n"
195 " LDREQ R7, [R4, #0x14] \n"
196 " BEQ loc_FFA7940C \n"
197 " CMP R0, #5 \n"
198 " LDREQ R6, [R4, #0x20] \n"
199 " LDREQ R7, [R4, #0x1C] \n"
200 " BEQ loc_FFA7940C \n"
201 " CMP R0, #6 \n"
202 " LDREQ R6, [R4, #0x28] \n"
203 " LDREQ R7, [R4, #0x24] \n"
204 " BEQ loc_FFA7940C \n"
205 " CMP R0, #7 \n"
206 " BNE loc_FFA79420 \n"
207 " LDR R6, [R4, #0x30] \n"
208 " LDR R7, [R4, #0x2C] \n"
209 "loc_FFA7940C:\n"
210 " CMP R6, #0 \n"
211 " BNE loc_FFA79430 \n"
212 "loc_FFA79414:\n"
213 " MOV R1, R4 \n"
214 " MOV R0, #8 \n"
215 " B loc_FFA794C4 \n"
216 "loc_FFA79420:\n"
217 " LDR R1, =0x297 \n"
218 " LDR R0, =0xFFA79094 \n"
219 " BL sub_FF81E88C \n"
220 " B loc_FFA79414 \n"
221 "loc_FFA79430:\n"
222 " LDR R9, =0xB414 \n"
223 " MOV R5, R6 \n"
224 "loc_FFA79438:\n"
225 " LDR R0, [R4, #4] \n"
226 " CMP R5, #0x1000000 \n"
227 " MOVLS R8, R5 \n"
228 " MOVHI R8, #0x1000000 \n"
229 " BIC R1, R0, #0xFF000000 \n"
230 " CMP R1, #0 \n"
231 " BICNE R0, R0, #0xFF000000 \n"
232 " RSBNE R0, R0, #0x1000000 \n"
233 " CMPNE R8, R0 \n"
234 " MOVHI R8, R0 \n"
235 " LDR R0, [R9] \n"
236 " MOV R2, R8 \n"
237 " MOV R1, R7 \n"
238 " BL fwt_write\n" // mod! sub_FF8354A4
239 " LDR R1, [R4, #4] \n"
240 " CMP R8, R0 \n"
241 " ADD R1, R1, R0 \n"
242 " STR R1, [R4, #4] \n"
243 " BEQ loc_FFA79498 \n"
244 " CMN R0, #1 \n"
245 " LDRNE R0, =0x9200015 \n"
246 " LDREQ R0, =0x9200005 \n"
247 " STR R0, [R4, #0x10] \n"
248 " B loc_FFA79414 \n"
249 "loc_FFA79498:\n"
250 " SUB R5, R5, R0 \n"
251 " CMP R5, R6 \n"
252 " ADD R7, R7, R0 \n"
253 " LDRCS R0, =0xFFA79094 \n"
254 " LDRCS R1, =0x2C2 \n"
255 " BLCS sub_FF81E88C \n"
256 " CMP R5, #0 \n"
257 " BNE loc_FFA79438 \n"
258 " LDR R0, [R4] \n"
259 " MOV R1, R4 \n"
260 " ADD R0, R0, #1 \n"
261 "loc_FFA794C4:\n"
262 " LDMFD SP!, {R4-R10,LR} \n"
263 " B sub_FFA78D78 \n"
264 );
265 }
266
267
268
269 void __attribute__((naked,noinline)) sub_FFA78E38_my( ) { // close
270 asm volatile (
271 " STMFD SP!, {R4-R6,LR} \n"
272 " LDR R5, =0xB414 \n"
273 " MOV R4, R0 \n"
274 " LDR R0, [R5] \n"
275 " SUB SP, SP, #0x38 \n"
276 " CMN R0, #1 \n"
277 // " BEQ loc_FFA78E80 \n" // -
278 "LDREQ PC, =0xFFA78E80\n" // +
279 " LDR R1, [R4, #8] \n"
280 " LDR R6, =0x9200003 \n"
281 " TST R1, #0x8000 \n"
282 " BEQ loc_FFA78E6C \n"
283 " BL sub_FF86B984 \n"
284 " B loc_FFA78E70 \n"
285 "loc_FFA78E6C:\n"
286 " BL fwt_close\n" // mod! sub_FF835414
287 "loc_FFA78E70:\n"
288 "LDR PC, =0xffa78e70\n" // continue in ROM
289 /*" CMP R0, #0 \n"
290 " MVN R0, #0 \n"
291 " STRNE R6, [R4, #0x10] \n"
292 " STR R0, [R5] \n"
293 "loc_FFA78E80:\n"
294 " LDR R0, [R4, #0x10] \n"
295 " TST R0, #1 \n"
296 " BNE loc_FFA78F70 \n"
297 " LDR R0, [R4, #8] \n"
298 " TST R0, #8 \n"
299 " BEQ loc_FFA78EC8 \n"
300 " ADD R1, SP, #0x20 \n"
301 " ADD R0, R4, #0x38 \n"
302 " BL sub_FF86C090 \n"
303 " CMP R0, #0 \n"
304 " MOVEQ R1, #0x300 \n"
305 " LDREQ R0, =0xFFA79094 \n"
306 " BLEQ sub_FF81E88C \n"
307 " LDR R0, [SP, #0x28] \n"
308 " LDR R1, [R4, #4] \n"
309 " ADD R0, R0, R1 \n"
310 " STR R0, [SP, #0x28] \n"
311 " B loc_FFA78EF8 \n"
312 "loc_FFA78EC8:\n"
313 " LDR R0, =0x81FF \n"
314 " STR R0, [SP, #0x20] \n"
315 " MOV R0, #0x20 \n"
316 " STR R0, [SP, #0x24] \n"
317 " LDR R0, [R4, #4] \n"
318 " STR R0, [SP, #0x28] \n"
319 " LDR R0, [R4, #0xC] \n"
320 " STR R0, [SP, #0x2C] \n"
321 " LDR R0, [R4, #0xC] \n"
322 " STR R0, [SP, #0x30] \n"
323 " LDR R0, [R4, #0xC] \n"
324 " STR R0, [SP, #0x34] \n"
325 "loc_FFA78EF8:\n"
326 " ADD R1, SP, #0x20 \n"
327 " ADD R0, R4, #0x38 \n"
328 " BL sub_FF86C244 \n"
329 " LDR R0, [R4, #0x34] \n"
330 " CMP R0, #0 \n"
331 " BEQ loc_FFA78F70 \n"
332 " MOV R2, #0x20 \n"
333 " ADD R1, R4, #0x38 \n"
334 " MOV R0, SP \n"
335 " BL sub_FFB34D30 \n"
336 " MOV R0, SP \n"
337 " BL sub_FF81400C \n"
338 " MOV R2, #0x54 \n"
339 " ADD R0, SP, R0 \n"
340 " MOV R1, #0x4D \n"
341 " STRB R2, [R0, #-3] \n"
342 " STRB R1, [R0, #-2] \n"
343 " MOV R1, #0x50 \n"
344 " STRB R1, [R0, #-1] \n"
345 " MOV R1, SP \n"
346 " ADD R0, R4, #0x38 \n"
347 " BL sub_FF86B9A4 \n"
348 " CMP R0, #0 \n"
349 " LDREQ R1, =0x153 \n"
350 " LDREQ R0, =0xFFA79094 \n"
351 " BLEQ sub_FF81E88C \n"
352 " MOV R0, SP \n"
353 " BL sub_FF86C6A0 \n"
354 " ADD R0, R4, #0x38 \n"
355 " BL sub_FF86C6A0 \n"
356 "loc_FFA78F70:\n"
357 " LDR R0, [R5, #0x18] \n"
358 " CMP R0, #0 \n"
359 " BLXNE R0 \n"
360 " ADD R0, R4, #0x38 \n"
361 " BL sub_FF86E540 \n"
362 " BL sub_FF86C924 \n"
363 " LDR R1, [R5, #0x14] \n"
364 " CMP R1, #0 \n"
365 " LDRNE R0, [R4, #0x10] \n"
366 " BLXNE R1 \n"
367 " ADD SP, SP, #0x38 \n"
368 " LDMFD SP!, {R4-R6,PC} \n" */
369 );
370 }