This source file includes following definitions.
- capt_seq_task
- sub_FFD371E4_my
- sub_FFD3A354_my
- exp_drv_task
- sub_FFCE208C_my
- sub_FFC97E64_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 static long *nrflag = (long*)0x6D44;
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R4,LR} \n"
17 " SUB SP, SP, #4 \n"
18 " MOV R4, SP \n"
19 " B loc_FFD3773C \n"
20
21 "loc_FFD375E8:\n"
22 " LDR R2, [SP] \n"
23 " LDR R3, [R2] \n"
24 " MOV R0, R2 \n"
25 " CMP R3, #0x15 \n"
26 " LDRLS PC, [PC, R3, LSL#2] \n"
27 " B loc_FFD37714 \n"
28 " .long loc_FFD37658 \n"
29 " .long loc_FFD37664 \n"
30 " .long loc_FFD3766C \n"
31 " .long loc_FFD3767C \n"
32 " .long loc_FFD37674 \n"
33 " .long loc_FFD37684 \n"
34 " .long loc_FFD3768C \n"
35 " .long loc_FFD37698 \n"
36 " .long loc_FFD376A0 \n"
37 " .long loc_FFD376AC \n"
38 " .long loc_FFD376B4 \n"
39 " .long loc_FFD376BC \n"
40 " .long loc_FFD376C4 \n"
41 " .long loc_FFD376CC \n"
42 " .long loc_FFD376D4 \n"
43 " .long loc_FFD376E0 \n"
44 " .long loc_FFD376E8 \n"
45 " .long loc_FFD376F0 \n"
46 " .long loc_FFD376F8 \n"
47 " .long loc_FFD37704 \n"
48 " .long loc_FFD3770C \n"
49 " .long loc_FFD37724 \n"
50
51 "loc_FFD37658:\n"
52 " BL sub_FFD38DBC \n"
53 " BL shooting_expo_param_override\n"
54 " BL sub_FFD35274 \n"
55 " B loc_FFD37720 \n"
56
57 "loc_FFD37664:\n"
58 " BL sub_FFD371E4_my \n"
59 " B loc_FFD37720 \n"
60
61 "loc_FFD3766C:\n"
62 " BL sub_FFD39150 \n"
63 " B loc_FFD37720 \n"
64
65 "loc_FFD37674:\n"
66 " BL sub_FFD38078 \n"
67 " B loc_FFD37720 \n"
68
69 "loc_FFD3767C:\n"
70 " BL sub_FFD380D4 \n"
71 " B loc_FFD37720 \n"
72
73 "loc_FFD37684:\n"
74 " BL sub_FFD382C4 \n"
75 " B loc_FFD37720 \n"
76
77 "loc_FFD3768C:\n"
78 " BL sub_FFD38EB0 \n"
79 " BL sub_FFD35274 \n"
80 " B loc_FFD37720 \n"
81
82 "loc_FFD37698:\n"
83 " BL sub_FFD372CC \n"
84 " B loc_FFD37720 \n"
85
86 "loc_FFD376A0:\n"
87 " BL sub_FFD38F18 \n"
88 " BL sub_FFD35274 \n"
89 " B loc_FFD37720 \n"
90
91 "loc_FFD376AC:\n"
92 " BL sub_FFD380D4 \n"
93 " B loc_FFD37720 \n"
94
95 "loc_FFD376B4:\n"
96 " BL sub_FFD397DC \n"
97 " B loc_FFD37720 \n"
98
99 "loc_FFD376BC:\n"
100 " BL sub_FFD39A64 \n"
101 " B loc_FFD37720 \n"
102
103 "loc_FFD376C4:\n"
104 " BL sub_FFD39AF0 \n"
105 " B loc_FFD37720 \n"
106
107 "loc_FFD376CC:\n"
108 " BL sub_FFD39BA8 \n"
109 " B loc_FFD37720 \n"
110
111 "loc_FFD376D4:\n"
112 " MOV R0, #0 \n"
113 " BL sub_FFD39C58 \n"
114 " B loc_FFD37720 \n"
115
116 "loc_FFD376E0:\n"
117 " BL sub_FFD39DA8 \n"
118 " B loc_FFD37720 \n"
119
120 "loc_FFD376E8:\n"
121 " BL sub_FFD39E1C \n"
122 " B loc_FFD37720 \n"
123
124 "loc_FFD376F0:\n"
125 " BL sub_FFD39ED4 \n"
126 " B loc_FFD37720 \n"
127
128 "loc_FFD376F8:\n"
129 " MOV R0, #1 \n"
130 " BL sub_FFD39C58 \n"
131 " B loc_FFD37720 \n"
132
133 "loc_FFD37704:\n"
134 " BL sub_FFD39FD4 \n"
135 " B loc_FFD37720 \n"
136
137 "loc_FFD3770C:\n"
138 " BL sub_FFD3A000 \n"
139 " B loc_FFD37720 \n"
140
141 "loc_FFD37714:\n"
142 " LDR R0, =0xFFD36F68 /*'ShootTask.c'*/ \n"
143 " MOV R1, #0x2DC \n"
144 " BL _DebugAssert \n"
145
146 "loc_FFD37720:\n"
147 " LDR R2, [SP] \n"
148
149 "loc_FFD37724:\n"
150 " LDR R3, =0x7414C \n"
151 " LDR R1, [R2, #4] \n"
152 " LDR R0, [R3] \n"
153 " BL sub_FFC0F8A4 /*_SetEventFlag*/ \n"
154 " LDR R0, [SP] \n"
155 " BL sub_FFD36FE4 \n"
156
157 "loc_FFD3773C:\n"
158 " LDR R3, =0x74150 \n"
159 " MOV R1, R4 \n"
160 " LDR R0, [R3] \n"
161 " MOV R2, #0 \n"
162 " BL sub_FFC10054 /*_ReceiveMessageQueue*/ \n"
163 " TST R0, #1 \n"
164 " BEQ loc_FFD375E8 \n"
165 " MOV R1, #0x24C \n"
166 " LDR R0, =0xFFD36F68 /*'ShootTask.c'*/ \n"
167 " ADD R1, R1, #1 \n"
168 " BL _DebugAssert \n"
169 " BL _ExitTask \n"
170 " ADD SP, SP, #4 \n"
171 " LDMFD SP!, {R4,PC} \n"
172 );
173 }
174
175
176
177 void __attribute__((naked,noinline)) sub_FFD371E4_my() {
178 asm volatile (
179 " STMFD SP!, {R4,R5,LR} \n"
180 " LDR R5, [R0, #0xC] \n"
181 " BL sub_FFD400C8 \n"
182 " CMP R0, #0 \n"
183 " BNE loc_FFD371FC \n"
184 " BL sub_FFD400D4 \n"
185
186 "loc_FFD371FC:\n"
187 " MOV R0, R5 \n"
188 " BL sub_FFD39160 \n"
189 " TST R0, #1 \n"
190 " MOV R2, R5 \n"
191 " MOV R1, #1 \n"
192 " BEQ loc_FFD3721C \n"
193 " LDMFD SP!, {R4,R5,LR} \n"
194 " B sub_FFD35710 \n"
195
196 "loc_FFD3721C:\n"
197 " BL sub_FFD75760 \n"
198 " BL sub_FFD34A68 \n"
199 " MOV R4, R0 \n"
200 " BL sub_FFC14384 \n"
201 " ADD R3, R5, R5, LSL#1 \n"
202 " ADD R4, R4, R3, LSL#5 \n"
203 " STR R0, [R4, #4] \n"
204 " MOV R0, R5 \n"
205 " BL sub_FFD3AB6C \n"
206 " BL sub_FFD396A4 \n"
207 " BL sub_FFD39644 \n"
208 " MOV R0, R5 \n"
209 " BL sub_FFD3A354_my \n"
210 " BL capt_seq_hook_raw_here\n"
211 " MOV R2, R5 \n"
212 " MOV R1, #1 \n"
213 " BL sub_FFD35710 \n"
214 " LDMFD SP!, {R4,R5,LR} \n"
215 " B sub_FFD3A554 \n"
216 );
217 }
218
219
220
221 void __attribute__((naked,noinline)) sub_FFD3A354_my() {
222 asm volatile (
223 " STMFD SP!, {R4,R5,LR} \n"
224 " LDR R3, =0x741C4 \n"
225 " LDR R5, =0x6D40 \n"
226 " SUB SP, SP, #4 \n"
227 " MVN R1, #0 \n"
228 " STR R0, [R5] \n"
229 " LDR R0, [R3] \n"
230 " BL sub_FFC0FA40 /*_ClearEventFlag*/ \n"
231 " BL sub_FFD40324 \n"
232 " BL wait_until_remote_button_is_released\n"
233 " LDR R0, [R0, #0x7C] \n"
234
235 " BL sub_FFD3A2C8 \n"
236 " BL capt_seq_hook_set_nr\n"
237 " LDR PC, =0xFFD3A384 \n"
238 );
239 }
240
241
242
243 void __attribute__((naked,noinline)) exp_drv_task() {
244 asm volatile (
245 " STMFD SP!, {R4-R8,LR} \n"
246 " SUB SP, SP, #0x14 \n"
247 " MOV R7, SP \n"
248 " B loc_FFCE35A0 \n"
249
250 "loc_FFCE32BC:\n"
251 " CMP R2, #0x19 \n"
252 " BNE loc_FFCE32D4 \n"
253 " LDR R0, [R12, #0x34] \n"
254 " MOV LR, PC \n"
255 " LDR PC, [R12, #0x30] \n"
256 " B loc_FFCE330C \n"
257
258 "loc_FFCE32D4:\n"
259 " SUB R3, R2, #0x16 \n"
260 " CMP R3, #1 \n"
261 " BHI loc_FFCE32EC \n"
262 " MOV R0, R12 \n"
263 " BL sub_FFCE3254 \n"
264 " B loc_FFCE32FC \n"
265
266 "loc_FFCE32EC:\n"
267 " CMP R2, #0x18 \n"
268 " BNE loc_FFCE3318 \n"
269 " BL sub_FFC981CC \n"
270 " BL sub_FFC9A044 \n"
271
272 "loc_FFCE32FC:\n"
273 " LDR R3, [SP] \n"
274 " LDR R0, [R3, #0x34] \n"
275 " MOV LR, PC \n"
276 " LDR PC, [R3, #0x30] \n"
277
278 "loc_FFCE330C:\n"
279 " LDR R0, [SP] \n"
280 " BL sub_FFCE15A4 \n"
281 " B loc_FFCE35A0 \n"
282
283 "loc_FFCE3318:\n"
284 " CMP R2, #0xC \n"
285 " MOV R8, #1 \n"
286 " BNE loc_FFCE3388 \n"
287 " LDR R1, [R12, #0x24] \n"
288 " ADD R1, R1, R1, LSL#1 \n"
289 " ADD R1, R12, R1, LSL#1 \n"
290 " ADD R6, SP, #0xC \n"
291 " SUB R1, R1, #2 \n"
292 " MOV R2, #6 \n"
293 " MOV R0, R6 \n"
294 " BL _memcpy \n"
295 " LDR R0, [SP] \n"
296 " BL sub_FFCE287C \n"
297 " LDR R3, [SP] \n"
298 " LDR R1, [R3, #0x24] \n"
299 " LDR R2, [R3, #0x34] \n"
300 " ADD R0, R3, #4 \n"
301 " MOV LR, PC \n"
302 " LDR PC, [R3, #0x30] \n"
303 " LDR R0, [SP] \n"
304 " BL sub_FFCE2A00 \n"
305 " LDR R3, [SP] \n"
306 " ADD R0, R3, #4 \n"
307 " LDR R1, [R3, #0x24] \n"
308 " LDR R2, [R3, #0x3C] \n"
309 " MOV LR, PC \n"
310 " LDR PC, [R3, #0x38] \n"
311 " B loc_FFCE3550 \n"
312
313 "loc_FFCE3388:\n"
314 " SUB R3, R2, #0xD \n"
315 " CMP R3, #1 \n"
316 " BHI loc_FFCE3408 \n"
317 " ADD R6, SP, #0xC \n"
318 " ADD R5, SP, #4 \n"
319 " MOV R0, R12 \n"
320 " MOV R1, R6 \n"
321 " MOV R2, R5 \n"
322 " BL sub_FFCE2A7C \n"
323 " MOV R4, R0 \n"
324 " CMP R4, #3 \n"
325 " CMPNE R4, #1 \n"
326 " BNE loc_FFCE33E8 \n"
327 " LDR R12, [SP] \n"
328 " MOV R0, R5 \n"
329 " LDR R1, [R12, #0x24] \n"
330 " MOV R2, R4 \n"
331 " LDR R3, [R12, #0x34] \n"
332 " MOV LR, PC \n"
333 " LDR PC, [R12, #0x30] \n"
334 " MOV R1, R4 \n"
335 " LDR R0, [SP] \n"
336 " BL sub_FFCE3234 \n"
337 " B loc_FFCE3550 \n"
338
339 "loc_FFCE33E8:\n"
340 " LDR R12, [SP] \n"
341 " MOV R2, R4 \n"
342 " ADD R0, R12, #4 \n"
343 " LDR R1, [R12, #0x24] \n"
344 " LDR R3, [R12, #0x34] \n"
345 " MOV LR, PC \n"
346 " LDR PC, [R12, #0x30] \n"
347 " B loc_FFCE3550 \n"
348
349 "loc_FFCE3408:\n"
350 " CMP R2, #0x14 \n"
351 " BNE loc_FFCE345C \n"
352 " LDR R1, [R12, #0x24] \n"
353 " ADD R1, R1, R1, LSL#1 \n"
354 " ADD R1, R12, R1, LSL#1 \n"
355 " ADD R6, SP, #0xC \n"
356 " SUB R1, R1, #2 \n"
357 " MOV R2, #6 \n"
358 " MOV R0, R6 \n"
359 " BL _memcpy \n"
360 " LDR R0, [SP] \n"
361 " BL sub_FFCE2354 \n"
362 " LDR R3, [SP] \n"
363 " ADD R0, R3, #4 \n"
364 " LDR R1, [R3, #0x24] \n"
365 " LDR R2, [R3, #0x34] \n"
366 " MOV LR, PC \n"
367 " LDR PC, [R3, #0x30] \n"
368 " LDR R0, [SP] \n"
369 " BL sub_FFCE25AC \n"
370 " B loc_FFCE3550 \n"
371
372 "loc_FFCE345C:\n"
373 " ADD R6, SP, #0xC \n"
374 " ADD R1, R12, #4 \n"
375 " MOV R0, R6 \n"
376 " MOV R2, #6 \n"
377 " BL _memcpy \n"
378 " LDR R12, [SP] \n"
379 " LDR R3, [R12] \n"
380 " MOV R0, R12 \n"
381 " CMP R3, #0x15 \n"
382 " LDRLS PC, [PC, R3, LSL#2] \n"
383 " B loc_FFCE353C \n"
384 " .long loc_FFCE34E0 \n"
385 " .long loc_FFCE34E8 \n"
386 " .long loc_FFCE34F0 \n"
387 " .long loc_FFCE34F0 \n"
388 " .long loc_FFCE34E0 \n"
389 " .long loc_FFCE34E8 \n"
390 " .long loc_FFCE34F0 \n"
391 " .long loc_FFCE34F0 \n"
392 " .long loc_FFCE3508 \n"
393 " .long loc_FFCE3508 \n"
394 " .long loc_FFCE352C \n"
395 " .long loc_FFCE3534 \n"
396 " .long loc_FFCE353C \n"
397 " .long loc_FFCE353C \n"
398 " .long loc_FFCE353C \n"
399 " .long loc_FFCE34F8 \n"
400 " .long loc_FFCE3500 \n"
401 " .long loc_FFCE3514 \n"
402 " .long loc_FFCE351C \n"
403 " .long loc_FFCE351C \n"
404 " .long loc_FFCE353C \n"
405 " .long loc_FFCE3524 \n"
406
407 "loc_FFCE34E0:\n"
408 " BL sub_FFCE1A80 \n"
409 " B loc_FFCE3538 \n"
410
411 "loc_FFCE34E8:\n"
412 " BL sub_FFCE1BBC \n"
413 " B loc_FFCE3538 \n"
414
415 "loc_FFCE34F0:\n"
416 " BL sub_FFCE1CEC \n"
417 " B loc_FFCE3538 \n"
418
419 "loc_FFCE34F8:\n"
420 " BL sub_FFCE1EC0 \n"
421 " B loc_FFCE3538 \n"
422
423 "loc_FFCE3500:\n"
424 " BL sub_FFCE1FC8 \n"
425 " B loc_FFCE3538 \n"
426
427 "loc_FFCE3508:\n"
428 " BL sub_FFCE208C_my \n"
429 " MOV R8, #0 \n"
430 " B loc_FFCE3538 \n"
431
432 "loc_FFCE3514:\n"
433 " BL sub_FFCE2150 \n"
434 " B loc_FFCE3538 \n"
435
436 "loc_FFCE351C:\n"
437 " BL sub_FFCE2238 \n"
438 " B loc_FFCE3538 \n"
439
440 "loc_FFCE3524:\n"
441 " BL sub_FFCE263C \n"
442 " B loc_FFCE3538 \n"
443
444 "loc_FFCE352C:\n"
445 " BL sub_FFCE2710 \n"
446 " B loc_FFCE3538 \n"
447
448 "loc_FFCE3534:\n"
449 " BL sub_FFCE27FC \n"
450
451 "loc_FFCE3538:\n"
452 " LDR R12, [SP] \n"
453
454 "loc_FFCE353C:\n"
455 " ADD R0, R12, #4 \n"
456 " LDR R1, [R12, #0x24] \n"
457 " LDR R2, [R12, #0x34] \n"
458 " MOV LR, PC \n"
459 " LDR PC, [R12, #0x30] \n"
460
461 "loc_FFCE3550:\n"
462 " CMP R8, #1 \n"
463 " BNE loc_FFCE3578 \n"
464 " LDR R1, [SP] \n"
465 " LDR R3, [R1, #0x24] \n"
466 " ADD R3, R3, R3, LSL#1 \n"
467 " ADD R1, R1, R3, LSL#1 \n"
468 " MOV R0, R6 \n"
469 " SUB R1, R1, #2 \n"
470 " BL sub_FFCE1938 \n"
471 " B loc_FFCE3598 \n"
472
473 "loc_FFCE3578:\n"
474 " MOV R0, #1 \n"
475 " MOV R1, R0 \n"
476 " MOV R2, R0 \n"
477 " BL sub_FFCE18DC \n"
478 " MOV R0, #1 \n"
479 " MOV R1, R0 \n"
480 " MOV R2, R0 \n"
481 " BL sub_FFCE19F8 \n"
482
483 "loc_FFCE3598:\n"
484 " LDR R0, [SP] \n"
485 " BL sub_FFCE15A4 \n"
486
487 "loc_FFCE35A0:\n"
488 " LDR R3, =0x4FEE0 \n"
489 " MOV R2, #0 \n"
490 " LDR R0, [R3] \n"
491 " MOV R1, R7 \n"
492 " BL sub_FFC10054 /*_ReceiveMessageQueue*/ \n"
493 " LDR R12, [SP] \n"
494 " LDR R2, [R12] \n"
495 " CMP R2, #0x1A \n"
496 " BNE loc_FFCE32BC \n"
497 " MOV R0, R12 \n"
498 " BL sub_FFCE15A4 \n"
499 " LDR R3, =0x4FEDC \n"
500 " MOV R1, #1 \n"
501 " LDR R0, [R3] \n"
502 " BL sub_FFC0F8A4 /*_SetEventFlag*/ \n"
503 " BL _ExitTask \n"
504 " ADD SP, SP, #0x14 \n"
505 " LDMFD SP!, {R4-R8,PC} \n"
506 );
507 }
508
509
510
511 void __attribute__((naked,noinline)) sub_FFCE208C_my() {
512 asm volatile (
513 " STMFD SP!, {R4,R5,LR} \n"
514 " LDR R3, =0x4FEDC \n"
515 " MOV R4, R0 \n"
516 " MOV R1, #0xE \n"
517 " LDR R0, [R3] \n"
518 " BL sub_FFC0FA40 /*_ClearEventFlag*/ \n"
519 " MOV R1, #0 \n"
520 " LDRSH R0, [R4, #4] \n"
521 " BL sub_FFCE1644 \n"
522 " MOV R5, R0 \n"
523 " LDRSH R0, [R4, #6] \n"
524 " BL sub_FFCE1774 \n"
525 " LDRSH R0, [R4, #8] \n"
526 " BL sub_FFCE1810 \n"
527 " LDR R3, [R4] \n"
528 " CMP R3, #9 \n"
529 " MOVEQ R5, #0 \n"
530 " CMP R5, #1 \n"
531 " LDR R1, =0xFFCE15D4 \n"
532 " MOV R2, #2 \n"
533 " BNE loc_FFCE20F8 \n"
534 " LDRSH R0, [R4, #4] \n"
535 " BL sub_FFE63A5C \n"
536 " LDR R2, =0x4FF08 \n"
537 " MOV R3, #0 \n"
538 " STR R3, [R2] \n"
539 " B loc_FFCE20FC \n"
540
541 "loc_FFCE20F8:\n"
542 " BL sub_FFCE18AC \n"
543
544 "loc_FFCE20FC:\n"
545 " STRH R0, [R4, #4] \n"
546 " LDRSH R0, [R4, #6] \n"
547 " BL sub_FFC97E64_my \n"
548 " BL sub_FFC99DE8 \n"
549 " LDRSH R0, [R4, #8] \n"
550 " MOV R1, #1 \n"
551 " BL sub_FFC99C04 \n"
552 " MOV R1, #0 \n"
553 " ADD R0, R4, #8 \n"
554 " BL sub_FFC99CC8 \n"
555 " CMP R5, #1 \n"
556 " MOV R1, #2 \n"
557 " MOV R2, #0 \n"
558 " LDMNEFD SP!, {R4,R5,PC} \n"
559 " LDR R3, =0x4FEDC \n"
560 " LDR R0, [R3] \n"
561 " LDMFD SP!, {R4,R5,LR} \n"
562 " B sub_FFC0F894 /*_WaitForAllEventFlag*/ \n"
563 );
564 }
565
566
567
568 void __attribute__((naked,noinline)) sub_FFC97E64_my() {
569 asm volatile (
570 " STMFD SP!, {R4,LR} \n"
571 " LDR R3, =0x53AC \n"
572 " LDR R2, [R3] \n"
573 " MOV R3, R0, LSL#16 \n"
574 " CMP R2, #1 \n"
575 " MOV R1, #0x110 \n"
576 " LDR R0, =0xFFC97800 /*'Shutter.c'*/ \n"
577 " MOV R4, R3, ASR#16 \n"
578 " BEQ loc_FFC97E8C \n"
579 " BL _DebugAssert \n"
580
581 "loc_FFC97E8C:\n"
582 " MOV R1, #0x114 \n"
583 " CMN R4, #0xC00 \n"
584 " LDR R3, =0x3635E \n"
585 " LDR R0, =0xFFC97800 /*'Shutter.c'*/ \n"
586 " ADD R1, R1, #2 \n"
587 " LDREQSH R4, [R3] \n"
588 " LDRNE R3, =0x3635E \n"
589 " CMN R4, #0xC00 \n"
590 " STRH R4, [R3] \n"
591 " BNE loc_FFC97EB8 \n"
592 " BL _DebugAssert \n"
593
594 "loc_FFC97EB8:\n"
595 " MOV R0, R4 \n"
596 " BL apex2us \n"
597 " LDR PC, =0xFFC97EC0 \n"
598 );
599 }