This source file includes following definitions.
- capt_seq_task
- sub_FF9523D4_my
- sub_FF9554C4_my
- exp_drv_task
- sub_FF8FEA34_my
- sub_FF8ACAA0_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define NR_ON (1)
9 #define NR_OFF (0)
10
11 #define USE_STUBS_NRFLAG 1
12
13 #include "../../../generic/capt_seq.c"
14
15
16
17 void __attribute__((naked,noinline)) capt_seq_task() {
18 asm volatile (
19 " STMFD SP!, {R4,LR} \n"
20 " SUB SP, SP, #4 \n"
21 " MOV R4, SP \n"
22 " B loc_FF952E10 \n"
23
24 "loc_FF952C8C:\n"
25 " LDR R0, [SP] \n"
26 " LDR R3, [R0] \n"
27 " CMP R3, #0xF \n"
28 " LDRLS PC, [PC, R3, LSL#2] \n"
29 " B loc_FF952DF8 \n"
30 " .long loc_FF952CE0 \n"
31 " .long loc_FF952CF0 \n"
32 " .long loc_FF952D04 \n"
33 " .long loc_FF952D14 \n"
34 " .long loc_FF952D24 \n"
35 " .long loc_FF952D34 \n"
36 " .long loc_FF952D48 \n"
37 " .long loc_FF952D58 \n"
38 " .long loc_FF952D6C \n"
39 " .long loc_FF952D7C \n"
40 " .long loc_FF952D8C \n"
41 " .long loc_FF952D9C \n"
42 " .long loc_FF952DAC \n"
43 " .long loc_FF952DC0 \n"
44 " .long loc_FF952DD0 \n"
45 " .long loc_FF952DE0 \n"
46
47 "loc_FF952CE0:\n"
48 " BL sub_FF95346C \n"
49 " LDR R3, =0x6FC94 \n"
50 " MOV R1, #8 \n"
51 " B loc_FF952DEC \n"
52
53 "loc_FF952CF0:\n"
54 " BL sub_FF953BFC \n"
55 " BL shooting_expo_param_override\n"
56 " BL sub_FF9511F4 \n"
57 " LDR R3, =0x6FC94 \n"
58 " MOV R1, #0x10 \n"
59 " B loc_FF952DEC \n"
60
61 "loc_FF952D04:\n"
62 " BL sub_FF9523D4_my \n"
63 " LDR R3, =0x6FC94 \n"
64 " MOV R1, #2 \n"
65 " B loc_FF952DEC \n"
66
67 "loc_FF952D14:\n"
68 " BL sub_FF9541F4 \n"
69 " LDR R3, =0x6FC94 \n"
70 " MOV R1, #1 \n"
71 " B loc_FF952DEC \n"
72
73 "loc_FF952D24:\n"
74 " BL sub_FF953C9C \n"
75 " LDR R3, =0x6FC94 \n"
76 " MOV R1, #0x20 \n"
77 " B loc_FF952DEC \n"
78
79 "loc_FF952D34:\n"
80 " BL sub_FF953D8C \n"
81 " BL sub_FF9511F4 \n"
82 " LDR R3, =0x6FC94 \n"
83 " MOV R1, #0x40 \n"
84 " B loc_FF952DEC \n"
85
86 "loc_FF952D48:\n"
87 " BL sub_FF952588 \n"
88 " LDR R3, =0x6FC94 \n"
89 " MOV R1, #0x80 \n"
90 " B loc_FF952DEC \n"
91
92 "loc_FF952D58:\n"
93 " BL sub_FF953F08 \n"
94 " BL sub_FF9511F4 \n"
95 " LDR R3, =0x6FC94 \n"
96 " MOV R1, #0x400 \n"
97 " B loc_FF952DEC \n"
98
99 "loc_FF952D6C:\n"
100 " BL sub_FF953C9C \n"
101 " LDR R3, =0x6FC94 \n"
102 " MOV R1, #0x800 \n"
103 " B loc_FF952DEC \n"
104
105 "loc_FF952D7C:\n"
106 " BL sub_FF9549BC \n"
107 " LDR R3, =0x6FC94 \n"
108 " MOV R1, #0x8000 \n"
109 " B loc_FF952DEC \n"
110
111 "loc_FF952D8C:\n"
112 " BL sub_FF954D70 \n"
113 " LDR R3, =0x6FC94 \n"
114 " MOV R1, #0x10000 \n"
115 " B loc_FF952DEC \n"
116
117 "loc_FF952D9C:\n"
118 " BL sub_FF954C8C \n"
119 " LDR R3, =0x6FC94 \n"
120 " MOV R1, #0x20000 \n"
121 " B loc_FF952DEC \n"
122
123 "loc_FF952DAC:\n"
124 " MOV R0, #0 \n"
125 " BL sub_FF954E24 \n"
126 " LDR R3, =0x6FC94 \n"
127 " MOV R1, #0x40000 \n"
128 " B loc_FF952DEC \n"
129
130 "loc_FF952DC0:\n"
131 " BL sub_FF955088 \n"
132 " LDR R3, =0x6FC94 \n"
133 " MOV R1, #0x80000 \n"
134 " B loc_FF952DEC \n"
135
136 "loc_FF952DD0:\n"
137 " BL sub_FF955100 \n"
138 " LDR R3, =0x6FC94 \n"
139 " MOV R1, #0x100000 \n"
140 " B loc_FF952DEC \n"
141
142 "loc_FF952DE0:\n"
143 " BL sub_FF95514C \n"
144 " LDR R3, =0x6FC94 \n"
145 " MOV R1, #0x200000 \n"
146
147 "loc_FF952DEC:\n"
148 " LDR R0, [R3] \n"
149 " BL sub_FF81FDA0 /*_SetEventFlag*/ \n"
150 " B loc_FF952E08 \n"
151
152 "loc_FF952DF8:\n"
153 " MOV R1, #0x370 \n"
154 " LDR R0, =0xFF952084 /*'CaptSeq.c'*/ \n"
155 " ADD R1, R1, #1 \n"
156 " BL _DebugAssert \n"
157
158 "loc_FF952E08:\n"
159 " LDR R0, [SP] \n"
160 " BL sub_FF952104 \n"
161
162 "loc_FF952E10:\n"
163 " LDR R3, =0x6FC98 \n"
164 " MOV R1, R4 \n"
165 " LDR R0, [R3] \n"
166 " MOV R2, #0 \n"
167 " BL sub_FF8205A8 /*_ReceiveMessageQueue*/ \n"
168 " TST R0, #1 \n"
169 " BEQ loc_FF952C8C \n"
170 " MOV R1, #0x2E4 \n"
171 " LDR R0, =0xFF952084 /*'CaptSeq.c'*/ \n"
172 " ADD R1, R1, #3 \n"
173 " BL _DebugAssert \n"
174 " BL _ExitTask \n"
175 " ADD SP, SP, #4 \n"
176 " LDMFD SP!, {R4,PC} \n"
177 );
178 }
179
180
181
182 void __attribute__((naked,noinline)) sub_FF9523D4_my() {
183 asm volatile (
184 " STMFD SP!, {R4,R5,LR} \n"
185 " LDR R5, [R0, #8] \n"
186 " BL sub_FF95FA78 \n"
187 " CMP R0, #0 \n"
188 " LDR R0, =0xFF9523B0 /*'StrbCtrl::ChargeIsNotCompleted.\r\n'*/ \n"
189 " BNE loc_FF9523F4 \n"
190 " BL sub_FFAB78A8 \n"
191 " BL sub_FF95FA84 \n"
192
193 "loc_FF9523F4:\n"
194 " MOV R0, R5 \n"
195 " BL sub_FF954294 \n"
196 " TST R0, #1 \n"
197 " MOV R2, R5 \n"
198 " MOV R1, #1 \n"
199 " BEQ loc_FF952414 \n"
200 " LDMFD SP!, {R4,R5,LR} \n"
201 " B sub_FF9515C0 \n"
202
203 "loc_FF952414:\n"
204 " BL sub_FF98D194 \n"
205 " BL sub_FF950C60 \n"
206 " MOV R4, R0 \n"
207 " BL sub_FF825E98 \n"
208 " ADD R3, R5, R5, LSL#2 \n"
209 " ADD R3, R5, R3, LSL#1 \n"
210 " ADD R4, R4, R3, LSL#3 \n"
211 " STR R0, [R4, #4] \n"
212 " MOV R0, R5 \n"
213 " BL sub_FF955D54 \n"
214 " BL sub_FF954878 \n"
215 " BL sub_FF9547E4 \n"
216 " MOV R0, R5 \n"
217 " BL sub_FF9554C4_my \n"
218 " BL capt_seq_hook_raw_here\n"
219 " MOV R2, R5 \n"
220 " MOV R1, #1 \n"
221 " BL sub_FF9515C0 \n"
222 " LDMFD SP!, {R4,R5,LR} \n"
223 " B sub_FF95570C \n"
224 );
225 }
226
227
228
229 void __attribute__((naked,noinline)) sub_FF9554C4_my() {
230 asm volatile (
231 " STMFD SP!, {R4-R8,LR} \n"
232 " LDR R3, =0x53E4 \n"
233 " SUB SP, SP, #4 \n"
234 " LDR R2, [R3] \n"
235 " LDR R4, =0x53E8 \n"
236 " CMP R2, #0 \n"
237 " STR R0, [R4] \n"
238 " MOV R8, #0 \n"
239 " LDR R6, =0xFF9553FC \n"
240 " BNE loc_FF9554F8 \n"
241 " LDR R0, =0xFF9554B8 /*'MainCapt.c'*/ \n"
242 " MOV R1, #0xDB \n"
243 " BL _DebugAssert \n"
244
245 "loc_FF9554F8:\n"
246 " LDR R3, =0x6FCFC \n"
247 " MVN R1, #0 \n"
248 " LDR R0, [R3] \n"
249 " BL sub_FF81FF3C /*_ClearEventFlag*/ \n"
250 " BL sub_FF955434 \n"
251
252 " BL capt_seq_hook_set_nr\n"
253 " LDR PC, =0xFF95550C \n"
254 );
255 }
256
257
258
259 void __attribute__((naked,noinline)) exp_drv_task() {
260 asm volatile (
261 " STMFD SP!, {R4-R8,LR} \n"
262 " SUB SP, SP, #0x14 \n"
263 " MOV R7, SP \n"
264 " B loc_FF8FFAB4 \n"
265
266 "loc_FF8FF830:\n"
267 " CMP R3, #0x17 \n"
268 " BNE loc_FF8FF848 \n"
269 " LDR R0, [R2, #0x30] \n"
270 " MOV LR, PC \n"
271 " LDR PC, [R2, #0x2C] \n"
272 " B loc_FF8FF878 \n"
273
274 "loc_FF8FF848:\n"
275 " CMP R3, #0x15 \n"
276 " BNE loc_FF8FF858 \n"
277 " BL sub_FFA5D7E4 \n"
278 " B loc_FF8FF868 \n"
279
280 "loc_FF8FF858:\n"
281 " CMP R3, #0x16 \n"
282 " BNE loc_FF8FF884 \n"
283 " BL sub_FF8ACE08 \n"
284 " BL sub_FF8AEF64 \n"
285
286 "loc_FF8FF868:\n"
287 " LDR R3, [SP] \n"
288 " LDR R0, [R3, #0x30] \n"
289 " MOV LR, PC \n"
290 " LDR PC, [R3, #0x2C] \n"
291
292 "loc_FF8FF878:\n"
293 " LDR R0, [SP] \n"
294 " BL sub_FF8FDFAC \n"
295 " B loc_FF8FFAB4 \n"
296
297 "loc_FF8FF884:\n"
298 " CMP R3, #0xC \n"
299 " MOV R8, #1 \n"
300 " BNE loc_FF8FF8F4 \n"
301 " LDR R1, [R2, #0x24] \n"
302 " ADD R1, R1, R1, LSL#1 \n"
303 " ADD R6, SP, #0xC \n"
304 " ADD R1, R2, R1, LSL#1 \n"
305 " SUB R1, R1, #2 \n"
306 " MOV R2, #6 \n"
307 " MOV R0, R6 \n"
308 " BL _memcpy \n"
309 " LDR R0, [SP] \n"
310 " BL sub_FF8FEF18 \n"
311 " LDR R3, [SP] \n"
312 " LDR R1, [R3, #0x24] \n"
313 " LDR R2, [R3, #0x30] \n"
314 " ADD R0, R3, #4 \n"
315 " MOV LR, PC \n"
316 " LDR PC, [R3, #0x2C] \n"
317 " LDR R0, [SP] \n"
318 " BL sub_FF8FF09C \n"
319 " LDR R3, [SP] \n"
320 " ADD R0, R3, #4 \n"
321 " LDR R1, [R3, #0x24] \n"
322 " LDR R2, [R3, #0x38] \n"
323 " MOV LR, PC \n"
324 " LDR PC, [R3, #0x34] \n"
325 " B loc_FF8FFA64 \n"
326
327 "loc_FF8FF8F4:\n"
328 " SUB R3, R3, #0xD \n"
329 " CMP R3, #1 \n"
330 " BHI loc_FF8FF974 \n"
331 " ADD R6, SP, #0xC \n"
332 " ADD R5, SP, #4 \n"
333 " MOV R0, R2 \n"
334 " MOV R1, R6 \n"
335 " MOV R2, R5 \n"
336 " BL sub_FF8FF118 \n"
337 " MOV R4, R0 \n"
338 " CMP R4, #3 \n"
339 " CMPNE R4, #1 \n"
340 " BNE loc_FF8FF954 \n"
341 " LDR R12, [SP] \n"
342 " MOV R0, R5 \n"
343 " LDR R1, [R12, #0x24] \n"
344 " MOV R2, R4 \n"
345 " LDR R3, [R12, #0x30] \n"
346 " MOV LR, PC \n"
347 " LDR PC, [R12, #0x2C] \n"
348 " MOV R1, R4 \n"
349 " LDR R0, [SP] \n"
350 " BL sub_FF8FF800 \n"
351 " B loc_FF8FFA64 \n"
352
353 "loc_FF8FF954:\n"
354 " LDR R12, [SP] \n"
355 " MOV R2, R4 \n"
356 " ADD R0, R12, #4 \n"
357 " LDR R1, [R12, #0x24] \n"
358 " LDR R3, [R12, #0x30] \n"
359 " MOV LR, PC \n"
360 " LDR PC, [R12, #0x2C] \n"
361 " B loc_FF8FFA64 \n"
362
363 "loc_FF8FF974:\n"
364 " ADD R6, SP, #0xC \n"
365 " ADD R1, R2, #4 \n"
366 " MOV R0, R6 \n"
367 " MOV R2, #6 \n"
368 " BL _memcpy \n"
369 " LDR R12, [SP] \n"
370 " LDR R3, [R12] \n"
371 " MOV R0, R12 \n"
372 " CMP R3, #0x14 \n"
373 " LDRLS PC, [PC, R3, LSL#2] \n"
374 " B loc_FF8FFA50 \n"
375 " .long loc_FF8FF9F4 \n"
376 " .long loc_FF8FF9FC \n"
377 " .long loc_FF8FFA04 \n"
378 " .long loc_FF8FFA04 \n"
379 " .long loc_FF8FF9F4 \n"
380 " .long loc_FF8FF9FC \n"
381 " .long loc_FF8FFA04 \n"
382 " .long loc_FF8FFA04 \n"
383 " .long loc_FF8FFA1C \n"
384 " .long loc_FF8FFA1C \n"
385 " .long loc_FF8FFA40 \n"
386 " .long loc_FF8FFA48 \n"
387 " .long loc_FF8FFA50 \n"
388 " .long loc_FF8FFA50 \n"
389 " .long loc_FF8FFA50 \n"
390 " .long loc_FF8FFA0C \n"
391 " .long loc_FF8FFA14 \n"
392 " .long loc_FF8FFA28 \n"
393 " .long loc_FF8FFA30 \n"
394 " .long loc_FF8FFA30 \n"
395 " .long loc_FF8FFA38 \n"
396
397 "loc_FF8FF9F4:\n"
398 " BL sub_FF8FE46C \n"
399 " B loc_FF8FFA4C \n"
400
401 "loc_FF8FF9FC:\n"
402 " BL sub_FF8FE5A8 \n"
403 " B loc_FF8FFA4C \n"
404
405 "loc_FF8FFA04:\n"
406 " BL sub_FF8FE6D8 \n"
407 " B loc_FF8FFA4C \n"
408
409 "loc_FF8FFA0C:\n"
410 " BL sub_FF8FE8AC \n"
411 " B loc_FF8FFA4C \n"
412
413 "loc_FF8FFA14:\n"
414 " BL sub_FF8FE970 \n"
415 " B loc_FF8FFA4C \n"
416
417 "loc_FF8FFA1C:\n"
418 " BL sub_FF8FEA34_my \n"
419 " MOV R8, #0 \n"
420 " B loc_FF8FFA4C \n"
421
422 "loc_FF8FFA28:\n"
423 " BL sub_FF8FEAF8 \n"
424 " B loc_FF8FFA4C \n"
425
426 "loc_FF8FFA30:\n"
427 " BL sub_FF8FEBE0 \n"
428 " B loc_FF8FFA4C \n"
429
430 "loc_FF8FFA38:\n"
431 " BL sub_FF8FECD8 \n"
432 " B loc_FF8FFA4C \n"
433
434 "loc_FF8FFA40:\n"
435 " BL sub_FF8FEDAC \n"
436 " B loc_FF8FFA4C \n"
437
438 "loc_FF8FFA48:\n"
439 " BL sub_FF8FEE98 \n"
440
441 "loc_FF8FFA4C:\n"
442 " LDR R12, [SP] \n"
443
444 "loc_FF8FFA50:\n"
445 " ADD R0, R12, #4 \n"
446 " LDR R1, [R12, #0x24] \n"
447 " LDR R2, [R12, #0x30] \n"
448 " MOV LR, PC \n"
449 " LDR PC, [R12, #0x2C] \n"
450
451 "loc_FF8FFA64:\n"
452 " CMP R8, #1 \n"
453 " BNE loc_FF8FFA8C \n"
454 " LDR R1, [SP] \n"
455 " LDR R3, [R1, #0x24] \n"
456 " ADD R3, R3, R3, LSL#1 \n"
457 " ADD R1, R1, R3, LSL#1 \n"
458 " MOV R0, R6 \n"
459 " SUB R1, R1, #2 \n"
460 " BL sub_FF8FE324 \n"
461 " B loc_FF8FFAAC \n"
462
463 "loc_FF8FFA8C:\n"
464 " MOV R0, #1 \n"
465 " MOV R1, R0 \n"
466 " MOV R2, R0 \n"
467 " BL sub_FF8FE2C8 \n"
468 " MOV R0, #1 \n"
469 " MOV R1, R0 \n"
470 " MOV R2, R0 \n"
471 " BL sub_FF8FE3E4 \n"
472
473 "loc_FF8FFAAC:\n"
474 " LDR R0, [SP] \n"
475 " BL sub_FF8FDFAC \n"
476
477 "loc_FF8FFAB4:\n"
478 " LDR R3, =0x4B86C \n"
479 " MOV R2, #0 \n"
480 " LDR R0, [R3] \n"
481 " MOV R1, R7 \n"
482 " BL sub_FF8205A8 /*_ReceiveMessageQueue*/ \n"
483 " LDR R2, [SP] \n"
484 " LDR R3, [R2] \n"
485 " CMP R3, #0x18 \n"
486 " BNE loc_FF8FF830 \n"
487 " MOV R0, R2 \n"
488 " BL sub_FF8FDFAC \n"
489 " LDR R3, =0x4B868 \n"
490 " MOV R1, #1 \n"
491 " LDR R0, [R3] \n"
492 " BL sub_FF81FDA0 /*_SetEventFlag*/ \n"
493 " BL _ExitTask \n"
494 " ADD SP, SP, #0x14 \n"
495 " LDMFD SP!, {R4-R8,PC} \n"
496 );
497 }
498
499
500
501 void __attribute__((naked,noinline)) sub_FF8FEA34_my() {
502 asm volatile (
503 " STMFD SP!, {R4,R5,LR} \n"
504 " LDR R3, =0x4B868 \n"
505 " MOV R4, R0 \n"
506 " MOV R1, #0xE \n"
507 " LDR R0, [R3] \n"
508 " BL sub_FF81FF3C /*_ClearEventFlag*/ \n"
509 " MOV R1, #0 \n"
510 " LDRSH R0, [R4, #4] \n"
511 " BL sub_FF8FE030 \n"
512 " MOV R5, R0 \n"
513 " LDRSH R0, [R4, #6] \n"
514 " BL sub_FF8FE160 \n"
515 " LDRSH R0, [R4, #8] \n"
516 " BL sub_FF8FE1FC \n"
517 " LDR R3, [R4] \n"
518 " CMP R3, #9 \n"
519 " MOVEQ R5, #0 \n"
520 " CMP R5, #1 \n"
521 " LDR R1, =0xFF8FDFDC \n"
522 " MOV R2, #2 \n"
523 " BNE loc_FF8FEAA0 \n"
524 " LDRSH R0, [R4, #4] \n"
525 " BL sub_FFA5D4EC \n"
526 " LDR R2, =0x4B894 \n"
527 " MOV R3, #0 \n"
528 " STR R3, [R2] \n"
529 " B loc_FF8FEAA4 \n"
530
531 "loc_FF8FEAA0:\n"
532 " BL sub_FF8FE298 \n"
533
534 "loc_FF8FEAA4:\n"
535 " STRH R0, [R4, #4] \n"
536 " LDRSH R0, [R4, #6] \n"
537 " BL sub_FF8ACAA0_my \n"
538 " BL sub_FF8AED08 \n"
539 " MOV R1, R0 \n"
540 " LDRSH R0, [R4, #8] \n"
541 " BL sub_FF8AEB24 \n"
542 " MOV R1, #0 \n"
543 " ADD R0, R4, #8 \n"
544 " BL sub_FF8AEBE8 \n"
545 " CMP R5, #1 \n"
546 " MOV R1, #2 \n"
547 " MOV R2, #0 \n"
548 " LDMNEFD SP!, {R4,R5,PC} \n"
549 " LDR R3, =0x4B868 \n"
550 " LDR R0, [R3] \n"
551 " LDMFD SP!, {R4,R5,LR} \n"
552 " B sub_FF81FD90 /*_WaitForAllEventFlag*/ \n"
553 );
554 }
555
556
557
558 void __attribute__((naked,noinline)) sub_FF8ACAA0_my() {
559 asm volatile (
560 " STMFD SP!, {R4,LR} \n"
561 " LDR R3, =0x31FC \n"
562 " LDR R2, [R3] \n"
563 " MOV R3, R0, LSL#16 \n"
564 " CMP R2, #1 \n"
565 " MOV R1, #0x10C \n"
566 " LDR R0, =0xFF8AC440 /*'Shutter.c'*/ \n"
567 " MOV R4, R3, ASR#16 \n"
568 " BEQ loc_FF8ACAC8 \n"
569 " BL _DebugAssert \n"
570
571 "loc_FF8ACAC8:\n"
572 " MOV R1, #0x110 \n"
573 " CMN R4, #0xC00 \n"
574 " LDR R3, =0x2E2B6 \n"
575 " LDR R0, =0xFF8AC440 /*'Shutter.c'*/ \n"
576 " ADD R1, R1, #2 \n"
577 " LDREQSH R4, [R3] \n"
578 " LDRNE R3, =0x2E2B6 \n"
579 " CMN R4, #0xC00 \n"
580 " STRH R4, [R3] \n"
581 " BNE loc_FF8ACAF4 \n"
582 " BL _DebugAssert \n"
583
584 "loc_FF8ACAF4:\n"
585 " MOV R0, R4 \n"
586 " BL apex2us \n"
587 " LDR PC, =0xFF8ACAFC \n"
588 );
589 }