root/platform/m10/sub/110d/capt_seq.c

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DEFINITIONS

This source file includes following definitions.
  1. log_capt_seq
  2. log_capt_seq2
  3. log_capt_seq_override
  4. log_remote_hook
  5. log_remote_hook2
  6. log_rh
  7. capt_seq_task
  8. sub_fc0dd248_my
  9. sub_fc0dd0dc_my
  10. sub_fc116fa2_my
  11. exp_drv_task
  12. sub_fc278b1c_my
  13. sub_fc142cda_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 //#define CAPTSEQ_DEBUG 1
   6 #undef CAPTSEQ_DEBUG
   7 
   8 #define USE_STUBS_NRFLAG 1
   9 #define NR_AUTO (0)                 // have to explictly reset value back to 0 to enable auto
  10 
  11 extern int active_raw_buffer;
  12 // debug
  13 extern void _LogCameraEvent(int id,const char *fmt,...);
  14 
  15 extern char *hook_raw_image_addr(void);
  16 
  17 #ifdef CAPTSEQ_DEBUG
  18 void log_capt_seq(int m)
  19 {
  20     _LogCameraEvent(0x60,"cs m:%d arb:%d rb:0x%08x i:%04d",
  21                     m,
  22                     active_raw_buffer,
  23                     hook_raw_image_addr(),
  24                     get_exposure_counter());
  25 }
  26 void log_capt_seq2(int m)
  27 {
  28     _LogCameraEvent(0x60,"cs end m:%d arb:%d rb:0x%08x i:%04d",
  29                     m,
  30                     active_raw_buffer,
  31                     hook_raw_image_addr(),
  32                     get_exposure_counter());
  33 }
  34 void log_capt_seq_override(void)
  35 {
  36     _LogCameraEvent(0x60,"cs override arb:%d rb:0x%08x i:%04d",
  37                     active_raw_buffer,
  38                     hook_raw_image_addr(),
  39                     get_exposure_counter());
  40 }
  41 void log_remote_hook(void) {
  42     _LogCameraEvent(0x60,"remote hook1 %d", *(unsigned*)0xc0242014);
  43 }
  44 void log_remote_hook2(void) {
  45     _LogCameraEvent(0x60,"remote hook2 %d", *(unsigned*)0xc0242014);
  46 }
  47 void log_rh(void) {
  48     _LogCameraEvent(0x60,"raw hook");
  49 }
  50 #endif
  51 
  52 #include "../../../generic/capt_seq.c"
  53 // -f=chdk -s=task_CaptSeqTask -c=179
  54 void __attribute__((naked,noinline)) capt_seq_task() {
  55     asm volatile (
  56 // task_CaptSeqTask 0xfc0bce67
  57 "    push    {r3, r4, r5, r6, r7, lr}\n"
  58 "    ldr     r4, =0x0005dd60\n"
  59 "    movs    r6, #0\n"
  60 "    ldr     r5, =0x0000b1f8\n"
  61 "loc_fc0bce6e:\n"
  62 "    movs    r2, #0\n"
  63 "    mov     r1, sp\n"
  64 "    ldr     r0, [r5, #8]\n"
  65 "    blx     sub_fc314c7c\n" // j_ReceiveMessageQueue
  66 "    lsls    r0, r0, #0x1f\n"
  67 "    beq     loc_fc0bce90\n"
  68 "    movw    r2, #0x455\n"
  69 "    ldr     r1, =0xfc0bca88\n" //  *"SsShootTask.c"
  70 "    movs    r0, #0\n"
  71 "    blx     sub_fc314dec\n" // j_DebugAssert
  72 "    blx     sub_fc314ca4\n" // -> ExitTask_FW
  73 "    pop     {r3, r4, r5, r6, r7, pc}\n"
  74 "loc_fc0bce90:\n"
  75 "    ldr     r0, [sp]\n"
  76 "    ldr     r0, [r0]\n"
  77 "    cmp     r0, #1\n"
  78 "    beq     loc_fc0bcea8\n"
  79 "    cmp     r0, #0x27\n"
  80 "    beq     loc_fc0bcea8\n"
  81 "    cmp     r0, #0x1c\n"
  82 "    beq     loc_fc0bcea8\n"
  83 "    cmp     r0, #0x1f\n"
  84 "    beq     loc_fc0bcea8\n"
  85 "    bl      sub_fc18c164\n"
  86 "loc_fc0bcea8:\n"
  87 #ifdef CAPTSEQ_DEBUG
  88 "ldr     r0, [sp]\n"
  89 "ldr     r0, [r0]\n"
  90 "bl log_capt_seq\n"
  91 #endif
  92 "    ldr     r0, [sp]\n"
  93 "    ldr     r1, [r0]\n"
  94 "    cmp     r1, #0x2e\n"
  95 "    bhs     loc_fc0bcf6a\n"
  96 "    tbb     [pc, r1]\n" // (jumptable r1 46 elements)
  97 "branchtable_fc0bceb4:\n"
  98 "    .byte((loc_fc0bcee2 - branchtable_fc0bceb4) / 2)\n" // (case 0)
  99 "    .byte((loc_fc0bcef8 - branchtable_fc0bceb4) / 2)\n" // (case 1)
 100 "    .byte((loc_fc0bcf00 - branchtable_fc0bceb4) / 2)\n" // (case 2)
 101 "    .byte((loc_fc0bcf0e - branchtable_fc0bceb4) / 2)\n" // (case 3)
 102 "    .byte((loc_fc0bcf08 - branchtable_fc0bceb4) / 2)\n" // (case 4)
 103 "    .byte((loc_fc0bcf18 - branchtable_fc0bceb4) / 2)\n" // (case 5)
 104 "    .byte((loc_fc0bcf1e - branchtable_fc0bceb4) / 2)\n" // (case 6)
 105 "    .byte((loc_fc0bcf5c - branchtable_fc0bceb4) / 2)\n" // (case 7)
 106 "    .byte((loc_fc0bcf2e - branchtable_fc0bceb4) / 2)\n" // (case 8)
 107 "    .byte((loc_fc0bcf36 - branchtable_fc0bceb4) / 2)\n" // (case 9)
 108 "    .byte((loc_fc0bcf3c - branchtable_fc0bceb4) / 2)\n" // (case 10)
 109 "    .byte((loc_fc0bcf44 - branchtable_fc0bceb4) / 2)\n" // (case 11)
 110 "    .byte((loc_fc0bcf4a - branchtable_fc0bceb4) / 2)\n" // (case 12)
 111 "    .byte((loc_fc0bcf50 - branchtable_fc0bceb4) / 2)\n" // (case 13)
 112 "    .byte((loc_fc0bcf56 - branchtable_fc0bceb4) / 2)\n" // (case 14)
 113 "    .byte((loc_fc0bcf64 - branchtable_fc0bceb4) / 2)\n" // (case 15)
 114 "    .byte((loc_fc0bcf78 - branchtable_fc0bceb4) / 2)\n" // (case 16)
 115 "    .byte((loc_fc0bcf7e - branchtable_fc0bceb4) / 2)\n" // (case 17)
 116 "    .byte((loc_fc0bcf84 - branchtable_fc0bceb4) / 2)\n" // (case 18)
 117 "    .byte((loc_fc0bcf8a - branchtable_fc0bceb4) / 2)\n" // (case 19)
 118 "    .byte((loc_fc0bcf8e - branchtable_fc0bceb4) / 2)\n" // (case 20)
 119 "    .byte((loc_fc0bcf94 - branchtable_fc0bceb4) / 2)\n" // (case 21)
 120 "    .byte((loc_fc0bcf9a - branchtable_fc0bceb4) / 2)\n" // (case 22)
 121 "    .byte((loc_fc0bcfa0 - branchtable_fc0bceb4) / 2)\n" // (case 23)
 122 "    .byte((loc_fc0bcfa6 - branchtable_fc0bceb4) / 2)\n" // (case 24)
 123 "    .byte((loc_fc0bcfac - branchtable_fc0bceb4) / 2)\n" // (case 25)
 124 "    .byte((loc_fc0bcfb4 - branchtable_fc0bceb4) / 2)\n" // (case 26)
 125 "    .byte((loc_fc0bcfba - branchtable_fc0bceb4) / 2)\n" // (case 27)
 126 "    .byte((loc_fc0bcfbe - branchtable_fc0bceb4) / 2)\n" // (case 28)
 127 "    .byte((loc_fc0bcfc6 - branchtable_fc0bceb4) / 2)\n" // (case 29)
 128 "    .byte((loc_fc0bcfcc - branchtable_fc0bceb4) / 2)\n" // (case 30)
 129 "    .byte((loc_fc0bcfd2 - branchtable_fc0bceb4) / 2)\n" // (case 31)
 130 "    .byte((loc_fc0bcfd8 - branchtable_fc0bceb4) / 2)\n" // (case 32)
 131 "    .byte((loc_fc0bcfde - branchtable_fc0bceb4) / 2)\n" // (case 33)
 132 "    .byte((loc_fc0bcfe4 - branchtable_fc0bceb4) / 2)\n" // (case 34)
 133 "    .byte((loc_fc0bcfea - branchtable_fc0bceb4) / 2)\n" // (case 35)
 134 "    .byte((loc_fc0bcff2 - branchtable_fc0bceb4) / 2)\n" // (case 36)
 135 "    .byte((loc_fc0bcff8 - branchtable_fc0bceb4) / 2)\n" // (case 37)
 136 "    .byte((loc_fc0bd01c - branchtable_fc0bceb4) / 2)\n" // (case 38)
 137 "    .byte((loc_fc0bd022 - branchtable_fc0bceb4) / 2)\n" // (case 39)
 138 "    .byte((loc_fc0bd05a - branchtable_fc0bceb4) / 2)\n" // (case 40)
 139 "    .byte((loc_fc0bd02e - branchtable_fc0bceb4) / 2)\n" // (case 41)
 140 "    .byte((loc_fc0bd034 - branchtable_fc0bceb4) / 2)\n" // (case 42)
 141 "    .byte((loc_fc0bd03a - branchtable_fc0bceb4) / 2)\n" // (case 43)
 142 "    .byte((loc_fc0bd040 - branchtable_fc0bceb4) / 2)\n" // (case 44)
 143 "    .byte((loc_fc0bd046 - branchtable_fc0bceb4) / 2)\n" // (case 45)
 144 ".align 1\n"
 145 "loc_fc0bcee2:\n"
 146 "    ldr     r0, [r0, #0xc]\n"
 147 "    bl      sub_fc0d4f20\n"
 148 #ifdef CAPTSEQ_DEBUG
 149 "bl log_capt_seq_override\n" // debug
 150 #endif
 151 "    bl      shooting_expo_param_override\n" // +
 152 "    bl      sub_fc101d70\n"
 153 "    ldr     r0, [r4, #0x28]\n"
 154 "    cmp     r0, #0\n"
 155 "    beq     loc_fc0bcef6\n"
 156 "    bl      sub_fc0dd248_my\n" // ->
 157 "loc_fc0bcef6:\n"
 158 "    b       loc_fc0bd05a\n"
 159 "loc_fc0bcef8:\n"
 160 "    ldr     r0, [r0, #0x10]\n"
 161 "    bl      sub_fc0dd0dc_my\n" // ->
 162 "    b       loc_fc0bd05a\n"
 163 "loc_fc0bcf00:\n"
 164 "    movs    r0, #1\n"
 165 "    bl      sub_fc0d51b0\n"
 166 "    b       loc_fc0bd05a\n"
 167 "loc_fc0bcf08:\n"
 168 "    bl      sub_fc0d4c64\n"
 169 "    b       loc_fc0bcf14\n"
 170 "loc_fc0bcf0e:\n"
 171 "    ldr     r0, [r0, #0xc]\n"
 172 "    bl      sub_fc0d4f08\n"
 173 "loc_fc0bcf14:\n"
 174 "    str     r6, [r4, #0x28]\n"
 175 "    b       loc_fc0bd05a\n"
 176 "loc_fc0bcf18:\n"
 177 "    bl      sub_fc0d4f0e\n"
 178 "    b       loc_fc0bd05a\n"
 179 "loc_fc0bcf1e:\n"
 180 "    bl      sub_fc0d5152\n"
 181 "    bl      sub_fc101d70\n"
 182 "    movs    r0, #0\n"
 183 "    bl      sub_fc2a5046\n"
 184 "    b       loc_fc0bd05a\n"
 185 "loc_fc0bcf2e:\n"
 186 "    ldr     r0, [r4, #0x54]\n"
 187 "    bl      sub_fc0d5756\n"
 188 "    b       loc_fc0bd05a\n"
 189 "loc_fc0bcf36:\n"
 190 "    bl      sub_fc0d59e2\n"
 191 "    b       loc_fc0bd05a\n"
 192 "loc_fc0bcf3c:\n"
 193 "    ldr     r0, [r0, #0xc]\n"
 194 "    bl      sub_fc0d5a2e\n"
 195 "    b       loc_fc0bd05a\n"
 196 "loc_fc0bcf44:\n"
 197 "    bl      sub_fc0d5bf4\n"
 198 "    b       loc_fc0bd05a\n"
 199 "loc_fc0bcf4a:\n"
 200 "    bl      sub_fc0d5c52\n"
 201 "    b       loc_fc0bd05a\n"
 202 "loc_fc0bcf50:\n"
 203 "    bl      sub_fc0d6008\n"
 204 "    b       loc_fc0bd05a\n"
 205 "loc_fc0bcf56:\n"
 206 "    bl      sub_fc0d609e\n"
 207 "    b       loc_fc0bd05a\n"
 208 "loc_fc0bcf5c:\n"
 209 "    ldr     r0, [r0, #0xc]\n"
 210 "    bl      sub_fc0d4f08\n"
 211 "    b       loc_fc0bd05a\n"
 212 "loc_fc0bcf64:\n"
 213 "    bl      sub_fc0dc83c\n"
 214 "    b       loc_fc0bd05a\n"
 215 "loc_fc0bcf6a:\n"
 216 "    b       loc_fc0bd04c\n"
 217 // - literal pool removed
 218 ".ltorg\n"
 219 "loc_fc0bcf78:\n"
 220 "    bl      sub_fc0dc9f4\n"
 221 "    b       loc_fc0bd05a\n"
 222 "loc_fc0bcf7e:\n"
 223 "    bl      sub_fc0dca98\n"
 224 "    b       loc_fc0bd05a\n"
 225 "loc_fc0bcf84:\n"
 226 "    bl      sub_fc0dcb2a\n"
 227 "    b       loc_fc0bd05a\n"
 228 "loc_fc0bcf8a:\n"
 229 "    movs    r0, #0\n"
 230 "    b       loc_fc0bcfae\n"
 231 "loc_fc0bcf8e:\n"
 232 "    bl      sub_fc0dce20\n"
 233 "    b       loc_fc0bd05a\n"
 234 "loc_fc0bcf94:\n"
 235 "    bl      sub_fc0dce80\n"
 236 "    b       loc_fc0bd05a\n"
 237 "loc_fc0bcf9a:\n"
 238 "    bl      sub_fc0dce84\n"
 239 "    b       loc_fc0bd05a\n"
 240 "loc_fc0bcfa0:\n"
 241 "    bl      sub_fc0dce94\n"
 242 "    b       loc_fc0bd05a\n"
 243 "loc_fc0bcfa6:\n"
 244 "    bl      sub_fc0dcf28\n"
 245 "    b       loc_fc0bd05a\n"
 246 "loc_fc0bcfac:\n"
 247 "    movs    r0, #1\n"
 248 "loc_fc0bcfae:\n"
 249 "    bl      sub_fc0dcd00\n"
 250 "    b       loc_fc0bd05a\n"
 251 "loc_fc0bcfb4:\n"
 252 "    bl      sub_fc0d5276\n"
 253 "    b       loc_fc0bd05a\n"
 254 "loc_fc0bcfba:\n"
 255 "    movs    r0, #0\n"
 256 "    b       loc_fc0bcfc0\n"
 257 "loc_fc0bcfbe:\n"
 258 "    ldr     r0, [r0, #0xc]\n"
 259 "loc_fc0bcfc0:\n"
 260 "    bl      sub_fc0d52a8\n"
 261 "    b       loc_fc0bd05a\n"
 262 "loc_fc0bcfc6:\n"
 263 "    bl      sub_fc0dcc46\n"
 264 "    b       loc_fc0bd05a\n"
 265 "loc_fc0bcfcc:\n"
 266 "    bl      sub_fc0dccb2\n"
 267 "    b       loc_fc0bd05a\n"
 268 "loc_fc0bcfd2:\n"
 269 "    bl      sub_fc10fd1c\n"
 270 "    b       loc_fc0bd05a\n"
 271 "loc_fc0bcfd8:\n"
 272 "    bl      sub_fc10256c\n"
 273 "    b       loc_fc0bd05a\n"
 274 "loc_fc0bcfde:\n"
 275 "    bl      sub_fc0d67ca\n"
 276 "    b       loc_fc0bd05a\n"
 277 "loc_fc0bcfe4:\n"
 278 "    bl      sub_fc0d6884\n"
 279 "    b       loc_fc0bd05a\n"
 280 "loc_fc0bcfea:\n"
 281 "    ldr     r0, [r0, #0xc]\n"
 282 "    bl      sub_fc0dd008\n"
 283 "    b       loc_fc0bd05a\n"
 284 "loc_fc0bcff2:\n"
 285 "    bl      sub_fc0dd05a\n"
 286 "    b       loc_fc0bd05a\n"
 287 "loc_fc0bcff8:\n"
 288 "    bl      sub_fc0d71b8\n"
 289 "    bl      sub_fc0d7ffe\n"
 290 "    ldrh.w  r0, [r4, #0x1a4]\n"
 291 "    cmp     r0, #4\n"
 292 "    beq     loc_fc0bd012\n"
 293 "    ldrh    r0, [r4]\n"
 294 "    sub.w   r1, r0, #0x8200\n"
 295 "    subs    r1, #0x36\n"
 296 "    bne     loc_fc0bd05a\n"
 297 "loc_fc0bd012:\n"
 298 "    bl      sub_fc0d6884\n"
 299 "    bl      sub_fc0d6c06\n"
 300 "    b       loc_fc0bd05a\n"
 301 "loc_fc0bd01c:\n"
 302 "    movs    r2, #0\n"
 303 "    movs    r1, #0x11\n"
 304 "    b       loc_fc0bd026\n"
 305 "loc_fc0bd022:\n"
 306 "    movs    r2, #0\n"
 307 "    movs    r1, #0x10\n"
 308 "loc_fc0bd026:\n"
 309 "    movs    r0, #0\n"
 310 "    bl      sub_fc1026fa\n"
 311 "    b       loc_fc0bd05a\n"
 312 "loc_fc0bd02e:\n"
 313 "    bl      sub_fc110468\n"
 314 "    b       loc_fc0bd05a\n"
 315 "loc_fc0bd034:\n"
 316 "    bl      sub_fc1104e4\n"
 317 "    b       loc_fc0bd05a\n"
 318 "loc_fc0bd03a:\n"
 319 "    bl      sub_fc110524\n"
 320 "    b       loc_fc0bd05a\n"
 321 "loc_fc0bd040:\n"
 322 "    bl      sub_fc1103ac\n"
 323 "    b       loc_fc0bd05a\n"
 324 "loc_fc0bd046:\n"
 325 "    bl      sub_fc1103ae\n"
 326 "    b       loc_fc0bd05a\n"
 327 "loc_fc0bd04c:\n"
 328 "    movw    r2, #0x588\n"
 329 "    ldr     r1, =0xfc0bca88\n" //  *"SsShootTask.c"
 330 "    movs    r0, #0\n"
 331 "    blx     sub_fc314dec\n" // j_DebugAssert
 332 "loc_fc0bd05a:\n"
 333 #ifdef CAPTSEQ_DEBUG
 334 // debug after message handled
 335 "ldr     r0, [sp]\n"
 336 "ldr     r0, [r0]\n"
 337 "bl log_capt_seq2\n"
 338 #endif
 339 "    ldr     r0, [sp]\n"
 340 "    ldr     r1, [r0, #4]\n"
 341 "    ldr     r0, [r5, #4]\n"
 342 "    blx     sub_fc314c94\n" // j_SetEventFlag
 343 "    ldr     r7, [sp]\n"
 344 "    ldr     r0, [r7, #8]\n"
 345 "    cbnz    r0, loc_fc0bd078\n"
 346 "    movw    r2, #0x12b\n"
 347 "    ldr     r1, =0xfc0bca88\n" //  *"SsShootTask.c"
 348 "    movs    r0, #0\n"
 349 "    blx     sub_fc314dec\n" // j_DebugAssert
 350 "loc_fc0bd078:\n"
 351 "    str     r6, [r7, #8]\n"
 352 "    b       loc_fc0bce6e\n"
 353 ".ltorg\n"
 354     );
 355 }
 356 
 357 void __attribute__((naked,noinline)) sub_fc0dd248_my() {
 358     asm volatile (
 359 // PRIMARY.BIN size:0x2000000 start:0xfc0dd249 instructions:34 opts:0xef
 360 "    push    {r4, lr}\n"
 361 "    bl      sub_fc102c38\n"
 362 "    mov     r4, r0\n"
 363 "    bl      sub_fc0d4f14\n"
 364 "    bl      sub_fc137bd8\n"
 365 "    mov     r1, r4\n"
 366 "    bl      sub_fc137c26\n"
 367 "    movs    r2, #4\n"
 368 "    movw    r0, #0x118\n"
 369 "    add.w   r1, r4, #0x34\n"
 370 "    bl      sub_fc3880d8\n" // SetPropertyCase
 371 "    movs    r2, #4\n"
 372 "    movs    r0, #0x32\n"
 373 "    add.w   r1, r4, #0x38\n"
 374 "    bl      sub_fc3880d8\n" // SetPropertyCase
 375 "    movs    r2, #4\n"
 376 "    movs    r0, #0x46\n"
 377 "    add.w   r1, r4, #8\n"
 378 "    bl      sub_fc3880d8\n" // SetPropertyCase
 379 "    bl      sub_fc18bc92\n"
 380 "    mvn     r1, #0x1000\n"
 381 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
 382 "    mov     r0, r4\n"
 383 "    bl      sub_fc18b978\n"
 384 "    bl      sub_fc2494d4\n"
 385 "    bl      sub_fc2a6a1e\n"
 386 "    mov     r0, r4\n"
 387 "    bl      sub_fc116fa2_my\n" // ->
 388 "    lsls    r0, r0, #0x1f\n"
 389 "    beq     loc_fc0dd2ae\n"
 390 "    ldr     r1, =0x00012db4\n"
 391 "    movs    r0, #1\n"
 392 "    str     r0, [r1]\n"
 393 "loc_fc0dd2ae:\n"
 394 "    pop     {r4, pc}\n"
 395 ".ltorg\n"
 396     );
 397 }
 398 
 399 void __attribute__((naked,noinline)) sub_fc0dd0dc_my() {
 400     asm volatile (
 401 // PRIMARY.BIN size:0x2000000 start:0xfc0dd0dd instructions:136 opts:0xef
 402 "    push    {r3, r4, r5, r6, r7, lr}\n"
 403 "    ldr     r6, =0x0005dd60\n"
 404 "    mov     r5, r0\n"
 405 "    movs    r4, #0\n"
 406 "    ldr     r0, [r6, #0x28]\n"
 407 "    cbz     r0, loc_fc0dd104\n"
 408 "    ldr     r0, =0x00012db4\n"
 409 "    ldr     r0, [r0]\n"
 410 "    cbz     r0, loc_fc0dd0f0\n"
 411 "    movs    r4, #0x1d\n"
 412 "loc_fc0dd0f0:\n"
 413 "    mov     r2, r5\n"
 414 "    movs    r1, #2\n"
 415 "    mov     r0, r4\n"
 416 "    bl      sub_fc1026fa\n"
 417 "    mov     r1, r4\n"
 418 "    mov     r0, r5\n"
 419 "    bl      sub_fc18bff0\n"
 420 "    b       loc_fc0dd23e\n"
 421 "loc_fc0dd104:\n"
 422 "    bl      sub_fc137bd8\n"
 423 "    mov     r1, r5\n"
 424 "    bl      sub_fc137c26\n"
 425 "    movs    r2, #4\n"
 426 "    movw    r0, #0x118\n"
 427 "    add.w   r1, r5, #0x34\n"
 428 "    bl      sub_fc3880d8\n" // SetPropertyCase
 429 "    movs    r2, #4\n"
 430 "    movs    r0, #0x32\n"
 431 "    add.w   r1, r5, #0x38\n"
 432 "    bl      sub_fc3880d8\n" // SetPropertyCase
 433 "    ldr.w   r0, [r6, #0x10c]\n"
 434 "    cbnz    r0, loc_fc0dd13e\n"
 435 "    ldrh.w  r0, [r6, #0x1a2]\n"
 436 "    cmp     r0, #3\n"
 437 "    beq     loc_fc0dd144\n"
 438 "    ldr     r0, [r5, #8]\n"
 439 "    cmp     r0, #1\n"
 440 "    bhi     loc_fc0dd154\n"
 441 "    b       loc_fc0dd144\n"
 442 "loc_fc0dd13e:\n"
 443 "    ldr     r0, [r5, #0xc]\n"
 444 "    cmp     r0, #1\n"
 445 "    bne     loc_fc0dd154\n"
 446 "loc_fc0dd144:\n"
 447 "    movs    r0, #0xc\n"
 448 "    bl      sub_fc33e0c8\n"
 449 "    lsls    r0, r0, #0x1f\n"
 450 "    beq     loc_fc0dd154\n"
 451 "    bl      sub_fc102562\n"
 452 "    movs    r4, #1\n"
 453 "loc_fc0dd154:\n"
 454 "    lsls    r0, r4, #0x1f\n"
 455 "    bne     loc_fc0dd22c\n"
 456 "    ldr.w   r0, [r6, #0xec]\n"
 457 "    cbz     r0, loc_fc0dd178\n"
 458 "    ldrh.w  r0, [r6, #0x1a2]\n"
 459 "    cmp     r0, #3\n"
 460 "    beq     loc_fc0dd16c\n"
 461 "    ldr     r0, [r5, #8]\n"
 462 "    cmp     r0, #1\n"
 463 "    bhi     loc_fc0dd1be\n"
 464 "loc_fc0dd16c:\n"
 465 "    ldr.w   r0, [r6, #0x10c]\n"
 466 "    cbz     r0, loc_fc0dd178\n"
 467 "    ldr     r0, [r5, #0xc]\n"
 468 "    cmp     r0, #1\n"
 469 "    bhi     loc_fc0dd1be\n"
 470 "loc_fc0dd178:\n"
 471 "    bl      sub_fc1105c8\n"
 472 "    cbnz    r0, loc_fc0dd1be\n"
 473 "    movs    r2, #2\n"
 474 "    mov     r1, sp\n"
 475 "    movw    r0, #0x112\n"
 476 "    bl      sub_fc38822a\n" // GetPropertyCase
 477 "    lsls    r0, r0, #0x1f\n"
 478 "    beq     loc_fc0dd198\n"
 479 "    movs    r2, #0xcb\n"
 480 "    movs    r0, #0\n"
 481 "    ldr     r1, =0xfc0dd2bc\n" //  *"SsCaptureCtrl.c"
 482 "    blx     sub_fc314dec\n" // j_DebugAssert
 483 "loc_fc0dd198:\n"
 484 "    ldrsh.w r0, [sp]\n"
 485 "    bl      sub_fc1271a6\n"
 486 "    bl      sub_fc127068\n"
 487 "    cmp     r0, #1\n"
 488 "    bls     loc_fc0dd1b0\n"
 489 "    movs    r0, #0\n"
 490 "    bl      sub_fc127130\n"
 491 "    b       loc_fc0dd1be\n"
 492 "loc_fc0dd1b0:\n"
 493 "    bl      sub_fc102562\n"
 494 "    bl      sub_fc33e108\n"
 495 "    movs    r4, #1\n"
 496 "    lsls    r0, r4, #0x1f\n"
 497 "    bne     loc_fc0dd22c\n"
 498 "loc_fc0dd1be:\n"
 499 "    mov     r0, r5\n"
 500 "    bl      sub_fc10fd82\n"
 501 "    mov     r4, r0\n"
 502 "    lsls    r0, r0, #0x1f\n"
 503 "    bne     loc_fc0dd22c\n"
 504 "    bl      sub_fc18bc92\n"
 505 "    mvn     r1, #0x1000\n"
 506 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
 507 "    bl      sub_fc2494d4\n"
 508 "    bl      sub_fc2a6a1e\n"
 509 "    mov     r0, r5\n"
 510 "    bl      sub_fc116cec\n"
 511 "    mov     r4, r0\n"
 512 "    lsls    r0, r0, #0x1f\n"
 513 "    bne     loc_fc0dd22c\n"
 514 "    bl      sub_fc0d4f14\n"
 515 "    mov     r0, r5\n"
 516 "    bl      sub_fc18b978\n"
 517 "    movs    r0, #2\n"
 518 "    bl      sub_fc0d7a2e\n"
 519 "    ldr.w   r0, [r6, #0xb0]\n"
 520 "    cbz     r0, loc_fc0dd208\n"
 521 "    mov     r0, r5\n"
 522 "    bl      sub_fc1175a8\n"
 523 "    b       loc_fc0dd23e\n"
 524 "loc_fc0dd208:\n"
 525 "    ldr.w   r0, [r6, #0xb4]\n"
 526 "    cbz     r0, loc_fc0dd216\n"
 527 "    mov     r0, r5\n"
 528 "    bl      sub_fc11721e\n"
 529 "    b       loc_fc0dd23e\n"
 530 "loc_fc0dd216:\n"
 531 "    ldr.w   r0, [r6, #0xb8]\n"
 532 "    cmp     r0, #0\n"
 533 "    mov     r0, r5\n"
 534 "    beq     loc_fc0dd226\n"
 535 "    bl      sub_fc1178a4\n"
 536 "    b       loc_fc0dd23e\n"
 537 "loc_fc0dd226:\n"
 538 "    bl      sub_fc116fa2_my\n" // ->
 539 "    b       loc_fc0dd23e\n"
 540 "loc_fc0dd22c:\n"
 541 "    movs    r1, #2\n"
 542 "    mov     r2, r5\n"
 543 "    mov     r0, r4\n"
 544 "    bl      sub_fc1026fa\n"
 545 "    mov     r1, r4\n"
 546 "    mov     r0, r5\n"
 547 "    bl      sub_fc18c126\n"
 548 "loc_fc0dd23e:\n"
 549 "    bl      sub_fc0d5c44\n"
 550 "    movs    r0, #0\n"
 551 "    str     r0, [r6, #0x28]\n"
 552 "    pop     {r3, r4, r5, r6, r7, pc}\n"
 553 ".ltorg\n"
 554     );
 555 }
 556 
 557 
 558 void __attribute__((naked,noinline)) sub_fc116fa2_my() {
 559     asm volatile (
 560 // PRIMARY.BIN size:0x2000000 start:0xfc116fa3 instructions:207 opts:0xef
 561 "    push.w  {r1, r2, r3, r4, r5, r6, r7, r8, sb, lr}\n"
 562 "    ldr     r6, =0xfc116f7d\n"
 563 "    mov     r5, r0\n"
 564 "    bl      sub_fc18b90e\n"
 565 "    bl      sub_fc0dd712\n"
 566 "    ldr     r7, =0x0005dd60\n"
 567 "    ldr.w   r0, [r7, #0xa4]\n"
 568 "    cbnz    r0, loc_fc116fd0\n"
 569 "    ldrh.w  r0, [r7, #0x1a2]\n"
 570 "    cmp     r0, #3\n"
 571 "    beq     loc_fc116fc8\n"
 572 "    ldr     r0, [r5, #8]\n"
 573 "    cmp     r0, #1\n"
 574 "    bhi     loc_fc116fd0\n"
 575 "loc_fc116fc8:\n"
 576 "    bl      sub_fc0d5298\n"
 577 "    bl      sub_fc0dd2de\n"
 578 "loc_fc116fd0:\n"
 579 "    movs    r2, #4\n"
 580 "    movw    r0, #0x139\n"
 581 "    add     r1, sp, #8\n"
 582 "    bl      sub_fc38822a\n" // GetPropertyCase
 583 "    lsls    r0, r0, #0x1f\n"
 584 "    beq     loc_fc116fec\n"
 585 "    movs    r0, #0\n"
 586 "    movw    r2, #0x150\n"
 587 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 588 "    blx     sub_fc314dec\n" // j_DebugAssert
 589 "loc_fc116fec:\n"
 590 #ifdef CAPTSEQ_DEBUG
 591 // Ant's remote hook location
 592 "bl log_remote_hook\n"
 593 #endif
 594 "    ldr     r0, [sp, #8]\n"
 595 "    ubfx    r0, r0, #8, #8\n"
 596 "    cmp     r0, #6\n"
 597 "    bne     loc_fc116ffc\n"
 598 "    ldr     r0, =0xfc116f7d\n"
 599 "    movs    r1, #0\n"
 600 "    b       loc_fc117000\n"
 601 "loc_fc116ffc:\n"
 602 "    ldr     r0, =0xfc18b687\n"
 603 "    mov     r1, r5\n"
 604 "loc_fc117000:\n"
 605 "    bl      sub_fc144f10\n"
 606 "    movs    r2, #2\n"
 607 "    movw    r0, #0x114\n"
 608 "    add     r1, sp, #4\n"
 609 "    bl      sub_fc38822a\n" // GetPropertyCase
 610 "    lsls    r0, r0, #0x1f\n"
 611 "    beq     loc_fc117020\n"
 612 "    movs    r0, #0\n"
 613 "    movw    r2, #0x159\n"
 614 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 615 "    blx     sub_fc314dec\n" // j_DebugAssert
 616 "loc_fc117020:\n"
 617 "    ldr.w   r0, [r7, #0x18c]\n"
 618 "    cbz     r0, loc_fc11702a\n"
 619 "    bl      sub_fc18b7e2\n"
 620 "loc_fc11702a:\n"
 621 "    movs    r0, #0\n"
 622 "    bl      sub_fc0bd154\n"
 623 "    bl      sub_fc110676\n"
 624 "    ldr.w   r8, =0xfc116f7d\n"
 625 "    mov     r4, r0\n"
 626 "    lsls    r0, r0, #0x1f\n"
 627 "    bne     loc_fc11713c\n"
 628 
 629 #ifdef CAPTSEQ_DEBUG
 630 "bl log_remote_hook2\n"
 631 #endif
 632 "    BL      wait_until_remote_button_is_released\n" // + remote hook
 633 "    BL      capt_seq_hook_set_nr\n" // +
 634 
 635 "    mov     r0, r5\n"
 636 "    bl      sub_fc18ba76\n" // NR evaluation and more
 637 "    mov     r0, r5\n"
 638 "    bl      sub_fc110580\n"
 639 "    ldr     r1, =0x0002f888\n"
 640 "    movs    r2, #4\n"
 641 "    movs    r0, #0x92\n"
 642 "    bl      sub_fc38822a\n" // GetPropertyCase
 643 "    lsls    r0, r0, #0x1f\n"
 644 "    beq     loc_fc117064\n"
 645 "    movs    r0, #0\n"
 646 "    movw    r2, #0x16e\n"
 647 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 648 "    blx     sub_fc314dec\n" // j_DebugAssert
 649 "loc_fc117064:\n"
 650 "    bl      sub_fc0bd288\n"
 651 "    bl      sub_fc18bb08\n"
 652 "    movs    r1, #0\n"
 653 "    mov     r0, r5\n"
 654 "    bl      sub_fc116f7e\n"
 655 "    mov     r6, r0\n"
 656 "    ldr     r0, [sp, #8]\n"
 657 "    ubfx    r0, r0, #8, #8\n"
 658 "    cmp     r0, #6\n"
 659 "    bne     loc_fc117084\n"
 660 "    ldr     r2, =0xfc18b7ad\n"
 661 "    b       loc_fc117086\n"
 662 "loc_fc117084:\n"
 663 "    ldr     r2, =0xfc18b7c3\n"
 664 "loc_fc117086:\n"
 665 "    ldrh    r0, [r5, #0x18]\n"
 666 "    ldr     r4, =0x0002f888\n"
 667 "    cbz     r0, loc_fc117094\n"
 668 "    cmp     r0, #1\n"
 669 "    beq     loc_fc1170aa\n"
 670 "    cmp     r0, #4\n"
 671 "    bne     loc_fc1170fa\n"
 672 "loc_fc117094:\n"
 673 "    str     r6, [sp]\n"
 674 "    mov     r3, r2\n"
 675 "    ldr     r1, [r5, #0x38]\n"
 676 "    mov     r0, r5\n"
 677 "    ldr     r2, [r4]\n"
 678 "    bl      sub_fc18b4b2\n"
 679 "    mov     r4, r0\n"
 680 "    bl      sub_fc2cd132\n"
 681 "    b       loc_fc117108\n"
 682 "loc_fc1170aa:\n"
 683 "    str     r6, [sp]\n"
 684 "    mov     r3, r2\n"
 685 "    ldr     r1, [r5, #0x38]\n"
 686 "    mov     sb, r4\n"
 687 "    ldr     r2, [r4]\n"
 688 "    mov     r0, r5\n"
 689 "    bl      sub_fc18b51c\n"
 690 "    movs    r2, #1\n"
 691 "    mov     r4, r0\n"
 692 "    movs    r1, #0\n"
 693 "    movs    r0, #0x45\n"
 694 "    bl      sub_fc2a6bb8\n"
 695 "    lsls    r0, r4, #0x1f\n"
 696 "    bne     loc_fc117108\n"
 697 "    ldr     r0, =0xfc116f7d\n"
 698 "    movs    r1, #0\n"
 699 "    bl      sub_fc144f10\n"
 700 "    movs    r1, #1\n"
 701 "    mov     r0, r5\n"
 702 "    bl      sub_fc116f7e\n"
 703 "    mov     r6, r0\n"
 704 "    ldr.w   r0, [sb]\n"
 705 "    mov     r4, sb\n"
 706 "    bl      sub_fc18b8b0\n"
 707 "    ldr     r1, [r5, #0x38]\n"
 708 "    mov     r3, r6\n"
 709 "    ldr     r2, [r4]\n"
 710 "    mov     r0, r5\n"
 711 "    bl      sub_fc18b594\n"
 712 "    mov     r4, r0\n"
 713 "    bl      sub_fc18b45a\n"
 714 "    b       loc_fc117108\n"
 715 "loc_fc1170fa:\n"
 716 "    movs    r0, #0\n"
 717 "    movw    r2, #0x1a7\n"
 718 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 719 "    blx     sub_fc314dec\n" // j_DebugAssert
 720 "    movs    r4, #0x1d\n"
 721 "loc_fc117108:\n"
 722 "    bl      sub_fc18bb0c\n"
 723 "    lsls    r0, r4, #0x1f\n"
 724 "    bne     loc_fc117172\n"
 725 "    mov     r0, r5\n"
 726 "    bl      sub_fc18bb22\n"
 727 "    ldr.w   r0, [r7, #0x108]\n"
 728 "    cbnz    r0, loc_fc11713a\n"
 729 "    mov     r0, r5\n"
 730 "    bl      sub_fc1105c2\n"
 731 "    cbnz    r0, loc_fc11713a\n"
 732 "    mov     r0, r5\n"
 733 "    bl      sub_fc18c262\n"
 734 "    lsls    r0, r0, #0x1f\n"
 735 "    beq     loc_fc11713a\n"
 736 "    movs    r0, #0\n"
 737 "    movw    r2, #0x1c8\n"
 738 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 739 "    blx     sub_fc314dec\n" // j_DebugAssert
 740 "loc_fc11713a:\n"
 741 "    b       loc_fc11713e\n"
 742 "loc_fc11713c:\n"
 743 "    b       loc_fc117172\n"
 744 "loc_fc11713e:\n"
 745 #ifdef CAPTSEQ_DEBUG
 746 "bl log_rh\n"
 747 #endif
 748 "    bl      capt_seq_hook_raw_here\n" //----------------------------------- ???? ----------
 749 "    mov     r0, r5\n"
 750 "    bl      sub_fc18baf8\n"
 751 "    mov     r0, r5\n"
 752 "    bl      sub_fc18bacc\n"
 753 "    cmp     r6, r8\n"
 754 "    beq     loc_fc117172\n"
 755 "    bl      sub_fc18bc92\n"
 756 "    movs    r1, #4\n"
 757 "    movw    sb, #0x1d5\n"
 758 "    ldr     r3, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 759 "    movw    r2, #0x3a98\n"
 760 "    str.w   sb, [sp]\n"
 761 "    bl      sub_fc33e280\n"
 762 "    cbz     r0, loc_fc117172\n"
 763 "    movs    r0, #0\n"
 764 "    mov     r2, sb\n"
 765 "    ldr     r1, =0xfc1171c8\n" //  *"SsStandardCaptureSeq.c"
 766 "    blx     sub_fc314dec\n" // j_DebugAssert
 767 "loc_fc117172:\n"
 768 "    ldr.w   r0, [r7, #0x18c]\n"
 769 "    cbz     r0, loc_fc117182\n"
 770 "    movs    r2, #1\n"
 771 "    movs    r1, #0\n"
 772 "    movs    r0, #0x46\n"
 773 "    bl      sub_fc2a6bb8\n"
 774 "loc_fc117182:\n"
 775 "    movs    r1, #2\n"
 776 "    mov     r2, r5\n"
 777 "    mov     r0, r4\n"
 778 "    bl      sub_fc1026fa\n"
 779 "    ldr     r0, [r7, #0x28]\n"
 780 "    cmp     r0, #0\n"
 781 "    mov     r0, r8\n"
 782 "    beq     loc_fc1171a8\n"
 783 "    cmp     r6, r0\n"
 784 "    beq     loc_fc11719c\n"
 785 "    movs    r1, #1\n"
 786 "    b       loc_fc11719e\n"
 787 "loc_fc11719c:\n"
 788 "    movs    r1, #0\n"
 789 "loc_fc11719e:\n"
 790 "    mov     r2, r4\n"
 791 "    mov     r0, r5\n"
 792 "    bl      sub_fc18bfae\n"
 793 "    b       loc_fc1171ba\n"
 794 "loc_fc1171a8:\n"
 795 "    cmp     r6, r0\n"
 796 "    beq     loc_fc1171b0\n"
 797 "    movs    r1, #1\n"
 798 "    b       loc_fc1171b2\n"
 799 "loc_fc1171b0:\n"
 800 "    movs    r1, #0\n"
 801 "loc_fc1171b2:\n"
 802 "    mov     r2, r4\n"
 803 "    mov     r0, r5\n"
 804 "    bl      sub_fc18bf68\n"
 805 "loc_fc1171ba:\n"
 806 "    mov     r0, r4\n"
 807 "    pop.w   {r1, r2, r3, r4, r5, r6, r7, r8, sb, pc}\n"
 808 ".ltorg\n"
 809     );
 810 }
 811 
 812 
 813 void __attribute__((naked,noinline)) exp_drv_task() {
 814     asm volatile ( // capdis -stubs -s=task_ExpDrv -c=467 -f=chdk PRIMARY.BIN 0xfc000000
 815 // task_ExpDrv 0xfc27baa1
 816 "    push.w  {r4, r5, r6, r7, r8, sb, sl, fp, lr}\n"
 817 "    sub     sp, #0x2c\n"
 818 "    ldr.w   sb, =0x0000cc60\n"
 819 "    ldr.w   fp, =0xfffff400\n"
 820 "    movs    r0, #0\n"
 821 "    ldr     r6, =0x0006a77c\n"
 822 "    add.w   r8, sp, #0x1c\n"
 823 "    movw    sl, #0xbb8\n"
 824 "    str     r0, [sp, #0xc]\n"
 825 "loc_fc27babc:\n"
 826 "    ldr.w   r0, [sb, #0x24]\n"
 827 "    movs    r2, #0\n"
 828 "    add     r1, sp, #0x28\n"
 829 "    mov     r4, sb\n"
 830 "    blx     sub_fc314c7c\n" // j_ReceiveMessageQueue
 831 "    ldr     r0, [sp, #0xc]\n"
 832 "    cmp     r0, #1\n"
 833 "    bne     loc_fc27baf8\n"
 834 "    ldr     r0, [sp, #0x28]\n"
 835 "    ldr     r0, [r0]\n"
 836 "    cmp     r0, #0x15\n"
 837 "loc_fc27bad6:\n"
 838 "    beq     loc_fc27bbb4\n"
 839 "    cmp     r0, #0x16\n"
 840 "    beq     loc_fc27bad6\n"
 841 "    cmp     r0, #0x17\n"
 842 "    beq     loc_fc27bad6\n"
 843 "    cmp     r0, #0x18\n"
 844 "    beq     loc_fc27bad6\n"
 845 "    cmp     r0, #0x19\n"
 846 "    beq     loc_fc27bad6\n"
 847 "    cmp     r0, #0x1a\n"
 848 "    beq     loc_fc27bad6\n"
 849 "    cmp     r0, #0x35\n"
 850 "    beq     loc_fc27bbba\n"
 851 "    movs    r0, #0\n"
 852 "    add     r1, sp, #0xc\n"
 853 "    bl      sub_fc27b7de\n"
 854 "loc_fc27baf8:\n"
 855 "    ldr     r0, [sp, #0x28]\n"
 856 "    ldr     r1, [r0]\n"
 857 "    cmp     r1, #0x3d\n"
 858 "    bne     loc_fc27bb16\n"
 859 "    bl      sub_fc27cc22\n"
 860 "    ldr.w   r0, [sb, #0x20]\n"
 861 "    movs    r1, #1\n"
 862 "    blx     sub_fc314c94\n" // j_SetEventFlag
 863 "    blx     sub_fc314ca4\n" // -> ExitTask
 864 "    add     sp, #0x2c\n"
 865 //"    b       loc_fc27b530\n"                              // -
 866 "    ldmia.w sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}\n"   // +
 867 "loc_fc27bb16:\n"
 868 "    cmp     r1, #0x3c\n"
 869 "    bne     loc_fc27bb28\n"
 870 "loc_fc27bb1a:\n"
 871 "    add.w   r0, r0, #0xac\n"
 872 "    ldrd    r2, r1, [r0]\n"
 873 "    mov     r0, r1\n"
 874 "    blx     r2\n"
 875 "    b       loc_fc27bfa2\n"
 876 "loc_fc27bb28:\n"
 877 "    cmp     r1, #0x33\n"
 878 "    bne     loc_fc27bb5e\n"
 879 "    ldr     r0, [r4, #0x20]\n"
 880 "    movs    r1, #0x80\n"
 881 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
 882 "    ldr     r0, =0xfc27797b\n"
 883 "    movs    r1, #0x80\n"
 884 "    bl      sub_fc339692\n"
 885 "    ldr     r0, [r4, #0x20]\n"
 886 "    movs    r1, #0x80\n"
 887 "    mov     r2, sl\n"
 888 "    blx     sub_fc314bec\n" // j_WaitForAllEventFlag
 889 "    lsls    r0, r0, #0x1f\n"
 890 "    beq     loc_fc27bb50\n"
 891 "    movw    r2, #0x173c\n"
 892 "    b       loc_fc27bc20\n"
 893 "loc_fc27bb50:\n"
 894 "    ldr     r1, [sp, #0x28]\n"
 895 "    add.w   r1, r1, #0xac\n"
 896 "    ldrd    r1, r0, [r1]\n"
 897 "    blx     r1\n"
 898 "    b       loc_fc27bfa2\n"
 899 "loc_fc27bb5e:\n"
 900 "    cmp     r1, #0x34\n"
 901 "    bne     loc_fc27bbb6\n"
 902 "    add     r1, sp, #0xc\n"
 903 "    bl      sub_fc27b7de\n"
 904 "    movw    r5, #0x100\n"
 905 "    ldr     r0, [r4, #0x20]\n"
 906 "    mov     r1, r5\n"
 907 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
 908 "    ldr     r0, =0xfc277985\n"
 909 "    mov     r1, r5\n"
 910 "    bl      sub_fc33983e\n"
 911 "    ldr     r0, [r4, #0x20]\n"
 912 "    mov     r2, sl\n"
 913 "    mov     r1, r5\n"
 914 "    blx     sub_fc314bec\n" // j_WaitForAllEventFlag
 915 "    lsls    r0, r0, #0x1f\n"
 916 "    beq     loc_fc27bb50\n"
 917 "    movw    r2, #0x1746\n"
 918 "    b       loc_fc27bc20\n"
 919 // literal pool removed
 920 "loc_fc27bbb4:\n"               // + reconstructed
 921 "    b       loc_fc27bc2a\n"    // + reconstructed
 922 "loc_fc27bbb6:\n"
 923 "    cmp     r1, #0x35\n"
 924 "    bne     loc_fc27bbc4\n"
 925 "loc_fc27bbba:\n"
 926 "    ldr     r0, [sp, #0x28]\n"
 927 "    add     r1, sp, #0xc\n"
 928 "    bl      sub_fc27b7de\n"
 929 "    b       loc_fc27bb50\n"
 930 "loc_fc27bbc4:\n"
 931 "    cmp     r1, #0x36\n"
 932 "    bne     loc_fc27bbde\n"
 933 "    bl      sub_fc27b822\n"
 934 "    ldr     r1, [sp, #0x28]\n"
 935 "    add.w   r1, r1, #0xac\n"
 936 "    ldrd    r1, r0, [r1]\n"
 937 "    blx     r1\n"
 938 "    bl      sub_fc20f62e\n"
 939 "    b       loc_fc27bfa2\n"
 940 "loc_fc27bbde:\n"
 941 "    cmp     r1, #0x37\n"
 942 "    beq     loc_fc27bb1a\n"
 943 "    cmp     r1, #0x3a\n"
 944 "    bne     loc_fc27bbf4\n"
 945 "    bl      sub_fc142f1c\n"
 946 "    bl      sub_fc20f938\n"
 947 "    bl      sub_fc20f62e\n"
 948 "    b       loc_fc27bb50\n"
 949 "loc_fc27bbf4:\n"
 950 "    cmp     r1, #0x3b\n"
 951 "    bne     loc_fc27bc2a\n"
 952 "    ldr     r0, [r4, #0x20]\n"
 953 "    movs    r1, #4\n"
 954 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
 955 "    ldr     r1, =0xfc277999\n"
 956 "    movs    r2, #4\n"
 957 "    mov     r0, fp\n"
 958 "    bl      sub_fc27cc74\n"
 959 "    bl      sub_fc142c80\n"
 960 "    ldr     r0, [r4, #0x20]\n"
 961 "    movs    r1, #4\n"
 962 "    mov     r2, sl\n"
 963 "    blx     sub_fc314de4\n" // j_WaitForAnyEventFlag
 964 "    lsls    r0, r0, #0x1f\n"
 965 "    beq     loc_fc27bb50\n"
 966 "    movw    r2, #0x1829\n"
 967 "loc_fc27bc20:\n"
 968 "    ldr     r1, =0xfc277d60\n" //  **"ExpDrv.c"
 969 "    movs    r0, #0\n"
 970 "    blx     sub_fc314dec\n" // j_DebugAssert
 971 "    b       loc_fc27bb50\n"
 972 "loc_fc27bc2a:\n"
 973 "    ldr     r0, [sp, #0x28]\n"
 974 "    movs    r5, #1\n"
 975 "    ldr     r1, [r0]\n"
 976 "    cmp     r1, #0x13\n"
 977 "    beq     loc_fc27bc38\n"
 978 "    cmp     r1, #0x14\n"
 979 "    bne     loc_fc27bc76\n"
 980 "loc_fc27bc38:\n"
 981 "    ldr.w   r1, [r0, #0x94]\n"
 982 "    mov     r4, r8\n"
 983 "    add.w   r1, r1, r1, lsl #1\n"
 984 "    add.w   r1, r0, r1, lsl #2\n"
 985 "    subs    r1, #8\n"
 986 "    ldm     r1!, {r2, r3, r7}\n"
 987 "    stm     r4!, {r2, r3, r7}\n"
 988 "    bl      sub_fc27a140\n"
 989 "    ldr     r0, [sp, #0x28]\n"
 990 "    add.w   r0, r0, #0x94\n"
 991 "    ldrd    r3, r2, [r0, #0x18]\n"
 992 "    ldr     r1, [r0]\n"
 993 "    sub.w   r0, r0, #0x90\n"
 994 "    blx     r3\n"
 995 "    ldr     r0, [sp, #0x28]\n"
 996 "    bl      sub_fc27ce9a\n"
 997 "    ldr     r0, [sp, #0x28]\n"
 998 "    add.w   r0, r0, #0x94\n"
 999 "    ldr     r1, [r0]\n"
1000 "    ldrd    r3, r2, [r0, #0x20]\n"
1001 "    b       loc_fc27bec4\n"
1002 "loc_fc27bc76:\n"
1003 "    cmp     r1, #0x15\n"
1004 "    beq     loc_fc27bc8e\n"
1005 "    cmp     r1, #0x16\n"
1006 "    beq     loc_fc27bc8e\n"
1007 "    cmp     r1, #0x17\n"
1008 "    beq     loc_fc27bc8e\n"
1009 "    cmp     r1, #0x18\n"
1010 "    beq     loc_fc27bc8e\n"
1011 "    cmp     r1, #0x19\n"
1012 "    beq     loc_fc27bc8e\n"
1013 "    cmp     r1, #0x1a\n"
1014 "    bne     loc_fc27bcfa\n"
1015 "loc_fc27bc8e:\n"
1016 "    bl      sub_fc142f1c\n"
1017 "    ldr     r0, [sp, #0x28]\n"
1018 "    add     r3, sp, #0xc\n"
1019 "    add     r1, sp, #0x1c\n"
1020 "    mov     r2, sp\n"
1021 "    bl      sub_fc27a31e\n"
1022 "    cmp     r0, #1\n"
1023 "    mov     r4, r0\n"
1024 "    beq     loc_fc27bca8\n"
1025 "    cmp     r4, #5\n"
1026 "    bne     loc_fc27bcc8\n"
1027 "loc_fc27bca8:\n"
1028 "    ldr     r0, [sp, #0x28]\n"
1029 "    mov     r2, r4\n"
1030 "    add.w   r0, r0, #0x94\n"
1031 "    ldrd    r7, r3, [r0, #0x18]\n"
1032 "    ldr     r1, [r0]\n"
1033 "    sub.w   r0, r0, #0x90\n"
1034 "    blx     r7\n"
1035 "    ldr     r2, [sp, #0xc]\n"
1036 "    mov     r1, r4\n"
1037 "    ldr     r0, [sp, #0x28]\n"
1038 "    bl      sub_fc27b79c\n"
1039 "loc_fc27bcc6:\n"
1040 "    b       loc_fc27beca\n"
1041 "loc_fc27bcc8:\n"
1042 "    cmp     r4, #2\n"
1043 "    beq     loc_fc27bcd0\n"
1044 "    cmp     r4, #6\n"
1045 "    bne     loc_fc27bce4\n"
1046 "loc_fc27bcd0:\n"
1047 "    ldr     r0, [sp, #0x28]\n"
1048 "    add     r1, sp, #0x1c\n"
1049 "    mov     r2, sp\n"
1050 "    bl      sub_fc27b534\n"
1051 "    ldr     r2, [sp, #0xc]\n"
1052 "    mov     r1, r4\n"
1053 "    ldr     r0, [sp, #0x28]\n"
1054 "    bl      sub_fc27b79c\n"
1055 "loc_fc27bce4:\n"
1056 "    ldr     r0, [sp, #0x28]\n"
1057 "    mov     r2, r4\n"
1058 "    add.w   r0, r0, #0x94\n"
1059 "    ldrd    r7, r3, [r0, #0x18]\n"
1060 "    ldr     r1, [r0]\n"
1061 "    sub.w   r0, r0, #0x90\n"
1062 "    blx     r7\n"
1063 "    b       loc_fc27beca\n"
1064 "loc_fc27bcfa:\n"
1065 "    cmp     r1, #0x2d\n"
1066 "    beq     loc_fc27bd02\n"
1067 "    cmp     r1, #0x2e\n"
1068 "    bne     loc_fc27bd70\n"
1069 "loc_fc27bd02:\n"
1070 "    ldr.w   r1, [r0, #0x94]\n"
1071 "    mov     r7, r8\n"
1072 "    add.w   r1, r1, r1, lsl #1\n"
1073 "    add.w   r1, r0, r1, lsl #2\n"
1074 "    subs    r1, #8\n"
1075 "    ldm     r1, {r1, r2, r3}\n"
1076 "    stm     r7!, {r1, r2, r3}\n"
1077 "    bl      sub_fc27943c\n"
1078 "    ldr     r0, [sp, #0x28]\n"
1079 "    add.w   r0, r0, #0x94\n"
1080 "    ldrd    r3, r2, [r0, #0x18]\n"
1081 "    ldr     r1, [r0]\n"
1082 "    sub.w   r0, r0, #0x90\n"
1083 "    blx     r3\n"
1084 "    bl      sub_fc142f1c\n"
1085 "    bl      sub_fc20f938\n"
1086 "    bl      sub_fc20f62e\n"
1087 "    ldr     r0, [r4, #0x20]\n"
1088 "    movs    r1, #2\n"
1089 "    mov     r7, sl\n"
1090 "    mov     r2, sl\n"
1091 "    blx     sub_fc314bec\n" // j_WaitForAllEventFlag
1092 "    lsls    r0, r0, #0x1f\n"
1093 "    beq     loc_fc27bd54\n"
1094 "    ldr     r1, =0xfc277d60\n" //  **"ExpDrv.c"
1095 "    movs    r0, #0\n"
1096 "    movw    r2, #0xcae\n"
1097 "    blx     sub_fc314dec\n" // j_DebugAssert
1098 "loc_fc27bd54:\n"
1099 "    ldr     r0, [r4, #0x20]\n"
1100 "    movs    r1, #0x20\n"
1101 "    mov     r2, r7\n"
1102 "    blx     sub_fc314bec\n" // j_WaitForAllEventFlag
1103 "    lsls    r0, r0, #0x1f\n"
1104 "    beq     loc_fc27bcc6\n"
1105 "    ldr     r1, =0xfc277d60\n" //  **"ExpDrv.c"
1106 "    movs    r0, #0\n"
1107 "    movw    r2, #0xcb1\n"
1108 "    blx     sub_fc314dec\n" // j_DebugAssert
1109 "    b       loc_fc27beca\n"
1110 "loc_fc27bd70:\n"
1111 "    adds    r1, r0, #4\n"
1112 "    mov     r4, r8\n"
1113 "    ldm     r1!, {r2, r3, r7}\n"
1114 "    stm     r4!, {r2, r3, r7}\n"
1115 "    ldr     r1, [r0]\n"
1116 "    cmp     r1, #0x33\n"
1117 "    bhs     loc_fc27bdba\n"
1118 "    tbb     [pc, r1]\n" // (jumptable r1 51 elements)
1119 "branchtable_fc27bd82:\n"
1120 "    .byte((loc_fc27bdb6 - branchtable_fc27bd82) / 2)\n" // (case 0)
1121 "    .byte((loc_fc27bdb6 - branchtable_fc27bd82) / 2)\n" // (case 1)
1122 "    .byte((loc_fc27bdbc - branchtable_fc27bd82) / 2)\n" // (case 2)
1123 "    .byte((loc_fc27bdc2 - branchtable_fc27bd82) / 2)\n" // (case 3)
1124 "    .byte((loc_fc27bdc2 - branchtable_fc27bd82) / 2)\n" // (case 4)
1125 "    .byte((loc_fc27bdc2 - branchtable_fc27bd82) / 2)\n" // (case 5)
1126 "    .byte((loc_fc27bdb6 - branchtable_fc27bd82) / 2)\n" // (case 6)
1127 "    .byte((loc_fc27bdbc - branchtable_fc27bd82) / 2)\n" // (case 7)
1128 "    .byte((loc_fc27bdc2 - branchtable_fc27bd82) / 2)\n" // (case 8)
1129 "    .byte((loc_fc27bdc2 - branchtable_fc27bd82) / 2)\n" // (case 9)
1130 "    .byte((loc_fc27bdd4 - branchtable_fc27bd82) / 2)\n" // (case 10)
1131 "    .byte((loc_fc27bdd4 - branchtable_fc27bd82) / 2)\n" // (case 11)
1132 "    .byte((loc_fc27bdd4 - branchtable_fc27bd82) / 2)\n" // (case 12)
1133 "    .byte((loc_fc27bea8 - branchtable_fc27bd82) / 2)\n" // (case 13)
1134 "    .byte((loc_fc27beae - branchtable_fc27bd82) / 2)\n" // (case 14)
1135 "    .byte((loc_fc27beae - branchtable_fc27bd82) / 2)\n" // (case 15)
1136 "    .byte((loc_fc27beae - branchtable_fc27bd82) / 2)\n" // (case 16)
1137 "    .byte((loc_fc27beae - branchtable_fc27bd82) / 2)\n" // (case 17)
1138 "    .byte((loc_fc27beb4 - branchtable_fc27bd82) / 2)\n" // (case 18)
1139 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 19)
1140 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 20)
1141 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 21)
1142 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 22)
1143 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 23)
1144 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 24)
1145 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 25)
1146 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 26)
1147 "    .byte((loc_fc27bdc8 - branchtable_fc27bd82) / 2)\n" // (case 27)
1148 "    .byte((loc_fc27bdce - branchtable_fc27bd82) / 2)\n" // (case 28)
1149 "    .byte((loc_fc27bdce - branchtable_fc27bd82) / 2)\n" // (case 29)
1150 "    .byte((loc_fc27bdce - branchtable_fc27bd82) / 2)\n" // (case 30)
1151 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 31)
1152 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 32)
1153 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 33)
1154 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 34)
1155 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 35)
1156 "    .byte((loc_fc27bddc - branchtable_fc27bd82) / 2)\n" // (case 36)
1157 "    .byte((loc_fc27bde2 - branchtable_fc27bd82) / 2)\n" // (case 37)
1158 "    .byte((loc_fc27be0c - branchtable_fc27bd82) / 2)\n" // (case 38)
1159 "    .byte((loc_fc27be36 - branchtable_fc27bd82) / 2)\n" // (case 39)
1160 "    .byte((loc_fc27be3a - branchtable_fc27bd82) / 2)\n" // (case 40)
1161 "    .byte((loc_fc27be42 - branchtable_fc27bd82) / 2)\n" // (case 41)
1162 "    .byte((loc_fc27be6c - branchtable_fc27bd82) / 2)\n" // (case 42)
1163 "    .byte((loc_fc27be96 - branchtable_fc27bd82) / 2)\n" // (case 43)
1164 "    .byte((loc_fc27be96 - branchtable_fc27bd82) / 2)\n" // (case 44)
1165 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 45)
1166 "    .byte((loc_fc27beb8 - branchtable_fc27bd82) / 2)\n" // (case 46)
1167 "    .byte((loc_fc27be9c - branchtable_fc27bd82) / 2)\n" // (case 47)
1168 "    .byte((loc_fc27be9c - branchtable_fc27bd82) / 2)\n" // (case 48)
1169 "    .byte((loc_fc27be9c - branchtable_fc27bd82) / 2)\n" // (case 49)
1170 "    .byte((loc_fc27bea2 - branchtable_fc27bd82) / 2)\n" // (case 50)
1171 ".align 1\n"
1172 "loc_fc27bdb6:\n"
1173 "    bl      sub_fc277ea4\n"
1174 "loc_fc27bdba:\n"
1175 "    b       loc_fc27beb8\n"
1176 "loc_fc27bdbc:\n"
1177 "    bl      sub_fc27811c\n"
1178 "    b       loc_fc27beb8\n"
1179 "loc_fc27bdc2:\n"
1180 "    bl      sub_fc278340\n"
1181 "    b       loc_fc27beb8\n"
1182 "loc_fc27bdc8:\n"
1183 "    bl      sub_fc2785f4\n"
1184 "    b       loc_fc27beb8\n"
1185 "loc_fc27bdce:\n"
1186 "    bl      sub_fc2787b0\n"
1187 "    b       loc_fc27beb8\n"
1188 "loc_fc27bdd4:\n"
1189 "    bl      sub_fc278b1c_my\n" // ->
1190 "    movs    r5, #0\n"
1191 "    b       loc_fc27beb8\n"
1192 "loc_fc27bddc:\n"
1193 "    bl      sub_fc278c20\n"
1194 "    b       loc_fc27beb8\n"
1195 "loc_fc27bde2:\n"
1196 "    ldrh    r1, [r0, #4]\n"
1197 "    strh.w  r1, [sp, #0x1c]\n"
1198 "    ldrh    r1, [r6, #2]\n"
1199 "    strh.w  r1, [sp, #0x1e]\n"
1200 "    ldrh    r1, [r6, #4]\n"
1201 "    strh.w  r1, [sp, #0x20]\n"
1202 "    ldrh    r1, [r6, #6]\n"
1203 "    strh.w  r1, [sp, #0x22]\n"
1204 "    ldrh    r1, [r0, #0xc]\n"
1205 "    strh.w  r1, [sp, #0x24]\n"
1206 "    ldrh    r1, [r6, #0xa]\n"
1207 "    strh.w  r1, [sp, #0x26]\n"
1208 "    bl      sub_fc279128\n"
1209 "    b       loc_fc27beb8\n"
1210 "loc_fc27be0c:\n"
1211 "    ldrh    r1, [r0, #4]\n"
1212 "    strh.w  r1, [sp, #0x1c]\n"
1213 "    ldrh    r1, [r6, #2]\n"
1214 "    strh.w  r1, [sp, #0x1e]\n"
1215 "    ldrh    r1, [r6, #4]\n"
1216 "    strh.w  r1, [sp, #0x20]\n"
1217 "    ldrh    r1, [r6, #6]\n"
1218 "    strh.w  r1, [sp, #0x22]\n"
1219 "    ldrh    r1, [r6, #8]\n"
1220 "    strh.w  r1, [sp, #0x24]\n"
1221 "    ldrh    r1, [r6, #0xa]\n"
1222 "    strh.w  r1, [sp, #0x26]\n"
1223 "    bl      sub_fc27ccec\n"
1224 "    b       loc_fc27beb8\n"
1225 "loc_fc27be36:\n"
1226 "    movs    r1, #1\n"
1227 "    b       loc_fc27be3c\n"
1228 "loc_fc27be3a:\n"
1229 "    movs    r1, #0\n"
1230 "loc_fc27be3c:\n"
1231 "    bl      sub_fc2791ea\n"
1232 "    b       loc_fc27beb8\n"
1233 "loc_fc27be42:\n"
1234 "    ldrh    r1, [r6]\n"
1235 "    strh.w  r1, [sp, #0x1c]\n"
1236 "    ldrh    r1, [r0, #6]\n"
1237 "    strh.w  r1, [sp, #0x1e]\n"
1238 "    ldrh    r1, [r6, #4]\n"
1239 "    strh.w  r1, [sp, #0x20]\n"
1240 "    ldrh    r1, [r6, #6]\n"
1241 "    strh.w  r1, [sp, #0x22]\n"
1242 "    ldrh    r1, [r6, #8]\n"
1243 "    strh.w  r1, [sp, #0x24]\n"
1244 "    ldrh    r1, [r6, #0xa]\n"
1245 "    strh.w  r1, [sp, #0x26]\n"
1246 "    bl      sub_fc27cdb8\n"
1247 "    b       loc_fc27beb8\n"
1248 "loc_fc27be6c:\n"
1249 "    ldrh    r1, [r6]\n"
1250 "    strh.w  r1, [sp, #0x1c]\n"
1251 "    ldrh    r1, [r6, #2]\n"
1252 "    strh.w  r1, [sp, #0x1e]\n"
1253 "    ldrh    r1, [r6, #4]\n"
1254 "    strh.w  r1, [sp, #0x20]\n"
1255 "    ldrh    r1, [r6, #6]\n"
1256 "    strh.w  r1, [sp, #0x22]\n"
1257 "    ldrh    r1, [r0, #0xc]\n"
1258 "    strh.w  r1, [sp, #0x24]\n"
1259 "    ldrh    r1, [r6, #0xa]\n"
1260 "    strh.w  r1, [sp, #0x26]\n"
1261 "    bl      sub_fc27ce2c\n"
1262 "    b       loc_fc27beb8\n"
1263 "loc_fc27be96:\n"
1264 "    bl      sub_fc27922e\n"
1265 "    b       loc_fc27beb8\n"
1266 "loc_fc27be9c:\n"
1267 "    bl      sub_fc2797ec\n"
1268 "    b       loc_fc27beb8\n"
1269 "loc_fc27bea2:\n"
1270 "    bl      sub_fc279ae0\n"
1271 "    b       loc_fc27beb8\n"
1272 "loc_fc27bea8:\n"
1273 "    bl      sub_fc279cfa\n"
1274 "    b       loc_fc27beb8\n"
1275 "loc_fc27beae:\n"
1276 "    bl      sub_fc279e58\n"
1277 "    b       loc_fc27beb8\n"
1278 "loc_fc27beb4:\n"
1279 "    bl      sub_fc279fa2\n"
1280 "loc_fc27beb8:\n"
1281 "    ldr     r0, [sp, #0x28]\n"
1282 "    add.w   r0, r0, #0x94\n"
1283 "    ldrd    r3, r2, [r0, #0x18]\n"
1284 "    ldr     r1, [r0]\n"
1285 "loc_fc27bec4:\n"
1286 "    sub.w   r0, r0, #0x90\n"
1287 "    blx     r3\n"
1288 "loc_fc27beca:\n"
1289 "    ldr     r0, [sp, #0x28]\n"
1290 "    ldr     r0, [r0]\n"
1291 "    cmp     r0, #0x11\n"
1292 "    beq     loc_fc27beee\n"
1293 "    bgt     loc_fc27bee2\n"
1294 "    cmp     r0, #1\n"
1295 "    beq     loc_fc27beee\n"
1296 "    cmp     r0, #4\n"
1297 "    beq     loc_fc27beee\n"
1298 "    cmp     r0, #0xf\n"
1299 "    bne     loc_fc27bf20\n"
1300 "    b       loc_fc27beee\n"
1301 "loc_fc27bee2:\n"
1302 "    cmp     r0, #0x14\n"
1303 "    beq     loc_fc27beee\n"
1304 "    cmp     r0, #0x1a\n"
1305 "    beq     loc_fc27beee\n"
1306 "    cmp     r0, #0x1d\n"
1307 "    bne     loc_fc27bf20\n"
1308 "loc_fc27beee:\n"
1309 "    ldrsh.w r0, [r6]\n"
1310 "    mov     r2, fp\n"
1311 "    cmp     r0, fp\n"
1312 "    beq     loc_fc27bf00\n"
1313 "    ldrsh.w r1, [r6, #8]\n"
1314 "    cmp     r1, r2\n"
1315 "    bne     loc_fc27bf18\n"
1316 "loc_fc27bf00:\n"
1317 "    add     r0, sp, #0x10\n"
1318 "    bl      sub_fc362df2\n"
1319 "    ldrh.w  r0, [sp, #0x10]\n"
1320 "    strh.w  r0, [sp, #0x1c]\n"
1321 "    ldrh.w  r0, [sp, #0x18]\n"
1322 "    strh.w  r0, [sp, #0x24]\n"
1323 "    b       loc_fc27bf20\n"
1324 "loc_fc27bf18:\n"
1325 "    strh.w  r0, [sp, #0x1c]\n"
1326 "    strh.w  r1, [sp, #0x24]\n"
1327 "loc_fc27bf20:\n"
1328 "    cmp     r5, #1\n"
1329 "    ldr     r0, [sp, #0x28]\n"
1330 "    bne     loc_fc27bf58\n"
1331 "    movs    r2, #0xc\n"
1332 "    ldr.w   r1, [r0, #0x94]\n"
1333 "    add.w   r1, r1, r1, lsl #1\n"
1334 "    add.w   r4, r0, r1, lsl #2\n"
1335 "    ldr     r0, =0x0006a77c\n"
1336 "    subs    r4, #8\n"
1337 "    add     r1, sp, #0x1c\n"
1338 "    blx     sub_fc314df4\n"
1339 "    ldr     r0, =0x0006a77c\n"
1340 "    movs    r2, #0xc\n"
1341 "    add     r1, sp, #0x1c\n"
1342 "    adds    r0, #0xc\n"
1343 "    blx     sub_fc314df4\n"
1344 "    ldr     r0, =0x0006a77c\n"
1345 "    movs    r2, #0xc\n"
1346 "    mov     r1, r4\n"
1347 "    adds    r0, #0x18\n"
1348 "    blx     sub_fc314df4\n"
1349 "    b       loc_fc27bfa2\n"
1350 "loc_fc27bf58:\n"
1351 "    ldr     r0, [r0]\n"
1352 "    mov.w   r3, #1\n"
1353 "    cmp     r0, #0xc\n"
1354 "    bne     loc_fc27bf82\n"
1355 "    movs    r2, #0\n"
1356 "    mov     r1, r3\n"
1357 "    strd    r2, r3, [sp]\n"
1358 "    movs    r0, #0\n"
1359 "    mov     r2, r3\n"
1360 "    bl      sub_fc277ca4\n"
1361 "    movs    r3, #1\n"
1362 "    movs    r2, #0\n"
1363 "    mov     r1, r3\n"
1364 "    movs    r0, #0\n"
1365 "    strd    r2, r3, [sp]\n"
1366 "    mov     r2, r3\n"
1367 "    b       loc_fc27bf9e\n"
1368 "loc_fc27bf82:\n"
1369 "    movs    r2, #1\n"
1370 "    strd    r2, r3, [sp]\n"
1371 "    mov     r3, r2\n"
1372 "    mov     r1, r2\n"
1373 "    mov     r0, r2\n"
1374 "    bl      sub_fc277ca4\n"
1375 "    movs    r3, #1\n"
1376 "    str     r3, [sp]\n"
1377 "    mov     r2, r3\n"
1378 "    mov     r1, r3\n"
1379 "    mov     r0, r3\n"
1380 "    str     r3, [sp, #4]\n"
1381 "loc_fc27bf9e:\n"
1382 "    bl      sub_fc277de4\n"
1383 "loc_fc27bfa2:\n"
1384 "    ldr     r0, [sp, #0x28]\n"
1385 "    bl      sub_fc27cc22\n"
1386 "    b       loc_fc27babc\n"
1387     );
1388 }
1389 
1390 void __attribute__((naked,noinline)) sub_fc278b1c_my() {
1391     asm volatile ( // capdis -stubs -s=0xFC278B1D -c=52 -jfw -f=chdk PRIMARY.BIN 0xfc000000
1392 "    push.w  {r4, r5, r6, r7, r8, lr}\n"
1393 "    ldr     r7, =0x0000cc60\n"
1394 "    movs    r1, #0x3e\n"
1395 "    mov     r4, r0\n"
1396 "    ldr     r0, [r7, #0x20]\n"
1397 "    blx     sub_fc314d3c\n" // j_ClearEventFlag
1398 "    movs    r2, #0\n"
1399 "    ldrsh.w r0, [r4, #4]\n"
1400 "    movs    r3, #1\n"
1401 "    mov     r1, r2\n"
1402 "    bl      sub_fc2779e2\n"
1403 "    mov     r6, r0\n"
1404 "    ldrsh.w r0, [r4, #6]\n"
1405 "    bl      sub_fc277b6a\n"
1406 "    ldrsh.w r0, [r4, #8]\n"
1407 "    bl      sub_fc277bae\n"
1408 "    ldrsh.w r0, [r4, #0xa]\n"
1409 "    bl      sub_fc277bf2\n"
1410 "    ldrsh.w r0, [r4, #0xc]\n"
1411 "    movs    r1, #0\n"
1412 "    bl      sub_fc277c36\n"
1413 "    mov     r5, r0\n"
1414 "    ldr     r0, [r4]\n"
1415 "    ldr.w   r8, =0x0006a794\n"
1416 "    cmp     r0, #0xc\n"
1417 "    bne     loc_fc278b70\n"
1418 "    movs    r6, #0\n"
1419 "    mov     r5, r6\n"
1420 "    b       loc_fc278b88\n"
1421 "loc_fc278b70:\n"
1422 "    cmp     r6, #1\n"
1423 "    bne     loc_fc278b88\n"
1424 "    ldrsh.w r0, [r4, #4]\n"
1425 "    movs    r2, #2\n"
1426 "    ldr     r1, =0xfc277971\n"
1427 "    bl      sub_fc3396ae\n"
1428 "    strh    r0, [r4, #4]\n"
1429 "    movs    r0, #0\n"
1430 "    str     r0, [r7, #0x2c]\n"
1431 "    b       loc_fc278b8e\n"
1432 "loc_fc278b88:\n"
1433 "    ldrh.w  r0, [r8]\n"
1434 "    strh    r0, [r4, #4]\n"
1435 "loc_fc278b8e:\n"
1436 "    cmp     r5, #1\n"
1437 "    bne     loc_fc278ba0\n"
1438 "    ldrsh.w r0, [r4, #0xc]\n"
1439 "    movs    r2, #0x20\n"
1440 "    ldr     r1, =0xfc2779cd\n"
1441 "    bl      sub_fc27cc98\n"
1442 "    b       loc_fc278ba4\n"
1443 "loc_fc278ba0:\n"
1444 "    ldrh.w  r0, [r8, #8]\n"
1445 "loc_fc278ba4:\n"
1446 "    strh    r0, [r4, #0xc]\n"
1447 "    ldrsh.w r0, [r4, #6]\n"
1448 "    bl      sub_fc142cda_my\n" // ->
1449 "    ldr     pc, =0xfc278baf\n" // Continue in firmware
1450     );
1451 }
1452 
1453 void __attribute__((naked,noinline)) sub_fc142cda_my() {
1454     asm volatile ( // capdis -stubs -s=0xfc142cdb -c=35 -f=chdk PRIMARY.BIN 0xfc000000
1455 "    push    {r4, r5, r6, lr}\n"
1456 "    ldr     r5, =0x0000c5a4\n"
1457 "    mov     r4, r0\n"
1458 "    ldr     r0, [r5, #4]\n"
1459 "    cmp     r0, #1\n"
1460 "    beq     loc_fc142cf2\n"
1461 "    movs    r0, #0\n"
1462 "    movw    r2, #0x16b\n"
1463 "    ldr     r1, =0xfc142d98\n" //  *"Shutter.c"
1464 "    blx     sub_fc314dec\n" // j_DebugAssert
1465 "loc_fc142cf2:\n"
1466 "    ldr     r0, =0xfffff400\n"
1467 "    cmp     r4, r0\n"
1468 "    bne     loc_fc142cfc\n"
1469 "    ldrsh.w r4, [r5, #2]\n"
1470 "loc_fc142cfc:\n"
1471 "    strh    r4, [r5, #2]\n"
1472 "    cmp     r4, r0\n"
1473 "    bne     loc_fc142d0e\n"
1474 "    movs    r0, #0\n"
1475 "    movw    r2, #0x171\n"
1476 "    ldr     r1, =0xfc142d98\n" //  *"Shutter.c"
1477 "    blx     sub_fc314dec\n" // j_DebugAssert
1478 "loc_fc142d0e:\n"
1479 "    mov     r0, r4\n"
1480 //"    bl      _apex2us\n"  // -
1481 "    bl      apex2us\n"     // +
1482 "    mov     r4, r0\n"
1483 "    bl      sub_fc2309ca\n"
1484 "    mov     r0, r4\n"
1485 "    bl      sub_fc15e4a8\n"
1486 "    lsls    r0, r0, #0x1f\n"
1487 "    beq     loc_fc142d34\n"
1488 "    pop.w   {r4, r5, r6, lr}\n"
1489 "    movs    r0, #0\n"
1490 "    movw    r2, #0x176\n"
1491 "    ldr     r1, =0xfc142d98\n" //  *"Shutter.c"
1492 //"    b.w     loc_fc31429e\n"  // -
1493 "    b.w     sub_fc31429e\n"    // + -> DebugAssert
1494 "loc_fc142d34:\n"
1495 "    pop     {r4, r5, r6, pc}\n"
1496     );
1497 }

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