This source file includes following definitions.
- taskCreateHook
- boot
- loc_FF810354_my
- sub_FF811198_my
- sub_FF815EE0_my
- taskcreate_Startup_my
- task_Startup_my
- spytask
- CreateTask_spytask
- CreateTask_PhySw
- init_file_modules_task
- sub_FF88E098_my
- sub_FF8705CC_my
- sub_FF8701F4_my
- sub_FF86FF14_my
- JogDial_task_my
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4 #include "dryos31.h"
5
6 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
7
8 const char * const new_sa = &_end;
9
10
11
12 void CreateTask_PhySw();
13 void CreateTask_spytask();
14 extern volatile int jogdial_stopped;
15 void JogDial_task_my(void);
16 extern void task_FileWrite();
17
18
19
20
21
22 extern void task_CaptSeq();
23 extern void task_InitFileModules();
24 extern void task_RotaryEncoder();
25 extern void task_MovieRecord();
26 extern void task_ExpDrv();
27
28 void taskCreateHook(context_t **context) {
29 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
30
31
32 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
33 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
34 if(tcb->entry == (void*)task_RotaryEncoder) tcb->entry = (void*)JogDial_task_my;
35 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
36 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
37 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
38 }
39
40
41
42
43
44
45 void __attribute__((naked,noinline)) boot()
46 {
47
48 asm volatile (
49
50 " LDR R1, =0xC0410000 \n"
51 " MOV R0, #0 \n"
52 " STR R0, [R1] \n"
53 " MOV R1, #0x78 \n"
54 " MCR p15, 0, R1,c1,c0 \n"
55 " MOV R1, #0 \n"
56 " MCR p15, 0, R1,c7,c10, 4 \n"
57 " MCR p15, 0, R1,c7,c5 \n"
58 " MCR p15, 0, R1,c7,c6 \n"
59 " MOV R0, #0x3D \n"
60 " MCR p15, 0, R0,c6,c0 \n"
61 " MOV R0, #0xC000002F \n"
62 " MCR p15, 0, R0,c6,c1 \n"
63 " MOV R0, #0x33 \n"
64 " MCR p15, 0, R0,c6,c2 \n"
65 " MOV R0, #0x40000033 \n"
66 " MCR p15, 0, R0,c6,c3 \n"
67 " MOV R0, #0x80000017 \n"
68 " MCR p15, 0, R0,c6,c4 \n"
69 " LDR R0, =0xFF80002D \n"
70 " MCR p15, 0, R0,c6,c5 \n"
71 " MOV R0, #0x34 \n"
72 " MCR p15, 0, R0,c2,c0 \n"
73 " MOV R0, #0x34 \n"
74 " MCR p15, 0, R0,c2,c0, 1 \n"
75 " MOV R0, #0x34 \n"
76 " MCR p15, 0, R0,c3,c0 \n"
77 " LDR R0, =0x3333330 \n"
78 " MCR p15, 0, R0,c5,c0, 2 \n"
79 " LDR R0, =0x3333330 \n"
80 " MCR p15, 0, R0,c5,c0, 3 \n"
81 " MRC p15, 0, R0,c1,c0 \n"
82 " ORR R0, R0, #0x1000 \n"
83 " ORR R0, R0, #4 \n"
84 " ORR R0, R0, #1 \n"
85 " MCR p15, 0, R0,c1,c0 \n"
86 " MOV R1, #0x80000006 \n"
87 " MCR p15, 0, R1,c9,c1 \n"
88 " MOV R1, #6 \n"
89 " MCR p15, 0, R1,c9,c1, 1 \n"
90 " MRC p15, 0, R1,c1,c0 \n"
91 " ORR R1, R1, #0x50000 \n"
92 " MCR p15, 0, R1,c1,c0 \n"
93 " LDR R2, =0xC0200000 \n"
94 " MOV R1, #1 \n"
95 " STR R1, [R2,#0x10C] \n"
96 " MOV R1, #0xFF \n"
97 " STR R1, [R2,#0xC] \n"
98 " STR R1, [R2,#0x1C] \n"
99 " STR R1, [R2,#0x2C] \n"
100 " STR R1, [R2,#0x3C] \n"
101 " STR R1, [R2,#0x4C] \n"
102 " STR R1, [R2,#0x5C] \n"
103 " STR R1, [R2,#0x6C] \n"
104 " STR R1, [R2,#0x7C] \n"
105 " STR R1, [R2,#0x8C] \n"
106 " STR R1, [R2,#0x9C] \n"
107 " STR R1, [R2,#0xAC] \n"
108 " STR R1, [R2,#0xBC] \n"
109 " STR R1, [R2,#0xCC] \n"
110 " STR R1, [R2,#0xDC] \n"
111 " STR R1, [R2,#0xEC] \n"
112 " STR R1, [R2,#0xFC] \n"
113 " LDR R1, =0xC0400008 \n"
114 " LDR R2, =0x430005 \n"
115 " STR R2, [R1] \n"
116 " MOV R1, #1 \n"
117 " LDR R2, =0xC0243100 \n"
118 " STR R2, [R1] \n"
119 " LDR R2, =0xC0242010 \n"
120 " LDR R1, [R2] \n"
121 " ORR R1, R1, #1 \n"
122 " STR R1, [R2] \n"
123 " LDR R0, =0xFFC08418 \n"
124 " LDR R1, =0x1900 \n"
125 " LDR R3, =0xEE70 \n"
126 "loc_FF81013C: \n"
127 " CMP R1, R3 \n"
128 " LDRCC R2, [R0],#4 \n"
129 " STRCC R2, [R1],#4 \n"
130 " BCC loc_FF81013C \n"
131 " LDR R1, =0x166210 \n"
132 " MOV R2, #0 \n"
133 "loc_FF810154: \n"
134 " CMP R3, R1 \n"
135 " STRCC R2, [R3],#4 \n"
136 " BCC loc_FF810154 \n"
137
138 " B loc_FF810354_my \n"
139
140 );
141 };
142
143 void __attribute__((naked,noinline)) loc_FF810354_my() {
144
145
146 *(int*)0x1938 = (int)taskCreateHook;
147 *(int*)0x193C = (int)taskCreateHook;
148
149
150
151
152
153
154
155 if ((*(int*) 0xC0220118) & 1)
156 *(int*)(0x2478) = 0x100000;
157 else
158 *(int*)(0x2478) = 0x200000;
159
160
161 asm volatile (
162
163 " LDR R0, =0xFF8103CC \n"
164 " MOV R1, #0 \n"
165 " LDR R3, =0xFF810404 \n"
166 "loc_FF810360: \n"
167 " CMP R0, R3 \n"
168 " LDRCC R2, [R0],#4 \n"
169 " STRCC R2, [R1],#4 \n"
170 " BCC loc_FF810360 \n"
171 " LDR R0, =0xFF810404 \n"
172 " MOV R1, #0x4B0 \n"
173 " LDR R3, =0xFF810618 \n"
174 "loc_FF81037C: \n"
175 " CMP R0, R3 \n"
176 " LDRCC R2, [R0],#4 \n"
177 " STRCC R2, [R1],#4 \n"
178 " BCC loc_FF81037C \n"
179 " MOV R0, #0xD2 \n"
180 " MSR CPSR_cxsf, R0 \n"
181 " MOV SP, #0x1000 \n"
182 " MOV R0, #0xD3 \n"
183 " MSR CPSR_cxsf, R0 \n"
184 " MOV SP, #0x1000 \n"
185 " LDR R0, =0x6C4 \n"
186 " LDR R2, =0xEEEEEEEE \n"
187 " MOV R3, #0x1000 \n"
188 "loc_FF8103B0: \n"
189 " CMP R0, R3 \n"
190 " STRCC R2, [R0],#4 \n"
191 " BCC loc_FF8103B0 \n"
192
193 " BL sub_FF811198_my \n"
194
195
196 );
197 }
198
199 void __attribute__((naked,noinline)) sub_FF811198_my() {
200
201 asm volatile (
202
203 " STR LR, [SP,#-4]! \n"
204 " SUB SP, SP, #0x74 \n"
205 " MOV R0, SP \n"
206 " MOV R1, #0x74 \n"
207 " BL sub_FFB4A160 \n"
208 " MOV R0, #0x53000 \n"
209 " STR R0, [SP,#0x4] \n"
210
211
212
213 " LDR R0, =0x166210 \n"
214
215
216
217 " LDR R1, =0x2F9C00 \n"
218 " STR R0, [SP,#0x8] \n"
219 " RSB R0, R0, #0x1F80 \n"
220 " ADD R0, R0, #0x2F0000 \n"
221 " STR R0, [SP,#0xC] \n"
222 " LDR R0, =0x2F1F80 \n"
223 " STR R1, [SP,#0x0] \n"
224 " STRD R0, [SP,#0x10] \n"
225 " MOV R0, #0x22 \n"
226 " STR R0, [SP,#0x18] \n"
227 " MOV R0, #0x68 \n"
228 " STR R0, [SP,#0x1C] \n"
229 " LDR R0, =0x19B \n"
230
231 " LDR R1, =sub_FF815EE0_my \n"
232
233 " B sub_FF8111F0 \n "
234
235 );
236 }
237
238 void __attribute__((naked,noinline)) sub_FF815EE0_my() {
239 asm volatile (
240
241 " STMFD SP!, {R4,LR} \n"
242 " BL sub_FF810B20 \n"
243 " BL sub_FF81A33C \n"
244 " CMP R0, #0 \n"
245
246 " LDRLT R0, =0xFF815FF4 \n"
247 " BLLT sub_FF815FD4 \n"
248 " BL sub_FF815B1C \n"
249 " CMP R0, #0 \n"
250
251 " LDRLT R0, =0xFF815FFC \n"
252 " BLLT sub_FF815FD4 \n"
253
254 " LDR R0, =0xFF81600C \n"
255 " BL sub_FF815C04 \n"
256 " CMP R0, #0 \n"
257
258 " LDRLT R0, =0xFF816014 \n"
259 " BLLT sub_FF815FD4 \n"
260
261 " LDR R0, =0xFF81600C \n"
262 " BL sub_FF813CA4 \n"
263 " CMP R0, #0 \n"
264
265 " LDRLT R0, =0xFF816028 \n"
266 " BLLT sub_FF815FD4 \n"
267 " BL sub_FF819CC4 \n"
268 " CMP R0, #0 \n"
269
270 " LDRLT R0, =0xFF816034 \n"
271 " BLLT sub_FF815FD4 \n"
272 " BL sub_FF81167C \n"
273 " CMP R0, #0 \n"
274
275 " LDRLT R0, =0xFF816040 \n"
276 " BLLT sub_FF815FD4 \n"
277 " LDMFD SP!, {R4,LR} \n"
278 " B taskcreate_Startup_my \n"
279
280 );
281 }
282
283 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
284
285 asm volatile (
286
287 " STMFD SP!, {R3,LR} \n"
288
289 " BL sub_FF83BF3C \n"
290 " CMP R0, #0 \n"
291 " BNE loc_FF81FB98 \n"
292 " BL sub_FF835D84 \n"
293 " CMP R0, #0 \n"
294 " BEQ loc_FF81FB98 \n"
295 " BL sub_FF834394 \n"
296 " CMP R0, #0 \n"
297 " BNE loc_FF81FB98 \n"
298 " BL sub_FF833A50 \n"
299 " LDR R1, =0xC0220000 \n"
300 " MOV R0, #0x44 \n"
301 " STR R0, [R1,#0x80] \n"
302 " BL sub_FF833C44 \n"
303 "loc_FF81FB94: \n"
304 " B loc_FF81FB94 \n"
305 "loc_FF81FB98: \n"
306
307
308 " BL sub_FF83A158 \n"
309 " LDR R1, =0x34E000 \n"
310 " MOV R0, #0 \n"
311 " BL sub_FF83A5A0 \n"
312 " BL sub_FF83A34C \n"
313 " MOV R3, #0 \n"
314 " STR R3, [SP] \n"
315
316 " LDR R3, =task_Startup_my \n"
317
318 " B sub_FF81FBC0 \n"
319 );
320 }
321
322 void __attribute__((naked,noinline)) task_Startup_my() {
323
324 asm volatile (
325 " STMFD SP!, {R4,LR} \n"
326 " BL sub_FF816594 \n"
327 " BL sub_FF8354FC \n"
328 " BL sub_FF833714 \n"
329
330 " BL sub_FF83C16C \n"
331
332 " BL sub_FF83C308 \n"
333 " BL sub_FF832474 \n"
334 " BL sub_FF83C19C \n"
335 " BL sub_FF8398FC \n"
336 " BL sub_FF83C30C \n"
337
338
339 " BL CreateTask_PhySw \n"
340 " BL CreateTask_spytask \n"
341
342 " B sub_FF81FB24 \n"
343 );
344
345 }
346
347
348
349
350
351 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
352 {
353 (void)ua; (void)ub; (void)uc; (void)ud; (void)ue; (void)uf;
354 core_spytask();
355 }
356
357
358
359
360
361 void CreateTask_spytask() {
362 _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
363 }
364
365 void __attribute__((naked,noinline)) CreateTask_PhySw() {
366
367 asm volatile (
368
369 " STMFD SP!, {R3-R5,LR} \n"
370 " LDR R4, =0x1C30 \n"
371 " LDR R0, [R4,#0x10] \n"
372 " CMP R0, #0 \n"
373 " BNE sub_FF8342B0 \n"
374 " MOV R3, #0 \n"
375 " STR R3, [SP] \n"
376
377
378
379 " LDR R3, =mykbd_task \n"
380 " MOV R2, #0x2000 \n"
381
382 " B sub_FF8342A0 \n"
383 );
384
385 }
386
387
388
389
390
391 void __attribute__((naked,noinline)) init_file_modules_task() {
392 asm volatile (
393 " STMFD SP!, {R4-R6,LR} \n"
394 " BL sub_FF88E06C \n"
395 " LDR R5, =0x5006 \n"
396 " MOVS R4, R0 \n"
397 " MOVNE R1, #0 \n"
398 " MOVNE R0, R5 \n"
399 " BLNE sub_FF891DDC \n"
400
401 " BL sub_FF88E098_my \n"
402 " BL core_spytask_can_start \n"
403
404 " B sub_FF897958 \n"
405 );
406 }
407
408 void __attribute__((naked,noinline)) sub_FF88E098_my() {
409 asm volatile (
410
411
412 " STMFD SP!, {R4,LR} \n"
413 " MOV R0, #3 \n"
414
415 " BL sub_FF8705CC_my \n"
416
417
418 " B sub_FF88E0A8 \n"
419 );
420 }
421
422 void __attribute__((naked,noinline)) sub_FF8705CC_my() {
423 asm volatile (
424
425 " STMFD SP!, {R4-R8,LR} \n"
426 " MOV R8, R0 \n"
427 " BL sub_FF87054C \n"
428 " LDR R1, =0x37988 \n"
429 " MOV R6, R0 \n"
430 " ADD R4, R1, R0,LSL#7 \n"
431 " LDR R0, [R4,#0x6C] \n"
432 " CMP R0, #4 \n"
433 " LDREQ R1, =0x83F \n"
434 " LDREQ R0, =0xFF87008C \n"
435 " BLEQ _DebugAssert \n"
436 " MOV R1, R8 \n"
437 " MOV R0, R6 \n"
438 " BL sub_FF86FE00 \n"
439 " LDR R0, [R4,#0x38] \n"
440 " BL sub_FF870C2C \n"
441 " CMP R0, #0 \n"
442 " STREQ R0, [R4,#0x6C] \n"
443 " MOV R0, R6 \n"
444 " BL sub_FF86FE90 \n"
445 " MOV R0, R6 \n"
446
447 " BL sub_FF8701F4_my \n"
448
449 " B sub_FF870624 \n"
450 );
451 }
452
453 void __attribute__((naked,noinline)) sub_FF8701F4_my() {
454 asm volatile (
455
456 " STMFD SP!, {R4-R6,LR} \n"
457 " MOV R5, R0 \n"
458 " LDR R0, =0x37988 \n"
459 " ADD R4, R0, R5,LSL#7 \n"
460 " LDR R0, [R4,#0x6C] \n"
461 " TST R0, #2 \n"
462 " MOVNE R0, #1 \n"
463 " LDMNEFD SP!, {R4-R6,PC} \n"
464 " LDR R0, [R4,#0x38] \n"
465 " MOV R1, R5 \n"
466
467 " BL sub_FF86FF14_my \n"
468
469 " B sub_FF870220 \n"
470 );
471 }
472
473 void __attribute__((naked,noinline)) sub_FF86FF14_my() {
474 asm volatile (
475 " STMFD SP!, {R4-R10,LR} \n"
476 " MOV R9, R0 \n"
477 " LDR R0, =0x37988 \n"
478 " MOV R8, #0 \n"
479 " ADD R5, R0, R1,LSL#7 \n"
480 " LDR R0, [R5,#0x3C] \n"
481 " MOV R7, #0 \n"
482 " CMP R0, #7 \n"
483 " MOV R6, #0 \n"
484 " ADDLS PC, PC, R0,LSL#2 \n"
485 " B sub_FF87006C \n"
486 "loc_FF86FF40: \n"
487 " B loc_FF86FF78 \n"
488 "loc_FF86FF44: \n"
489 " B loc_FF86FF60 \n"
490 "loc_FF86FF48: \n"
491 " B loc_FF86FF60 \n"
492 "loc_FF86FF4C: \n"
493 " B loc_FF86FF60 \n"
494 "loc_FF86FF50: \n"
495 " B loc_FF86FF60 \n"
496 "loc_FF86FF54: \n"
497 " B sub_FF870064 \n"
498 "loc_FF86FF58: \n"
499 " B loc_FF86FF60 \n"
500 "loc_FF86FF5C: \n"
501 " B loc_FF86FF60 \n"
502 "loc_FF86FF60: \n"
503
504 " MOV R2, #0 \n"
505 " MOV R1, #0x200 \n"
506 " MOV R0, #2 \n"
507 " BL sub_FF888184 \n"
508 " MOVS R4, R0 \n"
509 " BNE loc_FF86FF80 \n"
510 "loc_FF86FF78: \n"
511
512 " MOV R0, #0 \n"
513 " LDMFD SP!, {R4-R10,PC} \n"
514 "loc_FF86FF80: \n"
515 " LDR R12, [R5,#0x50] \n"
516 " MOV R3, R4 \n"
517 " MOV R2, #1 \n"
518 " MOV R1, #0 \n"
519 " MOV R0, R9 \n"
520 " BLX R12 \n"
521 " CMP R0, #1 \n"
522 " BNE loc_FF86FFAC \n"
523 " MOV R0, #2 \n"
524 " BL sub_FF8882D4 \n"
525 " B loc_FF86FF78 \n"
526 "loc_FF86FFAC: \n"
527 " LDR R1, [R5,#0x64] \n"
528 " MOV R0, R9 \n"
529 " BLX R1 \n"
530
531
532 "MOV R1, R4\n"
533 "BL mbr_read_dryos\n"
534
535
536
537
538
539
540 "MOV R12, R4\n"
541 "MOV LR, R4\n"
542 "MOV R1, #1\n"
543 "B dg_sd_fat32_enter\n"
544 "dg_sd_fat32:\n"
545 "CMP R1, #4\n"
546 "BEQ dg_sd_fat32_end\n"
547 "ADD R12, R12, #0x10\n"
548 "ADD R1, R1, #1\n"
549 "dg_sd_fat32_enter:\n"
550 "LDRB R2, [R12, #0x1BE]\n"
551 "LDRB R3, [R12, #0x1C2]\n"
552 "CMP R3, #0xB\n"
553 "CMPNE R3, #0xC\n"
554 "BNE dg_sd_fat32\n"
555 "CMP R2, #0x00\n"
556 "CMPNE R2, #0x80\n"
557 "BNE dg_sd_fat32\n"
558
559 "MOV R4, R12\n"
560
561 "dg_sd_fat32_end:\n"
562
563
564
565 " LDRB R1, [R4,#0x1C9] \n"
566 " LDRB R3, [R4,#0x1C8] \n"
567 " LDRB R12, [R4,#0x1CC] \n"
568 " MOV R1, R1,LSL#24 \n"
569 " ORR R1, R1, R3,LSL#16 \n"
570 " LDRB R3, [R4,#0x1C7] \n"
571 " LDRB R2, [R4,#0x1BE] \n"
572
573 " ORR R1, R1, R3,LSL#8 \n"
574 " LDRB R3, [R4,#0x1C6] \n"
575 " CMP R2, #0 \n"
576 " CMPNE R2, #0x80 \n"
577 " ORR R1, R1, R3 \n"
578 " LDRB R3, [R4,#0x1CD] \n"
579 " MOV R3, R3,LSL#24 \n"
580 " ORR R3, R3, R12,LSL#16 \n"
581 " LDRB R12, [R4,#0x1CB] \n"
582 " ORR R3, R3, R12,LSL#8 \n"
583 " LDRB R12, [R4,#0x1CA] \n"
584 " ORR R3, R3, R12 \n"
585
586
587 " LDRB R12, [LR,#0x1FE]\n"
588 " LDRB LR, [LR,#0x1FF]\n"
589
590 " B sub_FF87000C \n"
591
592 );
593 }
594
595
596
597
598 void __attribute__((naked,noinline)) JogDial_task_my()
599 {
600 asm volatile (
601 " STMFD SP!, {R4-R11,LR} \n"
602 " SUB SP, SP, #0x1C \n"
603 " BL sub_FF860118 \n"
604 " LDR R1, =0x2480 \n"
605 " LDR R6, =0xFFB4F580 \n"
606 " MOV R0, #0 \n"
607 " ADD R3, SP, #0x10 \n"
608 " ADD R12, SP, #0x14 \n"
609 " ADD R10, SP, #0x8 \n"
610 " MOV R2, #0 \n"
611 " ADD R9, SP, #0xC \n"
612 "loc_FF85FDAC: \n"
613 " ADD R12, SP, #0x14 \n"
614 " ADD LR, R12, R0,LSL#1 \n"
615 " MOV R2, #0 \n"
616 " ADD R3, SP, #0x10 \n"
617 " STRH R2, [LR] \n"
618 " ADD LR, R3, R0,LSL#1 \n"
619 " STRH R2, [LR] \n"
620 " STR R2, [R9,R0,LSL#2] \n"
621 " STR R2, [R10,R0,LSL#2] \n"
622 " ADD R0, R0, #1 \n"
623 " CMP R0, #1 \n"
624 " BLT loc_FF85FDAC \n"
625 "loc_FF85FDDC: \n"
626 " LDR R0, =0x2480 \n"
627 " MOV R2, #0 \n"
628 " LDR R0, [R0,#8] \n"
629 " MOV R1, SP \n"
630 " BL sub_FF839B8C \n"
631 " CMP R0, #0 \n"
632 " LDRNE R1, =0x262 \n"
633
634 " LDRNE R0, =0xFF86003C \n"
635 " BLNE _DebugAssert \n"
636 " LDR R0, [SP] \n"
637 " AND R4, R0, #0xFF \n"
638 " AND R0, R0, #0xFF00 \n"
639 " CMP R0, #0x100 \n"
640 " BEQ loc_FF85FE4C \n"
641 " CMP R0, #0x200 \n"
642 " BEQ loc_FF85FE84 \n"
643 " CMP R0, #0x300 \n"
644 " BEQ loc_FF86007C \n"
645 " CMP R0, #0x400 \n"
646 " BNE loc_FF85FDDC \n"
647 " CMP R4, #0 \n"
648 " LDRNE R1, =0x2ED \n"
649
650 " LDRNE R0, =0xFF86003C \n"
651 " BLNE _DebugAssert \n"
652 " RSB R0, R4, R4,LSL#3 \n"
653 " LDR R0, [R6,R0,LSL#2] \n"
654 "loc_FF85FE44: \n"
655 " BL sub_FF8600FC \n"
656 " B loc_FF85FDDC \n"
657 "loc_FF85FE4C: \n"
658
659 "labelA: \n"
660 "LDR R0, =jogdial_stopped\n"
661 "LDR R0, [R0]\n"
662 "CMP R0, #1\n"
663 "BNE labelB\n"
664 "MOV R0, #40\n"
665 "BL _SleepTask\n"
666 "B labelA\n"
667 "labelB: \n"
668
669
670 " LDR R7, =0x248C \n"
671 " LDR R0, [R7,R4,LSL#2] \n"
672 " BL sub_FF83AB24 \n"
673
674 " LDR R2, =0xFF85FCCC \n"
675 " MOV R1, R2 \n"
676 " ORR R3, R4, #0x200 \n"
677 " MOV R0, #0x28 \n"
678 " BL sub_FF83AA40 \n"
679 " TST R0, #1 \n"
680 " CMPNE R0, #0x15 \n"
681 " STR R0, [R10,R4,LSL#2] \n"
682 " BEQ loc_FF85FDDC \n"
683 " MOV R1, #0x274 \n"
684 " B loc_FF860028 \n"
685 "loc_FF85FE84: \n"
686 " RSB R5, R4, R4,LSL#3 \n"
687 " LDR R0, [R6,R5,LSL#2] \n"
688 " LDR R1, =0xC0240104 \n"
689 " LDR R0, [R1,R0,LSL#8] \n"
690 " MOV R2, R0,ASR#16 \n"
691 " ADD R0, SP, #0x14 \n"
692 " ADD R0, R0, R4,LSL#1 \n"
693 " STR R0, [SP,#0x18] \n"
694 " STRH R2, [R0] \n"
695 " ADD R0, SP, #0x10 \n"
696 " ADD R11, R0, R4,LSL#1 \n"
697 " LDRSH R3, [R11] \n"
698 " SUB R0, R2, R3 \n"
699 " CMP R0, #0 \n"
700 " BNE loc_FF85FF04 \n"
701 " LDR R0, [R9,R4,LSL#2] \n"
702 " CMP R0, #0 \n"
703 " BEQ loc_FF85FFE4 \n"
704 " LDR R7, =0x248C \n"
705 " LDR R0, [R7,R4,LSL#2] \n"
706 " BL sub_FF83AB24 \n"
707
708 " LDR R2, =0xFF85FCD8 \n"
709 " MOV R1, R2 \n"
710 " ORR R3, R4, #0x300 \n"
711 " MOV R0, #0x1F4 \n"
712 " BL sub_FF83AA40 \n"
713 " TST R0, #1 \n"
714 " CMPNE R0, #0x15 \n"
715 " STR R0, [R7,R4,LSL#2] \n"
716 " BEQ loc_FF85FFE4 \n"
717 " LDR R1, =0x28D \n"
718 " B loc_FF85FFDC \n"
719 "loc_FF85FF04: \n"
720 " MOV R1, R0 \n"
721 " RSBLT R0, R0, #0 \n"
722 " MOVLE R7, #0 \n"
723 " MOVGT R7, #1 \n"
724 " CMP R0, #0xFF \n"
725 " BLS loc_FF85FF44 \n"
726 " CMP R1, #0 \n"
727 " RSBLE R0, R3, #0xFF \n"
728 " ADDLE R0, R0, #0x7F00 \n"
729 " ADDLE R0, R0, R2 \n"
730 " RSBGT R0, R2, #0xFF \n"
731 " ADDGT R0, R0, #0x7F00 \n"
732 " ADDGT R0, R0, R3 \n"
733 " ADD R0, R0, #0x8000 \n"
734 " ADD R0, R0, #1 \n"
735 " EOR R7, R7, #1 \n"
736 "loc_FF85FF44: \n"
737 " STR R0, [SP,#0x4] \n"
738 " LDR R0, [R9,R4,LSL#2] \n"
739 " CMP R0, #0 \n"
740 " ADDEQ R0, R6, R5,LSL#2 \n"
741 " LDREQ R0, [R0,#8] \n"
742 " BEQ loc_FF85FF7C \n"
743 " ADD R8, R6, R5,LSL#2 \n"
744 " ADD R1, R8, R7,LSL#2 \n"
745 " LDR R1, [R1,#0x10] \n"
746 " CMP R1, R0 \n"
747 " BEQ loc_FF85FF80 \n"
748 " LDR R0, [R8,#0xC] \n"
749 " BL sub_FF893C28 \n"
750 " LDR R0, [R8,#8] \n"
751 "loc_FF85FF7C: \n"
752 " BL sub_FF893C28 \n"
753 "loc_FF85FF80: \n"
754 " ADD R0, R6, R5,LSL#2 \n"
755 " ADD R7, R0, R7,LSL#2 \n"
756 " LDR R0, [R7,#0x10] \n"
757 " LDR R1, [SP,#0x4] \n"
758 " BL sub_FF893B50 \n"
759 " LDR R0, [R7,#0x10] \n"
760 " LDR R7, =0x248C \n"
761 " STR R0, [R9,R4,LSL#2] \n"
762 " LDR R0, [SP,#0x18] \n"
763 " LDRH R0, [R0] \n"
764 " STRH R0, [R11] \n"
765 " LDR R0, [R7,R4,LSL#2] \n"
766 " BL sub_FF83AB24 \n"
767
768 " LDR R2, =0xFF85FCD8 \n"
769 " MOV R1, R2 \n"
770 " ORR R3, R4, #0x300 \n"
771 " MOV R0, #0x1F4 \n"
772 " BL sub_FF83AA40 \n"
773 " TST R0, #1 \n"
774 " CMPNE R0, #0x15 \n"
775 " STR R0, [R7,R4,LSL#2] \n"
776 " BEQ loc_FF85FFE4 \n"
777 " LDR R1, =0x2CF \n"
778 "loc_FF85FFDC: \n"
779
780 " LDR R0, =0xFF86003C \n"
781 " BL _DebugAssert \n"
782 "loc_FF85FFE4: \n"
783 " ADD R0, R6, R5,LSL#2 \n"
784 " LDR R0, [R0,#0x18] \n"
785 " CMP R0, #1 \n"
786 " BNE loc_FF860074 \n"
787 " LDR R0, =0x2480 \n"
788 " LDR R0, [R0,#0x10] \n"
789 " CMP R0, #0 \n"
790 "loc_FF860000: \n"
791 " BEQ loc_FF860074 \n"
792
793 " LDR R2, =0xFF85FCCC \n"
794 " MOV R1, R2 \n"
795 " ORR R3, R4, #0x400 \n"
796 " BL sub_FF83AA40 \n"
797 " TST R0, #1 \n"
798 " CMPNE R0, #0x15 \n"
799 " STR R0, [R10,R4,LSL#2] \n"
800 " BEQ loc_FF85FDDC \n"
801 " LDR R1, =0x2D6 \n"
802 "loc_FF860028: \n"
803
804 " LDR R0, =0xFF86003C \n"
805 " BL _DebugAssert \n"
806 " B loc_FF85FDDC \n"
807 "loc_FF860074: \n"
808 " LDR R0, [R6,R5,LSL#2] \n"
809 " B loc_FF85FE44 \n"
810 "loc_FF86007C: \n"
811 " LDR R0, [R9,R4,LSL#2] \n"
812 " CMP R0, #0 \n"
813 " MOVEQ R1, #0x2E0 \n"
814
815 " LDREQ R0, =0xFF86003C \n"
816 " BLEQ _DebugAssert \n"
817 " RSB R0, R4, R4,LSL#3 \n"
818 " ADD R0, R6, R0,LSL#2 \n"
819 " LDR R0, [R0,#0xC] \n"
820 " BL sub_FF893C28 \n"
821 " MOV R2, #0 \n"
822 " STR R2, [R9,R4,LSL#2] \n"
823 " B loc_FF85FDDC \n"
824 );
825 }