This source file includes following definitions.
- capt_seq_task
- sub_FFB0A6F4_my
- sub_FFB0D8CC_my
- exp_drv_task
- sub_FF971BA8_my
- sub_FF93A8DC_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 static long *nrflag = (long*)0xCF74;
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R4,LR} \n"
17 " SUB SP, SP, #4 \n"
18 " MOV R4, SP \n"
19 " B loc_FFB0AD2C \n"
20
21 "loc_FFB0ABB0:\n"
22 " LDR R2, [SP] \n"
23 " LDR R3, [R2] \n"
24 " MOV R0, R2 \n"
25 " CMP R3, #0x15 \n"
26 " LDRLS PC, [PC, R3, LSL#2] \n"
27 " B loc_FFB0AD00 \n"
28 " .long loc_FFB0AC20 \n"
29 " .long loc_FFB0AC40 \n"
30 " .long loc_FFB0AC54 \n"
31 " .long loc_FFB0AC68 \n"
32 " .long loc_FFB0AC60 \n"
33 " .long loc_FFB0AC70 \n"
34 " .long loc_FFB0AC78 \n"
35 " .long loc_FFB0AC84 \n"
36 " .long loc_FFB0AC8C \n"
37 " .long loc_FFB0AC98 \n"
38 " .long loc_FFB0ACA0 \n"
39 " .long loc_FFB0ACA8 \n"
40 " .long loc_FFB0ACB0 \n"
41 " .long loc_FFB0ACB8 \n"
42 " .long loc_FFB0ACC0 \n"
43 " .long loc_FFB0ACCC \n"
44 " .long loc_FFB0ACD4 \n"
45 " .long loc_FFB0ACDC \n"
46 " .long loc_FFB0ACE4 \n"
47 " .long loc_FFB0ACF0 \n"
48 " .long loc_FFB0ACF8 \n"
49 " .long loc_FFB0AD14 \n"
50
51 "loc_FFB0AC20:\n"
52 " BL sub_FFB0B214 \n"
53 " BL shooting_expo_param_override\n"
54 " BL sub_FFB08924 \n"
55 " LDR R3, =0xBE160 \n"
56 " MOV R2, #0\n"
57 " STR R2, [R3,#0x24]\n"
58
59
60
61
62 " B loc_FFB0AD10 \n"
63
64 "loc_FFB0AC40:\n"
65 " BL sub_FFB0A6F4_my \n"
66
67 "loc_FFB0AC44:\n"
68 " LDR R2, =0xBE160 \n"
69 " MOV R3, #0 \n"
70 " STR R3, [R2, #0x24] \n"
71 " B loc_FFB0AD10 \n"
72
73 "loc_FFB0AC54:\n"
74 " MOV R0, #1 \n"
75 " BL sub_FFB0B434 \n"
76 " B loc_FFB0AD10 \n"
77
78 "loc_FFB0AC60:\n"
79 " BL sub_FFB0AE14 \n"
80 " B loc_FFB0AC44 \n"
81
82 "loc_FFB0AC68:\n"
83 " BL sub_FFB0B1CC \n"
84 " B loc_FFB0AC44 \n"
85
86 "loc_FFB0AC70:\n"
87 " BL sub_FFB0B1DC \n"
88 " B loc_FFB0AD10 \n"
89
90 "loc_FFB0AC78:\n"
91 " BL sub_FFB0B32C \n"
92 " BL sub_FFB08924 \n"
93 " B loc_FFB0AD10 \n"
94
95 "loc_FFB0AC84:\n"
96 " BL sub_FFB0A8AC \n"
97 " B loc_FFB0AD10 \n"
98
99 "loc_FFB0AC8C:\n"
100 " BL sub_FFB0B39C \n"
101 " BL sub_FFB08924 \n"
102 " B loc_FFB0AD10 \n"
103
104 "loc_FFB0AC98:\n"
105 " BL sub_FFB0B1CC \n"
106 " B loc_FFB0AD10 \n"
107
108 "loc_FFB0ACA0:\n"
109 " BL sub_FFB0CB04 \n"
110 " B loc_FFB0AD10 \n"
111
112 "loc_FFB0ACA8:\n"
113 " BL sub_FFB0CCD8 \n"
114 " B loc_FFB0AD10 \n"
115
116 "loc_FFB0ACB0:\n"
117 " BL sub_FFB0CD6C \n"
118 " B loc_FFB0AD10 \n"
119
120 "loc_FFB0ACB8:\n"
121 " BL sub_FFB0CE68 \n"
122 " B loc_FFB0AD10 \n"
123
124 "loc_FFB0ACC0:\n"
125 " MOV R0, #0 \n"
126 " BL sub_FFB0D0D4 \n"
127 " B loc_FFB0AD10 \n"
128
129 "loc_FFB0ACCC:\n"
130 " BL sub_FFB0D2A8 \n"
131 " B loc_FFB0AD10 \n"
132
133 "loc_FFB0ACD4:\n"
134 " BL sub_FFB0D344 \n"
135 " B loc_FFB0AD10 \n"
136
137 "loc_FFB0ACDC:\n"
138 " BL sub_FFB0D404 \n"
139 " B loc_FFB0AD10 \n"
140
141 "loc_FFB0ACE4:\n"
142 " BL sub_FFB0B588 \n"
143 " BL sub_FFB0A618 \n"
144 " B loc_FFB0AD10 \n"
145
146 "loc_FFB0ACF0:\n"
147 " BL sub_FFB0CFA8 \n"
148 " B loc_FFB0AD10 \n"
149
150 "loc_FFB0ACF8:\n"
151 " BL sub_FFB0D004 \n"
152 " B loc_FFB0AD10 \n"
153
154 "loc_FFB0AD00:\n"
155 " MOV R1, #0x4C0 \n"
156 " LDR R0, =0xFFB0A474 /*'SsShootTask.c'*/ \n"
157 " ADD R1, R1, #0xE \n"
158 " BL _DebugAssert \n"
159
160 "loc_FFB0AD10:\n"
161 " LDR R2, [SP] \n"
162
163 "loc_FFB0AD14:\n"
164 " LDR R3, =0x97A30 \n"
165 " LDR R1, [R2, #4] \n"
166 " LDR R0, [R3] \n"
167 " BL sub_FFB1E910 /*_SetEventFlag*/ \n"
168 " LDR R0, [SP] \n"
169 " BL sub_FFB0A4F4 \n"
170
171 "loc_FFB0AD2C:\n"
172 " LDR R3, =0x97A34 \n"
173 " MOV R1, R4 \n"
174 " LDR R0, [R3] \n"
175 " MOV R2, #0 \n"
176 " BL sub_FFB1F028 /*_ReceiveMessageQueue*/ \n"
177 " TST R0, #1 \n"
178 " BEQ loc_FFB0ABB0 \n"
179 " LDR R0, =0xFFB0A474 /*'SsShootTask.c'*/ \n"
180 " MOV R1, #0x400 \n"
181 " BL _DebugAssert \n"
182 " BL _ExitTask \n"
183 " ADD SP, SP, #4 \n"
184 " LDMFD SP!, {R4,PC} \n"
185 " MOV PC, LR \n"
186 );
187 }
188
189
190
191 void __attribute__((naked,noinline)) sub_FFB0A6F4_my() {
192 asm volatile (
193 " STMFD SP!, {R4,R5,LR} \n"
194 " LDR R3, =0xBE160 \n"
195 " LDR R5, [R0, #0xC] \n"
196 " LDR R1, [R3, #0x24] \n"
197 " LDR R2, [R5, #8] \n"
198 " CMP R1, #0 \n"
199 " ORR R2, R2, #1 \n"
200 " STR R2, [R5, #8] \n"
201 " BNE loc_FFB0A748 \n"
202 " MOV R0, #0xC \n"
203 " BL sub_FFB14C44 \n"
204 " TST R0, #1 \n"
205 " BEQ loc_FFB0A748 \n"
206 " LDR R3, [R5, #8] \n"
207 " MOV R0, #1 \n"
208 " ORR R3, R3, #0x40000000 \n"
209 " STR R3, [R5, #8] \n"
210
211 "loc_FFB0A738:\n"
212 " MOV R2, R5 \n"
213 " MOV R1, #1 \n"
214 " LDMFD SP!, {R4,R5,LR} \n"
215 " B sub_FFB08E9C \n"
216
217 "loc_FFB0A748:\n"
218 " LDR R4, =0xBE160 \n"
219 " BL sub_FFB0B1EC \n"
220 " LDR R3, [R4, #0x24] \n"
221 " CMP R3, #0 \n"
222 " BNE loc_FFB0A790 \n"
223 " MOV R0, R5 \n"
224 " BL sub_FFB0C3D0 \n"
225 " TST R0, #1 \n"
226 " BNE loc_FFB0A738 \n"
227 " BL sub_FF82668C \n"
228 " BL sub_FF81BEA8 \n"
229 " STR R0, [R5, #0x14] \n"
230 " MOV R0, R5 \n"
231 " BL sub_FFB0D7B4 \n"
232 " BL sub_FFB0E1A8 \n"
233 " MOV R0, R5 \n"
234 " BL sub_FFB0D8CC_my \n"
235 " BL capt_seq_hook_raw_here\n"
236 " B loc_FFB0A7A4 \n"
237
238 "loc_FFB0A790:\n"
239 " LDR R3, =0xCF60 \n"
240 " LDR R2, [R3] \n"
241 " CMP R2, #0 \n"
242 " MOVNE R0, #0x1D \n"
243 " MOVEQ R0, #0 \n"
244
245 "loc_FFB0A7A4:\n"
246 " MOV R1, #1 \n"
247 " MOV R2, R5 \n"
248 " BL sub_FFB08E9C \n"
249 " BL sub_FFB0DC48 \n"
250 " CMP R0, #0 \n"
251 " LDRNE R3, [R5, #8] \n"
252 " ORRNE R3, R3, #0x2000 \n"
253 " STRNE R3, [R5, #8] \n"
254 " LDMFD SP!, {R4,R5,PC} \n"
255 );
256 }
257
258
259
260 void __attribute__((naked,noinline)) sub_FFB0D8CC_my() {
261 asm volatile (
262 " STMFD SP!, {R4,LR} \n"
263 " MOV R4, R0 \n"
264 " SUB SP, SP, #0xC \n"
265 " BL sub_FFB0E33C \n"
266 " MVN R1, #0 \n"
267 " BL sub_FFB1EAAC /*_ClearEventFlag*/ \n"
268 " MOV R0, #0x8A \n"
269 " ADD R1, SP, #4 \n"
270 " MOV R2, #4 \n"
271 " BL _GetPropertyCase \n"
272 " TST R0, #1 \n"
273 " BEQ loc_FFB0D90C \n"
274 " MOV R1, #0x1D0 \n"
275 " LDR R0, =0xFFB0D750 /*'SsCaptureSeq.c'*/ \n"
276 " ADD R1, R1, #2 \n"
277 " BL _DebugAssert \n"
278
279 "loc_FFB0D90C:\n"
280 " LDR R3, =0xBE160 \n"
281 " LDR R2, =0xBE220 \n"
282 " LDR R0, [R3, #0x7C] \n"
283 " LDRSH R1, [R2, #0xE] \n"
284 " BL sub_FFA44DE0 \n"
285 " MOV R0, R4 \n"
286 " BL sub_FFB0D6D4 \n"
287 " BL wait_until_remote_button_is_released\n"
288 " BL capt_seq_hook_set_nr\n"
289 " LDR PC, =0xFFB0D928 \n"
290 );
291 }
292
293
294
295 void __attribute__((naked,noinline)) exp_drv_task() {
296 asm volatile (
297 " STMFD SP!, {R4-R8,LR} \n"
298 " SUB SP, SP, #0x20 \n"
299 " ADD R7, SP, #4 \n"
300 " B loc_FF975110 \n"
301
302 "loc_FF974C10:\n"
303 " CMP R2, #0x22 \n"
304 " BNE loc_FF974C28 \n"
305 " LDR R0, [R12, #0x8C] \n"
306 " MOV LR, PC \n"
307 " LDR PC, [R12, #0x88] \n"
308 " B loc_FF974C8C \n"
309
310 "loc_FF974C28:\n"
311 " CMP R2, #0x1D \n"
312 " BNE loc_FF974C3C \n"
313 " MOV R0, R12 \n"
314 " BL sub_FF974AD0 \n"
315 " B loc_FF974C7C \n"
316
317 "loc_FF974C3C:\n"
318 " CMP R2, #0x1E \n"
319 " BNE loc_FF974C50 \n"
320 " MOV R0, R12 \n"
321 " BL sub_FF974B2C \n"
322 " B loc_FF974C7C \n"
323
324 "loc_FF974C50:\n"
325 " SUB R3, R2, #0x1F \n"
326 " CMP R3, #1 \n"
327 " BHI loc_FF974C68 \n"
328 " MOV R0, R12 \n"
329 " BL sub_FF974B88 \n"
330 " B loc_FF974C7C \n"
331
332 "loc_FF974C68:\n"
333 " CMP R2, #0x21 \n"
334 " BNE loc_FF974C98 \n"
335 " BL sub_FF93AC60 \n"
336 " BL sub_FF93DD98 \n"
337 " BL sub_FF93CFD0 \n"
338
339 "loc_FF974C7C:\n"
340 " LDR R3, [SP, #4] \n"
341 " LDR R0, [R3, #0x8C] \n"
342 " MOV LR, PC \n"
343 " LDR PC, [R3, #0x88] \n"
344
345 "loc_FF974C8C:\n"
346 " LDR R0, [SP, #4] \n"
347 " BL sub_FF9705CC \n"
348 " B loc_FF975110 \n"
349
350 "loc_FF974C98:\n"
351 " CMP R2, #0xD \n"
352 " MOV R8, #1 \n"
353 " BNE loc_FF974D08 \n"
354 " LDR R1, [R12, #0x7C] \n"
355 " ADD R1, R1, R1, LSL#1 \n"
356 " ADD R1, R12, R1, LSL#2 \n"
357 " ADD R6, SP, #0x14 \n"
358 " SUB R1, R1, #8 \n"
359 " MOV R2, #0xC \n"
360 " MOV R0, R6 \n"
361 " BL _memcpy \n"
362 " LDR R0, [SP, #4] \n"
363 " BL sub_FF97307C \n"
364 " LDR R3, [SP, #4] \n"
365 " LDR R1, [R3, #0x7C] \n"
366 " LDR R2, [R3, #0x8C] \n"
367 " ADD R0, R3, #4 \n"
368 " MOV LR, PC \n"
369 " LDR PC, [R3, #0x88] \n"
370 " LDR R0, [SP, #4] \n"
371 " BL sub_FF97334C \n"
372 " LDR R3, [SP, #4] \n"
373 " ADD R0, R3, #4 \n"
374 " LDR R1, [R3, #0x7C] \n"
375 " LDR R2, [R3, #0x94] \n"
376 " MOV LR, PC \n"
377 " LDR PC, [R3, #0x90] \n"
378 " B loc_FF975058 \n"
379
380 "loc_FF974D08:\n"
381 " SUB R3, R2, #0xE \n"
382 " CMP R3, #1 \n"
383 " BHI loc_FF974DC4 \n"
384 " ADD R6, SP, #0x14 \n"
385 " ADD R5, SP, #8 \n"
386 " MOV R0, R12 \n"
387 " MOV R1, R6 \n"
388 " MOV R2, R5 \n"
389 " BL sub_FF973440 \n"
390 " MOV R4, R0 \n"
391 " CMP R4, #5 \n"
392 " CMPNE R4, #1 \n"
393 " BNE loc_FF974D5C \n"
394 " LDR R12, [SP, #4] \n"
395 " MOV R0, R5 \n"
396 " LDR R1, [R12, #0x7C] \n"
397 " MOV R2, R4 \n"
398 " LDR R3, [R12, #0x8C] \n"
399 " MOV LR, PC \n"
400 " LDR PC, [R12, #0x88] \n"
401 " B loc_FF974D94 \n"
402
403 "loc_FF974D5C:\n"
404 " CMP R4, #6 \n"
405 " CMPNE R4, #2 \n"
406 " BNE loc_FF974DA4 \n"
407 " LDR R12, [SP, #4] \n"
408 " MOV R0, R5 \n"
409 " MOV R1, R8 \n"
410 " MOV R2, R4 \n"
411 " LDR R3, [R12, #0x8C] \n"
412 " MOV LR, PC \n"
413 " LDR PC, [R12, #0x88] \n"
414 " MOV R1, R6 \n"
415 " LDR R0, [SP, #4] \n"
416 " MOV R2, R5 \n"
417 " BL sub_FF974700 \n"
418
419 "loc_FF974D94:\n"
420 " MOV R1, R4 \n"
421 " LDR R0, [SP, #4] \n"
422 " BL sub_FF974A64 \n"
423 " B loc_FF975058 \n"
424
425 "loc_FF974DA4:\n"
426 " LDR R12, [SP, #4] \n"
427 " MOV R2, R4 \n"
428 " ADD R0, R12, #4 \n"
429 " LDR R1, [R12, #0x7C] \n"
430 " LDR R3, [R12, #0x8C] \n"
431 " MOV LR, PC \n"
432 " LDR PC, [R12, #0x88] \n"
433 " B loc_FF975058 \n"
434
435 "loc_FF974DC4:\n"
436 " SUB R3, R2, #0x19 \n"
437 " CMP R3, #1 \n"
438 " BHI loc_FF974E1C \n"
439 " LDR R1, [R12, #0x7C] \n"
440 " ADD R1, R1, R1, LSL#1 \n"
441 " ADD R1, R12, R1, LSL#2 \n"
442 " ADD R6, SP, #0x14 \n"
443 " SUB R1, R1, #8 \n"
444 " MOV R2, #0xC \n"
445 " MOV R0, R6 \n"
446 " BL _memcpy \n"
447 " LDR R0, [SP, #4] \n"
448 " BL sub_FF972530 \n"
449 " LDR R3, [SP, #4] \n"
450 " ADD R0, R3, #4 \n"
451 " LDR R1, [R3, #0x7C] \n"
452 " LDR R2, [R3, #0x8C] \n"
453 " MOV LR, PC \n"
454 " LDR PC, [R3, #0x88] \n"
455 " LDR R0, [SP, #4] \n"
456 " BL sub_FF972850 \n"
457 " B loc_FF975058 \n"
458
459 "loc_FF974E1C:\n"
460 " ADD R6, SP, #0x14 \n"
461 " ADD R1, R12, #4 \n"
462 " MOV R2, #0xC \n"
463 " MOV R0, R6 \n"
464 " BL _memcpy \n"
465 " LDR R12, [SP, #4] \n"
466 " LDR R3, [R12] \n"
467 " MOV R2, R12 \n"
468 " CMP R3, #0x1C \n"
469 " LDRLS PC, [PC, R3, LSL#2] \n"
470 " B loc_FF975044 \n"
471 " .long loc_FF974EBC \n"
472 " .long loc_FF974EC8 \n"
473 " .long loc_FF974ED4 \n"
474 " .long loc_FF974ED4 \n"
475 " .long loc_FF974EBC \n"
476 " .long loc_FF974EC8 \n"
477 " .long loc_FF974ED4 \n"
478 " .long loc_FF974ED4 \n"
479 " .long loc_FF974EF8 \n"
480 " .long loc_FF974EF8 \n"
481 " .long loc_FF975018 \n"
482 " .long loc_FF975024 \n"
483 " .long loc_FF975034 \n"
484 " .long loc_FF975044 \n"
485 " .long loc_FF975044 \n"
486 " .long loc_FF975044 \n"
487 " .long loc_FF974EE0 \n"
488 " .long loc_FF974EEC \n"
489 " .long loc_FF974F08 \n"
490 " .long loc_FF974F14 \n"
491 " .long loc_FF974F4C \n"
492 " .long loc_FF974F84 \n"
493 " .long loc_FF974FBC \n"
494 " .long loc_FF974FF4 \n"
495 " .long loc_FF974FF4 \n"
496 " .long loc_FF975044 \n"
497 " .long loc_FF975044 \n"
498 " .long loc_FF975000 \n"
499 " .long loc_FF97500C \n"
500
501 "loc_FF974EBC:\n"
502 " MOV R0, R2 \n"
503 " BL sub_FF970F2C \n"
504 " B loc_FF975040 \n"
505
506 "loc_FF974EC8:\n"
507 " MOV R0, R2 \n"
508 " BL sub_FF9711D0 \n"
509 " B loc_FF975040 \n"
510
511 "loc_FF974ED4:\n"
512 " MOV R0, R2 \n"
513 " BL sub_FF971444 \n"
514 " B loc_FF975040 \n"
515
516 "loc_FF974EE0:\n"
517 " MOV R0, R2 \n"
518 " BL sub_FF971740 \n"
519 " B loc_FF975040 \n"
520
521 "loc_FF974EEC:\n"
522 " MOV R0, R2 \n"
523 " BL sub_FF9719A8 \n"
524 " B loc_FF975040 \n"
525
526 "loc_FF974EF8:\n"
527 " MOV R0, R2 \n"
528 " BL sub_FF971BA8_my \n"
529 " MOV R8, #0 \n"
530 " B loc_FF975040 \n"
531
532 "loc_FF974F08:\n"
533 " MOV R0, R2 \n"
534 " BL sub_FF971D08 \n"
535 " B loc_FF975040 \n"
536
537 "loc_FF974F14:\n"
538 " LDRH R1, [R2, #4] \n"
539 " LDR R3, =0x2C6E8 \n"
540 " STRH R1, [SP, #0x14] \n"
541 " LDRH R1, [R3, #6] \n"
542 " STRH R1, [SP, #0x1A] \n"
543 " LDRH R1, [R3, #2] \n"
544 " STRH R1, [SP, #0x16] \n"
545 " LDRH R3, [R3, #4] \n"
546 " STRH R3, [SP, #0x18] \n"
547 " MOV R0, R2 \n"
548 " LDRH R2, [R2, #0xC] \n"
549 " STRH R2, [SP, #0x1C] \n"
550 " BL sub_FF972000 \n"
551 " B loc_FF975040 \n"
552
553 "loc_FF974F4C:\n"
554 " MOV R0, R2 \n"
555 " LDRH R2, [R2, #4] \n"
556 " LDR R3, =0x2C6E8 \n"
557 " STRH R2, [SP, #0x14] \n"
558 " LDRH R2, [R3, #8] \n"
559 " STRH R2, [SP, #0x1C] \n"
560 " LDRH R1, [R3, #2] \n"
561 " STRH R1, [SP, #0x16] \n"
562 " LDRH R2, [R3, #4] \n"
563 " STRH R2, [SP, #0x18] \n"
564 " LDRH R3, [R3, #6] \n"
565 " STRH R3, [SP, #0x1A] \n"
566 " BL sub_FF972128 \n"
567 " B loc_FF975040 \n"
568
569 "loc_FF974F84:\n"
570 " LDR R3, =0x2C6E8 \n"
571 " LDRH R1, [R3] \n"
572 " STRH R1, [SP, #0x14] \n"
573 " MOV R0, R2 \n"
574 " LDRH R2, [R2, #6] \n"
575 " STRH R2, [SP, #0x16] \n"
576 " LDRH R2, [R3, #8] \n"
577 " STRH R2, [SP, #0x1C] \n"
578 " LDRH R1, [R3, #4] \n"
579 " STRH R1, [SP, #0x18] \n"
580 " LDRH R3, [R3, #6] \n"
581 " STRH R3, [SP, #0x1A] \n"
582 " BL sub_FF9721EC \n"
583 " B loc_FF975040 \n"
584
585 "loc_FF974FBC:\n"
586 " LDR R3, =0x2C6E8 \n"
587 " LDRH R1, [R3, #6] \n"
588 " STRH R1, [SP, #0x1A] \n"
589 " LDRH R1, [R3] \n"
590 " STRH R1, [SP, #0x14] \n"
591 " LDRH R1, [R3, #2] \n"
592 " STRH R1, [SP, #0x16] \n"
593 " LDRH R3, [R3, #4] \n"
594 " STRH R3, [SP, #0x18] \n"
595 " MOV R0, R2 \n"
596 " LDRH R2, [R2, #0xC] \n"
597 " STRH R2, [SP, #0x1C] \n"
598 " BL sub_FF9722A4 \n"
599 " B loc_FF975040 \n"
600
601 "loc_FF974FF4:\n"
602 " MOV R0, R2 \n"
603 " BL sub_FF972354 \n"
604 " B loc_FF975040 \n"
605
606 "loc_FF975000:\n"
607 " MOV R0, R2 \n"
608 " BL sub_FF97299C \n"
609 " B loc_FF975040 \n"
610
611 "loc_FF97500C:\n"
612 " MOV R0, R2 \n"
613 " BL sub_FF972B98 \n"
614 " B loc_FF975040 \n"
615
616 "loc_FF975018:\n"
617 " MOV R0, R2 \n"
618 " BL sub_FF972D54 \n"
619 " B loc_FF975040 \n"
620
621 "loc_FF975024:\n"
622 " MOV R0, R2 \n"
623 " MOV R1, #0 \n"
624 " BL sub_FF972F3C \n"
625 " B loc_FF975040 \n"
626
627 "loc_FF975034:\n"
628 " MOV R0, R2 \n"
629 " MOV R1, #1 \n"
630 " BL sub_FF972F3C \n"
631
632 "loc_FF975040:\n"
633 " LDR R12, [SP, #4] \n"
634
635 "loc_FF975044:\n"
636 " ADD R0, R12, #4 \n"
637 " LDR R1, [R12, #0x7C] \n"
638 " LDR R2, [R12, #0x8C] \n"
639 " MOV LR, PC \n"
640 " LDR PC, [R12, #0x88] \n"
641
642 "loc_FF975058:\n"
643 " CMP R8, #1 \n"
644 " BNE loc_FF975080 \n"
645 " LDR R1, [SP, #4] \n"
646 " LDR R3, [R1, #0x7C] \n"
647 " ADD R3, R3, R3, LSL#1 \n"
648 " ADD R1, R1, R3, LSL#2 \n"
649 " MOV R0, R6 \n"
650 " SUB R1, R1, #8 \n"
651 " BL sub_FF970BE4 \n"
652 " B loc_FF9750FC \n"
653
654 "loc_FF975080:\n"
655 " LDR R3, [SP, #4] \n"
656 " LDR R2, [R3] \n"
657 " CMP R2, #9 \n"
658 " BNE loc_FF9750C8 \n"
659 " MOV R4, #0 \n"
660 " MOV R1, #1 \n"
661 " MOV R2, R1 \n"
662 " MOV R3, R1 \n"
663 " MOV R0, R4 \n"
664 " STR R4, [SP] \n"
665 " BL sub_FF970B28 \n"
666 " MOV R1, #1 \n"
667 " MOV R0, R4 \n"
668 " MOV R2, R1 \n"
669 " MOV R3, R1 \n"
670 " STR R4, [SP] \n"
671 " BL sub_FF970D80 \n"
672 " B loc_FF9750FC \n"
673
674 "loc_FF9750C8:\n"
675 " MOV R4, #1 \n"
676 " MOV R0, R4 \n"
677 " MOV R1, R4 \n"
678 " MOV R2, R4 \n"
679 " MOV R3, R4 \n"
680 " STR R4, [SP] \n"
681 " BL sub_FF970B28 \n"
682 " MOV R0, R4 \n"
683 " MOV R1, R0 \n"
684 " MOV R2, R0 \n"
685 " MOV R3, R0 \n"
686 " STR R4, [SP] \n"
687 " BL sub_FF970D80 \n"
688
689 "loc_FF9750FC:\n"
690 " LDR R2, =0x2C734 \n"
691 " MOV R3, #0 \n"
692 " LDR R0, [SP, #4] \n"
693 " STR R3, [R2] \n"
694 " BL sub_FF9705CC \n"
695
696 "loc_FF975110:\n"
697 " LDR R3, =0x2C6DC \n"
698 " MOV R2, #0 \n"
699 " LDR R0, [R3] \n"
700 " MOV R1, R7 \n"
701 " BL sub_FFB1F028 /*_ReceiveMessageQueue*/ \n"
702 " LDR R12, [SP, #4] \n"
703 " LDR R2, [R12] \n"
704 " CMP R2, #0x23 \n"
705 " BNE loc_FF974C10 \n"
706 " MOV R0, R12 \n"
707 " BL sub_FF9705CC \n"
708 " LDR R3, =0x2C6D8 \n"
709 " MOV R1, #1 \n"
710 " LDR R0, [R3] \n"
711 " BL sub_FFB1E910 /*_SetEventFlag*/ \n"
712 " BL _ExitTask \n"
713 " ADD SP, SP, #0x20 \n"
714 " LDMFD SP!, {R4-R8,PC} \n"
715 );
716 }
717
718
719
720 void __attribute__((naked,noinline)) sub_FF971BA8_my() {
721 asm volatile (
722 " STMFD SP!, {R4-R6,LR} \n"
723 " LDR R3, =0x2C6D8 \n"
724 " MOV R4, R0 \n"
725 " MOV R1, #0x3E \n"
726 " LDR R0, [R3] \n"
727 " BL sub_FFB1EAAC /*_ClearEventFlag*/ \n"
728 " MOV R1, #0 \n"
729 " LDRSH R0, [R4, #4] \n"
730 " BL sub_FF970700 \n"
731 " MOV R6, R0 \n"
732 " LDRSH R0, [R4, #6] \n"
733 " BL sub_FF970868 \n"
734 " LDRSH R0, [R4, #8] \n"
735 " BL sub_FF970904 \n"
736 " LDRSH R0, [R4, #0xA] \n"
737 " BL sub_FF9709A0 \n"
738 " LDRSH R0, [R4, #0xC] \n"
739 " BL sub_FF970A3C \n"
740 " LDR R3, [R4] \n"
741 " CMP R3, #9 \n"
742 " MOV R5, R0 \n"
743 " MOVEQ R5, #0 \n"
744 " MOVEQ R6, R5 \n"
745 " CMP R6, #1 \n"
746 " BNE loc_FF971C2C \n"
747 " MOV R2, #2 \n"
748 " LDRSH R0, [R4, #4] \n"
749 " LDR R1, =0xFF970620 \n"
750 " BL sub_FFAE502C \n"
751 " LDR R2, =0x2C728 \n"
752 " MOV R3, #0 \n"
753 " STR R3, [R2] \n"
754 " B loc_FF971C30 \n"
755
756 "loc_FF971C2C:\n"
757 " BL sub_FF970AD8 \n"
758
759 "loc_FF971C30:\n"
760 " STRH R0, [R4, #4] \n"
761 " CMP R5, #1 \n"
762 " BNE loc_FF971C50 \n"
763 " LDRSH R0, [R4, #0xC] \n"
764 " LDR R1, =0xFF9706E4 \n"
765 " MOV R2, #0x20 \n"
766 " BL sub_FF970ECC \n"
767 " B loc_FF971C54 \n"
768
769 "loc_FF971C50:\n"
770 " BL sub_FF970B18 \n"
771
772 "loc_FF971C54:\n"
773 " STRH R0, [R4, #0xC] \n"
774 " LDRSH R0, [R4, #6] \n"
775 " BL sub_FF93A8DC_my \n"
776 " LDRSH R0, [R4, #8] \n"
777 " MOV R1, #1 \n"
778 " BL sub_FF93CB90 \n"
779 " ADD R0, R4, #8 \n"
780 " MOV R1, #0 \n"
781 " BL sub_FF93CC50 \n"
782 " LDRSH R0, [R4, #0xE] \n"
783 " BL sub_FF95ECAC \n"
784 " CMP R6, #1 \n"
785 " BNE loc_FF971CB8 \n"
786 " LDR R3, =0x2C6D8 \n"
787 " MOV R2, #0xBB0 \n"
788 " LDR R0, [R3] \n"
789 " MOV R1, #2 \n"
790 " ADD R2, R2, #8 \n"
791 " BL sub_FFB1E900 /*_WaitForAllEventFlag*/ \n"
792 " TST R0, #1 \n"
793 " BEQ loc_FF971CB8 \n"
794 " MOV R1, #0x4A0 \n"
795 " LDR R0, =0xFF970578 /*'ExpDrv.c'*/ \n"
796 " ADD R1, R1, #3 \n"
797 " BL _DebugAssert \n"
798
799 "loc_FF971CB8:\n"
800 " CMP R5, #1 \n"
801 " LDMNEFD SP!, {R4-R6,PC} \n"
802 " LDR R3, =0x2C6D8 \n"
803 " MOV R2, #0xBB0 \n"
804 " LDR R0, [R3] \n"
805 " MOV R1, #0x20 \n"
806 " ADD R2, R2, #8 \n"
807 " BL sub_FFB1E900 /*_WaitForAllEventFlag*/ \n"
808 " TST R0, #1 \n"
809 " LDMEQFD SP!, {R4-R6,PC} \n"
810 " MOV R1, #0x4A0 \n"
811 " LDR R0, =0xFF970578 /*'ExpDrv.c'*/ \n"
812 " ADD R1, R1, #8 \n"
813 " LDMFD SP!, {R4-R6,LR} \n"
814 " B _DebugAssert \n"
815 );
816 }
817
818
819
820 void __attribute__((naked,noinline)) sub_FF93A8DC_my() {
821 asm volatile (
822 " STMFD SP!, {R4,LR} \n"
823 " LDR R3, =0x64F4 \n"
824 " LDR R2, [R3] \n"
825 " MOV R1, #0x168 \n"
826 " MOV R3, R0, LSL#16 \n"
827 " CMP R2, #1 \n"
828 " ADD R1, R1, #3 \n"
829 " LDR R0, =0xFF93A0F8 /*'Shutter.c'*/ \n"
830 " MOV R4, R3, ASR#16 \n"
831 " BEQ loc_FF93A908 \n"
832 " BL _DebugAssert \n"
833
834 "loc_FF93A908:\n"
835 " MOV R1, #0x170 \n"
836 " CMN R4, #0xC00 \n"
837 " LDR R3, =0x13266 \n"
838 " LDR R0, =0xFF93A0F8 /*'Shutter.c'*/ \n"
839 " ADD R1, R1, #1 \n"
840 " LDREQSH R4, [R3] \n"
841 " LDRNE R3, =0x13266 \n"
842 " CMN R4, #0xC00 \n"
843 " STRH R4, [R3] \n"
844 " BNE loc_FF93A934 \n"
845 " BL _DebugAssert \n"
846
847 "loc_FF93A934:\n"
848 " MOV R0, R4 \n"
849 " BL apex2us \n"
850 " LDR PC, =0xFF93A93C \n"
851 );
852 }