root/platform/ixus970_sd890/sub/100f/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. CreateTask_spytask
  2. taskCreateHook
  3. boot
  4. sub_FF8101A4_my
  5. sub_FF810FA0_my
  6. uHwSetup_my
  7. CreateTask_Startup_my
  8. task_Startup_my
  9. init_file_modules_task
  10. sub_FF86D844_my
  11. sub_FF84EF30_my
  12. sub_FF84ED6C_my
  13. sub_FF84EAFC_my
  14. jogdial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 const char * const new_sa = &_end;
   9 
  10 void __attribute__((naked,noinline)) jogdial_task_my();
  11 
  12 /*----------------------------------------------------------------------
  13     CreateTask_spytask
  14 -----------------------------------------------------------------------*/
  15 void CreateTask_spytask() {
  16         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  17 };
  18 
  19 
  20 
  21 void taskCreateHook(int *p)
  22 {
  23         p-=16;
  24         if (p[0]==0xFF821ACC)  p[0]=(int)mykbd_task;
  25         if (p[0]==0xFF842A40)  p[0]=(int)jogdial_task_my; 
  26         if (p[0]==0xFF859F88)  p[0]=(int)movie_record_task;
  27         if (p[0]==0xFF85DFC0)  p[0]=(int)capt_seq_task;
  28         if (p[0]==0xFF878F08)  p[0]=(int)init_file_modules_task;
  29         if (p[0]==0xFF8B67E8)  p[0]=(int)exp_drv_task;
  30         if (p[0]==0xFFA101b8)  p[0]=(int)filewritetask;
  31 }
  32 
  33 void boot()
  34 {
  35         long *canon_data_src = (void*)0xFFB1E468;
  36         long *canon_data_dst = (void*)0x1900;
  37         long canon_data_len = 0xF164 - 0x1900; // data_end - data_start
  38         long *canon_bss_start = (void*)0xF164; // just after data
  39         long canon_bss_len = 0xCBD40 - 0xF164;
  40 
  41     long i;
  42 
  43 
  44     // Enable CPU caches and MPU
  45     asm volatile (
  46     "MRC     p15, 0, R0,c1,c0\n"
  47     "ORR     R0, R0, #0x1000\n"
  48     "ORR     R0, R0, #4\n"
  49     "ORR     R0, R0, #1\n"
  50     "MCR     p15, 0, R0,c1,c0\n"
  51     :::"r0");
  52 
  53     for(i=0;i<canon_data_len/4;i++)
  54     canon_data_dst[i]=canon_data_src[i];
  55 
  56     for(i=0;i<canon_bss_len/4;i++)
  57     canon_bss_start[i]=0;
  58 
  59     // jump to init-sequence that follows the data-copy-routine
  60     asm volatile ("B      sub_FF8101A4_my\n");
  61 };
  62 
  63 
  64 /*************************************************************/
  65 //** sub_FF8101A4_my @ 0xFF8101A4 - 0xFF81020C, length=27
  66 void __attribute__((naked,noinline)) sub_FF8101A4_my() {
  67     //http://chdk.setepontos.com/index.php/topic,4194.0.html
  68     *(int*)0x1930=(int)taskCreateHook;
  69 
  70     // replacement of sub_FF8423E4 for correct power-on.
  71     //(short press = playback mode, long press = record mode)
  72     *(int*)(0x2290)= (*(int*)0xC02200F8) & 1 ? 0x100000 : 0x200000;
  73     
  74 asm volatile (
  75 "    LDR     R0, =0xFF81021C \n"
  76 "    MOV     R1, #0 \n"
  77 "    LDR     R3, =0xFF810254 \n"
  78 
  79 "loc_FF8101B0:\n"
  80 "    CMP     R0, R3 \n"
  81 "    LDRCC   R2, [R0], #4 \n"
  82 "    STRCC   R2, [R1], #4 \n"
  83 "    BCC     loc_FF8101B0 \n"
  84 "    LDR     R0, =0xFF810254 \n"
  85 "    MOV     R1, #0x4B0 \n"
  86 "    LDR     R3, =0xFF810468 \n"
  87 
  88 "loc_FF8101CC:\n"
  89 "    CMP     R0, R3 \n"
  90 "    LDRCC   R2, [R0], #4 \n"
  91 "    STRCC   R2, [R1], #4 \n"
  92 "    BCC     loc_FF8101CC \n"
  93 "    MOV     R0, #0xD2 \n"
  94 "    MSR     CPSR_cxsf, R0 \n"
  95 "    MOV     SP, #0x1000 \n"
  96 "    MOV     R0, #0xD3 \n"
  97 "    MSR     CPSR_cxsf, R0 \n"
  98 "    MOV     SP, #0x1000 \n"
  99 "    LDR     R0, =0x6C4 \n"
 100 "    LDR     R2, =0xEEEEEEEE \n"
 101 "    MOV     R3, #0x1000 \n"
 102 
 103 "loc_FF810200:\n"
 104 "    CMP     R0, R3 \n"
 105 "    STRCC   R2, [R0], #4 \n"
 106 "    BCC     loc_FF810200 \n"
 107 "    BL      sub_FF810FA0_my \n"  // --> Patched. Old value = 0xFF810FA0.
 108 );
 109 }
 110 
 111 /*************************************************************/
 112 //** sub_FF810FA0_my @ 0xFF810FA0 - 0xFF811040, length=41
 113 void __attribute__((naked,noinline)) sub_FF810FA0_my() {
 114 asm volatile (
 115 "    STR     LR, [SP, #-4]! \n"
 116 "    SUB     SP, SP, #0x74 \n"
 117 "    MOV     R0, SP \n"
 118 "    MOV     R1, #0x74 \n"
 119 "    BL      sub_FFAAD9B4 \n"
 120 "    MOV     R0, #0x53000 \n"
 121 "    STR     R0, [SP, #4] \n"
 122 
 123 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 124 "    LDR     R0, =0xCBD40 \n"
 125 #else
 126 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 127 "    LDR     R0, [R0]\n"      //
 128 #endif
 129 
 130 "    LDR     R2, =0x279C00 \n"
 131 "    LDR     R1, =0x272968 \n"
 132 "    STR     R0, [SP, #8] \n"
 133 "    SUB     R0, R1, R0 \n"
 134 "    ADD     R3, SP, #0xC \n"
 135 "    STR     R2, [SP] \n"
 136 "    STMIA   R3, {R0-R2} \n"
 137 "    MOV     R0, #0x22 \n"
 138 "    STR     R0, [SP, #0x18] \n"
 139 "    MOV     R0, #0x68 \n"
 140 "    STR     R0, [SP, #0x1C] \n"
 141 "    LDR     R0, =0x19B \n"
 142 "    MOV     R1, #0x64 \n"
 143 "    STRD    R0, [SP, #0x20] \n"
 144 "    MOV     R0, #0x78 \n"
 145 "    STRD    R0, [SP, #0x28] \n"
 146 "    MOV     R0, #0 \n"
 147 "    STR     R0, [SP, #0x30] \n"
 148 "    STR     R0, [SP, #0x34] \n"
 149 "    MOV     R0, #0x10 \n"
 150 "    STR     R0, [SP, #0x5C] \n"
 151 "    MOV     R0, #0x800 \n"
 152 "    STR     R0, [SP, #0x60] \n"
 153 "    MOV     R0, #0xA0 \n"
 154 "    STR     R0, [SP, #0x64] \n"
 155 "    MOV     R0, #0x280 \n"
 156 "    STR     R0, [SP, #0x68] \n"
 157 "    LDR     R1, =uHwSetup_my \n"  // --> Patched. Old value = 0xFF814DA4.
 158 "    MOV     R0, SP \n"
 159 "    MOV     R2, #0 \n"
 160 "    BL      sub_FF812D58 \n"
 161 "    ADD     SP, SP, #0x74 \n"
 162 "    LDR     PC, [SP], #4 \n"
 163 );
 164 }
 165 
 166 /*************************************************************/
 167 //** uHwSetup_my @ 0xFF814DA4 - 0xFF814E18, length=30
 168 void __attribute__((naked,noinline)) uHwSetup_my() {
 169 asm volatile (
 170 "    STMFD   SP!, {R4,LR} \n"
 171 "    BL      sub_FF81094C \n"
 172 "    BL      sub_FF819664 \n"
 173 "    CMP     R0, #0 \n"
 174 "    LDRLT   R0, =0xFF814EB8 /*'dmSetup'*/ \n"
 175 "    BLLT    _err_init_task \n"
 176 "    BL      sub_FF8149C8 \n"
 177 "    CMP     R0, #0 \n"
 178 "    LDRLT   R0, =0xFF814EC0 /*'termDriverInit'*/ \n"
 179 "    BLLT    _err_init_task \n"
 180 "    LDR     R0, =0xFF814ED0 /*'/_term'*/ \n"
 181 "    BL      sub_FF814AB4 \n"
 182 "    CMP     R0, #0 \n"
 183 "    LDRLT   R0, =0xFF814ED8 /*'termDeviceCreate'*/ \n"
 184 "    BLLT    _err_init_task \n"
 185 "    LDR     R0, =0xFF814ED0 /*'/_term'*/ \n"
 186 "    BL      sub_FF813564 \n"
 187 "    CMP     R0, #0 \n"
 188 "    LDRLT   R0, =0xFF814EEC /*'stdioSetup'*/ \n"
 189 "    BLLT    _err_init_task \n"
 190 "    BL      sub_FF8191EC \n"
 191 "    CMP     R0, #0 \n"
 192 "    LDRLT   R0, =0xFF814EF8 /*'stdlibSetup'*/ \n"
 193 "    BLLT    _err_init_task \n"
 194 "    BL      sub_FF8114B8 \n"
 195 "    CMP     R0, #0 \n"
 196 "    LDRLT   R0, =0xFF814F04 /*'armlib_setup'*/ \n"
 197 "    BLLT    _err_init_task \n"
 198 "    LDMFD   SP!, {R4,LR} \n"
 199 "    B       CreateTask_Startup_my \n"  // --> Patched. Old value = 0xFF81CCBC.
 200 );
 201 }
 202 
 203 /*************************************************************/
 204 //** CreateTask_Startup_my @ 0xFF81CCBC - 0xFF81CD28, length=28
 205 void __attribute__((naked,noinline)) CreateTask_Startup_my() {
 206 asm volatile (
 207 "    STMFD   SP!, {R3,LR} \n"
 208 //"  BL      _sub_FF8423DC \n"  // --> Nullsub call removed.
 209 "    BL      sub_FF829EDC \n"
 210 "    CMP     R0, #0 \n"
 211 "    BNE     loc_FF81CCEC \n"
 212 "    BL      sub_FF842398 \n"
 213 "    CMP     R0, #0 \n"
 214 "    BNE     loc_FF81CCEC \n"
 215 "    LDR     R1, =0xC0220000 \n"
 216 "    MOV     R0, #0x44 \n"
 217 "    STR     R0, [R1, #0x4C] \n"
 218 
 219 "loc_FF81CCE8:\n"
 220 "    B       loc_FF81CCE8 \n"
 221 
 222 "loc_FF81CCEC:\n"
 223 //"  BL      _sub_FF8423E4 \n"  // Removed for correct power-on
 224 //"  BL      _sub_FF8423E0 \n"  // --> Nullsub call removed.
 225 "    BL      sub_FF828264 \n"
 226 "    LDR     R1, =0x2CE000 \n"
 227 "    MOV     R0, #0 \n"
 228 "    BL      sub_FF8284AC \n"
 229 "    BL      sub_FF828458 \n"
 230 "    MOV     R3, #0 \n"
 231 "    STR     R3, [SP] \n"
 232 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81CC60.
 233 "    MOV     R2, #0 \n"
 234 "    MOV     R1, #0x19 \n"
 235 "    LDR     R0, =0xFF81CD34 /*'Startup'*/ \n"
 236 "    BL      _CreateTask \n"
 237 "    MOV     R0, #0 \n"
 238 "    LDMFD   SP!, {R12,PC} \n"
 239 );
 240 }
 241 
 242 /*************************************************************/
 243 //** task_Startup_my @ 0xFF81CC60 - 0xFF81CCB8, length=23
 244 void __attribute__((naked,noinline)) task_Startup_my() {
 245 asm volatile (
 246 "    STMFD   SP!, {R4,LR} \n"
 247 "    BL      sub_FF81516C \n"
 248 "    BL      sub_FF822D50 \n"
 249 "    BL      sub_FF81FDF0 \n"
 250 "    BL      sub_FF842984 \n"
 251 "    BL      sub_FF82A0E4 \n"
 252 //"  BL      _StartDiskboot \n"  // load DISKBOOT.BIN
 253 "    BL      CreateTask_spytask\n" // added
 254 "    BL      sub_FF875668 \n"
 255 "    BL      sub_FF82A134 \n"
 256 "    BL      sub_FF8277A4 \n"
 257 "    BL      sub_FF82A29C \n"
 258 "    BL      sub_FF821B00 \n"
 259 "    BL      sub_FF824CB8 \n"
 260 "    BL      sub_FF82A2B4 \n"
 261 //"  BL      _sub_FF81FB10 \n"  // --> Nullsub call removed.
 262 "    BL      sub_FF820FBC \n"
 263 "    BL      sub_FF829CA4 \n"
 264 "    BL      sub_FF821630 \n"
 265 "    BL      _taskcreate_TempCheck \n"
 266 "    BL      sub_FF82AD58 \n"
 267 "    BL      sub_FF820E68 \n"
 268 "    LDMFD   SP!, {R4,LR} \n"
 269 "    B       sub_FF815070 \n"
 270 );
 271 }
 272 
 273 /*************************************************************/
 274 //** init_file_modules_task @ 0xFF878F08 - 0xFF878F3C, length=14
 275 void __attribute__((naked,noinline)) init_file_modules_task() {
 276 asm volatile (
 277 "    STMFD   SP!, {R4-R6,LR} \n"
 278 "    BL      sub_FF86D818 \n"
 279 "    LDR     R5, =0x5006 \n"
 280 "    MOVS    R4, R0 \n"
 281 "    MOVNE   R1, #0 \n"
 282 "    MOVNE   R0, R5 \n"
 283 "    BLNE    _PostLogicalEventToUI \n"
 284 "    BL      sub_FF86D844_my \n"  // --> Patched. Old value = 0xFF86D844.
 285 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 286 "    CMP     R4, #0 \n"
 287 "    MOVEQ   R0, R5 \n"
 288 "    LDMEQFD SP!, {R4-R6,LR} \n"
 289 "    MOVEQ   R1, #0 \n"
 290 "    BEQ     _PostLogicalEventToUI \n"
 291 "    LDMFD   SP!, {R4-R6,PC} \n"
 292 );
 293 }
 294 
 295 /*************************************************************/
 296 //** sub_FF86D844_my @ 0xFF86D844 - 0xFF86D87C, length=15
 297 void __attribute__((naked,noinline)) sub_FF86D844_my() {
 298 asm volatile (
 299 "    STMFD   SP!, {R4,LR} \n"
 300 "    BL      sub_FF84EF30_my \n"  // --> Patched. Old value = 0xFF84EF30.
 301 "    LDR     R4, =0x57D0 \n"
 302 "    LDR     R0, [R4, #4] \n"
 303 "    CMP     R0, #0 \n"
 304 "    BNE     loc_FF86D874 \n"
 305 "    BL      sub_FF881A84 \n"
 306 "    BL      sub_FF9052F8 \n"
 307 "    BL      sub_FF881A84 \n"
 308 "    BL      sub_FF84C920 \n"
 309 "    BL      sub_FF881A94 \n"
 310 "    BL      sub_FF9053C4 \n"
 311 
 312 "loc_FF86D874:\n"
 313 "    MOV     R0, #1 \n"
 314 "    STR     R0, [R4] \n"
 315 "    LDMFD   SP!, {R4,PC} \n"
 316 );
 317 }
 318 
 319 /*************************************************************/
 320 //** sub_FF84EF30_my @ 0xFF84EF30 - 0xFF84EFC8, length=39
 321 void __attribute__((naked,noinline)) sub_FF84EF30_my() {
 322 asm volatile (
 323 "    STMFD   SP!, {R4-R6,LR} \n"
 324 "    MOV     R6, #0 \n"
 325 "    MOV     R0, R6 \n"
 326 "    BL      sub_FF84E9F0 \n"
 327 "    LDR     R4, =0x118C0 \n"
 328 "    MOV     R5, #0 \n"
 329 "    LDR     R0, [R4, #0x38] \n"
 330 "    BL      sub_FF84F424 \n"
 331 "    CMP     R0, #0 \n"
 332 "    LDREQ   R0, =0x29D4 \n"
 333 "    STREQ   R5, [R0, #0x10] \n"
 334 "    STREQ   R5, [R0, #0x14] \n"
 335 "    STREQ   R5, [R0, #0x18] \n"
 336 "    MOV     R0, R6 \n"
 337 "    BL      sub_FF84EA30 \n"
 338 "    MOV     R0, R6 \n"
 339 "    BL      sub_FF84ED6C_my \n"  // --> Patched. Old value = 0xFF84ED6C.
 340 "    MOV     R5, R0 \n"
 341 "    MOV     R0, R6 \n"
 342 "    BL      sub_FF84EDD8 \n"
 343 "    LDR     R1, [R4, #0x3C] \n"
 344 "    AND     R2, R5, R0 \n"
 345 "    CMP     R1, #0 \n"
 346 "    MOV     R0, #0 \n"
 347 "    MOVEQ   R0, #0x80000001 \n"
 348 "    BEQ     loc_FF84EFC4 \n"
 349 "    LDR     R3, [R4, #0x2C] \n"
 350 "    CMP     R3, #2 \n"
 351 "    MOVEQ   R0, #4 \n"
 352 "    CMP     R1, #5 \n"
 353 "    ORRNE   R0, R0, #1 \n"
 354 "    BICEQ   R0, R0, #1 \n"
 355 "    CMP     R2, #0 \n"
 356 "    BICEQ   R0, R0, #2 \n"
 357 "    ORREQ   R0, R0, #0x80000000 \n"
 358 "    BICNE   R0, R0, #0x80000000 \n"
 359 "    ORRNE   R0, R0, #2 \n"
 360 
 361 "loc_FF84EFC4:\n"
 362 "    STR     R0, [R4, #0x40] \n"
 363 "    LDMFD   SP!, {R4-R6,PC} \n"
 364 );
 365 }
 366 
 367 /*************************************************************/
 368 //** sub_FF84ED6C_my @ 0xFF84ED6C - 0xFF84EDD4, length=27
 369 void __attribute__((naked,noinline)) sub_FF84ED6C_my() {
 370 asm volatile (
 371 "    STMFD   SP!, {R4-R6,LR} \n"
 372 "    LDR     R5, =0x29D4 \n"
 373 "    MOV     R6, R0 \n"
 374 "    LDR     R0, [R5, #0x14] \n"
 375 "    CMP     R0, #0 \n"
 376 "    MOVNE   R0, #1 \n"
 377 "    LDMNEFD SP!, {R4-R6,PC} \n"
 378 "    MOV     R0, #0x17 \n"
 379 "    MUL     R1, R0, R6 \n"
 380 "    LDR     R0, =0x118C0 \n"
 381 "    ADD     R4, R0, R1, LSL#2 \n"
 382 "    LDR     R0, [R4, #0x38] \n"
 383 "    MOV     R1, R6 \n"
 384 "    BL      sub_FF84EAFC_my \n"  // --> Patched. Old value = 0xFF84EAFC.
 385 "    CMP     R0, #0 \n"
 386 "    LDMEQFD SP!, {R4-R6,PC} \n"
 387 "    LDR     R0, [R4, #0x38] \n"
 388 "    MOV     R1, R6 \n"
 389 "    BL      sub_FF84EC64 \n"
 390 "    CMP     R0, #0 \n"
 391 "    LDMEQFD SP!, {R4-R6,PC} \n"
 392 "    MOV     R0, R6 \n"
 393 "    BL      sub_FF84E5F8 \n"
 394 "    CMP     R0, #0 \n"
 395 "    MOVNE   R1, #1 \n"
 396 "    STRNE   R1, [R5, #0x14] \n"
 397 "    LDMFD   SP!, {R4-R6,PC} \n"
 398 );
 399 }
 400 
 401 /*************************************************************/
 402 //** sub_FF84EAFC_my @ 0xFF84EAFC - 0xFF84EC60, length=90
 403 void __attribute__((naked,noinline)) sub_FF84EAFC_my() {
 404 asm volatile (
 405 "    STMFD   SP!, {R4-R8,LR} \n"
 406 "    MOV     R8, R0 \n"
 407 "    MOV     R0, #0x17 \n"
 408 "    MUL     R1, R0, R1 \n"
 409 "    LDR     R0, =0x118C0 \n"
 410 "    MOV     R6, #0 \n"
 411 "    ADD     R7, R0, R1, LSL#2 \n"
 412 "    LDR     R0, [R7, #0x3C] \n"
 413 "    MOV     R5, #0 \n"
 414 "    CMP     R0, #6 \n"
 415 "    ADDLS   PC, PC, R0, LSL#2 \n"
 416 "    B       loc_FF84EC48 \n"
 417 "    B       loc_FF84EB60 \n"
 418 "    B       loc_FF84EB48 \n"
 419 "    B       loc_FF84EB48 \n"
 420 "    B       loc_FF84EB48 \n"
 421 "    B       loc_FF84EB48 \n"
 422 "    B       loc_FF84EC40 \n"
 423 "    B       loc_FF84EB48 \n"
 424 
 425 "loc_FF84EB48:\n"
 426 "    MOV     R2, #0 \n"
 427 "    MOV     R1, #0x200 \n"
 428 "    MOV     R0, #3 \n"
 429 "    BL      sub_FF8679C4 \n"
 430 "    MOVS    R4, R0 \n"
 431 "    BNE     loc_FF84EB68 \n"
 432 
 433 "loc_FF84EB60:\n"
 434 "    MOV     R0, #0 \n"
 435 "    LDMFD   SP!, {R4-R8,PC} \n"
 436 
 437 "loc_FF84EB68:\n"
 438 "    LDR     R12, [R7, #0x4C] \n"
 439 "    MOV     R3, R4 \n"
 440 "    MOV     R2, #1 \n"
 441 "    MOV     R1, #0 \n"
 442 "    MOV     R0, R8 \n"
 443 "    BLX     R12 \n"
 444 "    CMP     R0, #1 \n"
 445 "    BNE     loc_FF84EB94 \n"
 446 "    MOV     R0, #3 \n"
 447 "    BL      sub_FF867B04 \n"
 448 "    B       loc_FF84EB60 \n"
 449 
 450 "loc_FF84EB94:\n"
 451 "    MOV     R0, R8 \n"
 452 "    BL      sub_FF922B20 \n"
 453 
 454 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 455 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 456 
 457 // Start of DataGhost's FAT32 autodetection code
 458 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 459 // According to the code below, we can use R1, R2, R3 and R12.
 460 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 461 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 462 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 463 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 464 "    MOV     R1, #1\n"              // Note the current partition number
 465 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 466 "dg_sd_fat32:\n"
 467 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 468 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 469 "    ADD     R12, R12, #0x10\n"     // Second partition
 470 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 471 "dg_sd_fat32_enter:\n"
 472 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 473 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 474 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 475 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 476 "    CMPNE   R3, #0x7\n"            // exFat?
 477 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 478 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 479 "    CMPNE   R2, #0x80\n"
 480 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 481                                     // This partition is valid, it's the first one, bingo!
 482 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 483 
 484 "dg_sd_fat32_end:\n"
 485 // End of DataGhost's FAT32 autodetection code
 486 
 487 "    LDRB    R1, [R4, #0x1C9] \n"
 488 "    LDRB    R3, [R4, #0x1C8] \n"
 489 "    LDRB    R12, [R4, #0x1CC] \n"
 490 "    MOV     R1, R1, LSL#24 \n"
 491 "    ORR     R1, R1, R3, LSL#16 \n"
 492 "    LDRB    R3, [R4, #0x1C7] \n"
 493 "    LDRB    R2, [R4, #0x1BE] \n"
 494 //"  LDRB    LR, [R4, #0x1FF] \n"
 495 "    ORR     R1, R1, R3, LSL#8 \n"
 496 "    LDRB    R3, [R4, #0x1C6] \n"
 497 "    CMP     R2, #0 \n"
 498 "    CMPNE   R2, #0x80 \n"
 499 "    ORR     R1, R1, R3 \n"
 500 "    LDRB    R3, [R4, #0x1CD] \n"
 501 "    MOV     R3, R3, LSL#24 \n"
 502 "    ORR     R3, R3, R12, LSL#16 \n"
 503 "    LDRB    R12, [R4, #0x1CB] \n"
 504 "    ORR     R3, R3, R12, LSL#8 \n"
 505 "    LDRB    R12, [R4, #0x1CA] \n"
 506 "    ORR     R3, R3, R12 \n"
 507 //"  LDRB    R12, [R4, #0x1FE] \n"  // Replaced, see below
 508 //mod start
 509 "    LDRB    R12, [LR,#0x1FE]\n"           // New! First MBR signature byte (0x55)
 510 "    LDRB    LR, [LR,#0x1FF]\n"            //      Last MBR signature byte (0xAA)
 511 //mod end
 512 "    MOV     R4, #0 \n"
 513 "    BNE     loc_FF84EC1C \n"
 514 "    CMP     R0, R1 \n"
 515 "    BCC     loc_FF84EC1C \n"
 516 "    ADD     R2, R1, R3 \n"
 517 "    CMP     R2, R0 \n"
 518 "    CMPLS   R12, #0x55 \n"
 519 "    CMPEQ   LR, #0xAA \n"
 520 "    MOVEQ   R6, R1 \n"
 521 "    MOVEQ   R5, R3 \n"
 522 "    MOVEQ   R4, #1 \n"
 523 
 524 "loc_FF84EC1C:\n"
 525 "    MOV     R0, #3 \n"
 526 "    BL      sub_FF867B04 \n"
 527 "    CMP     R4, #0 \n"
 528 "    BNE     loc_FF84EC54 \n"
 529 "    MOV     R6, #0 \n"
 530 "    MOV     R0, R8 \n"
 531 "    BL      sub_FF922B20 \n"
 532 "    MOV     R5, R0 \n"
 533 "    B       loc_FF84EC54 \n"
 534 
 535 "loc_FF84EC40:\n"
 536 "    MOV     R5, #0x40 \n"
 537 "    B       loc_FF84EC54 \n"
 538 
 539 "loc_FF84EC48:\n"
 540 "    MOV     R1, #0x374 \n"
 541 "    LDR     R0, =0xFF84EAF0 /*'Mounter.c'*/ \n"
 542 "    BL      _DebugAssert \n"
 543 
 544 "loc_FF84EC54:\n"
 545 "    STR     R6, [R7, #0x44]! \n"
 546 "    MOV     R0, #1 \n"
 547 "    STR     R5, [R7, #4] \n"
 548 "    LDMFD   SP!, {R4-R8,PC} \n"
 549 );
 550 }
 551 
 552 /*************************************************************/
 553 //** jogdial_task_my @ 0xFF842A40 - 0xFF842B38, length=63
 554 void __attribute__((naked,noinline)) jogdial_task_my() {
 555 asm volatile (
 556 "    STMFD   SP!, {R3-R11,LR} \n"
 557 "    BL      sub_FF842BF0 \n"
 558 "    LDR     R11, =0x80000B01 \n"
 559 "    LDR     R8, =0xFFAB1744 \n"
 560 "    LDR     R7, =0xC0240000 \n"
 561 "    LDR     R6, =0x22A0 \n"
 562 "    MOV     R9, #1 \n"
 563 "    MOV     R10, #0 \n"
 564 
 565 "loc_FF842A60:\n"
 566 "    LDR     R3, =0x1A1 \n"
 567 "    LDR     R0, [R6, #0xC] \n"
 568 "    LDR     R2, =0xFF842C98 /*'JogDial.c'*/ \n"
 569 "    MOV     R1, #0 \n"
 570 "    BL      sub_FF81BBD8 /*_TakeSemaphoreStrictly*/ \n"
 571 "    MOV     R0, #0x28 \n"
 572 "    BL      _SleepTask \n"
 573 //------------------  added code ---------------------
 574 "labelA:\n"
 575 "    LDR     R0, =jogdial_stopped\n"
 576 "    LDR     R0, [R0]\n"
 577 "    CMP     R0, #1\n"
 578 "    BNE     labelB\n"
 579 "    MOV     R0, #40\n"
 580 "    BL      _SleepTask\n"
 581 "    B       labelA\n"
 582 "labelB:\n"
 583 //------------------  original code ------------------
 584 
 585 "    LDR     R0, [R7, #0x104] \n"
 586 "    MOV     R0, R0, ASR#16 \n"
 587 "    STRH    R0, [R6] \n"
 588 "    LDRSH   R2, [R6, #2] \n"
 589 "    SUB     R1, R0, R2 \n"
 590 "    CMP     R1, #0 \n"
 591 "    BEQ     loc_FF842B24 \n"
 592 "    MOV     R5, R1 \n"
 593 "    RSBLT   R5, R5, #0 \n"
 594 "    MOVLE   R4, #0 \n"
 595 "    MOVGT   R4, #1 \n"
 596 "    CMP     R5, #0xFF \n"
 597 "    BLS     loc_FF842AD8 \n"
 598 "    CMP     R1, #0 \n"
 599 "    RSBLE   R1, R2, #0xFF \n"
 600 "    ADDLE   R1, R1, #0x7F00 \n"
 601 "    ADDLE   R0, R1, R0 \n"
 602 "    RSBGT   R0, R0, #0xFF \n"
 603 "    ADDGT   R0, R0, #0x7F00 \n"
 604 "    ADDGT   R0, R0, R2 \n"
 605 "    ADD     R5, R0, #0x8000 \n"
 606 "    ADD     R5, R5, #1 \n"
 607 "    EOR     R4, R4, #1 \n"
 608 
 609 "loc_FF842AD8:\n"
 610 "    LDR     R0, [R6, #0x14] \n"
 611 "    CMP     R0, #0 \n"
 612 "    BEQ     loc_FF842B1C \n"
 613 "    LDR     R0, [R6, #0x1C] \n"
 614 "    CMP     R0, #0 \n"
 615 "    BEQ     loc_FF842B04 \n"
 616 "    LDR     R1, [R8, R4, LSL#2] \n"
 617 "    CMP     R1, R0 \n"
 618 "    BEQ     loc_FF842B0C \n"
 619 "    LDR     R0, =0xB01 \n"
 620 "    BL      sub_FF8750A0 \n"
 621 
 622 "loc_FF842B04:\n"
 623 "    MOV     R0, R11 \n"
 624 "    BL      sub_FF8750A0 \n"
 625 
 626 "loc_FF842B0C:\n"
 627 "    LDR     R0, [R8, R4, LSL#2] \n"
 628 "    MOV     R1, R5 \n"
 629 "    STR     R0, [R6, #0x1C] \n"
 630 "    BL      sub_FF874FE8 \n"
 631 
 632 "loc_FF842B1C:\n"
 633 "    LDRH    R0, [R6] \n"
 634 "    STRH    R0, [R6, #2] \n"
 635 
 636 "loc_FF842B24:\n"
 637 "    STR     R10, [R7, #0x100] \n"
 638 "    STR     R9, [R7, #0x108] \n"
 639 "    LDR     R0, [R6, #0x10] \n"
 640 "    CMP     R0, #0 \n"
 641 "    BLNE    _SleepTask \n"
 642 "    B       loc_FF842A60 \n"
 643 );
 644 }

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