This source file includes following definitions.
- filewritetask
- sub_FF36D018_my
- sub_FF36D6D4_my
- sub_FF36D1A4_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6
7 typedef struct {
8 unsigned int address;
9 unsigned int length;
10 } cam_ptp_data_chunk;
11
12 #define MAX_CHUNKS_FOR_FWT 7
13
14
15
16
17
18
19
20 typedef struct
21 {
22 int unkn1;
23 int file_offset;
24 int full_size;
25 int unkn2, unkn3;
26 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
27 int seek_flag;
28 int unkn4, unkn5;
29 char name[32];
30 } fwt_data_struct;
31
32
33
34
35
36 #define FWT_MUSTSEEK 0x40
37 #define FWT_SEEKMASK 0x40
38
39 #include "../../../generic/filewrite.c"
40
41
42
43 void __attribute__((naked,noinline)) filewritetask() {
44 asm volatile (
45 " STMFD SP!, {R1-R7,LR} \n"
46 " LDR R5, =0x11628 \n"
47 " MOV R6, #0 \n"
48
49 "loc_FF36D338:\n"
50 " LDR R0, [R5, #0x10] \n"
51 " MOV R2, #0 \n"
52 " ADD R1, SP, #8 \n"
53 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
54 " CMP R0, #0 \n"
55 " MOVNE R1, #0x3EC \n"
56 " LDRNE R0, =0xFF36D4F8 /*'dwFWrite.c'*/ \n"
57 " BLNE _DebugAssert \n"
58 " LDR R0, [SP, #8] \n"
59 " LDR R1, [R0] \n"
60 " CMP R1, #0xD \n"
61 " ADDCC PC, PC, R1, LSL#2 \n"
62 " B loc_FF36D338 \n"
63 " B loc_FF36D4C0 \n"
64 " B loc_FF36D4C0 \n"
65 " B loc_FF36D4C0 \n"
66 " B loc_FF36D4C0 \n"
67 " B loc_FF36D4C0 \n"
68 " B loc_FF36D4C0 \n"
69 " B loc_FF36D4C0 \n"
70 " B loc_FF36D4C8 \n"
71 " B loc_FF36D3A0 \n"
72 " B loc_FF36D43C \n"
73 " B loc_FF36D46C \n"
74 " B loc_FF36D408 \n"
75 " B loc_FF36D434 \n"
76
77 "loc_FF36D3A0:\n"
78 " MOV R4, R5 \n"
79 " STR R6, [SP] \n"
80
81 "loc_FF36D3A8:\n"
82 " LDR R0, [R4, #0x10] \n"
83 " MOV R1, SP \n"
84 " BL sub_0068C024 /*_GetNumberOfPostedMessages*/ \n"
85 " LDR R0, [SP] \n"
86 " CMP R0, #0 \n"
87 " BEQ loc_FF36D3D4 \n"
88 " LDR R0, [R4, #0x10] \n"
89 " MOV R2, #0 \n"
90 " ADD R1, SP, #4 \n"
91 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
92 " B loc_FF36D3A8 \n"
93
94 "loc_FF36D3D4:\n"
95 " LDR R0, [R4, #4] \n"
96 " CMN R0, #1 \n"
97 " BEQ loc_FF36D3FC \n"
98 " BL fwt_close \n"
99 " MVN R0, #0 \n"
100 " STR R0, [R4, #4] \n"
101 " LDR R0, =0x18BAF8 \n"
102 " BL sub_FF072D20 \n"
103 " MOV R1, #0 \n"
104 " BL sub_FF070F70 \n"
105
106 "loc_FF36D3FC:\n"
107 " LDR R0, [R4, #0xC] \n"
108 " BL _GiveSemaphore \n"
109 " B loc_FF36D338 \n"
110
111 "loc_FF36D408:\n"
112 " MOV R4, R0 \n"
113 " ADD R0, R0, #0x58 \n"
114 " BL sub_FF072D20 \n"
115 " MOV R1, #0 \n"
116 " BL sub_FF070E34 \n"
117 " LDR R0, [R4, #0xC] \n"
118 " BL sub_FF000370 \n"
119 " ADD R0, R4, #0x58 \n"
120
121 " LDR R3, =ignore_current_write\n"
122 " LDR R3, [R3]\n"
123 " CMP R3, #0\n"
124 " BNE loc_A\n"
125
126 " BL sub_FF01D168 \n"
127 " ADD R0, R4, #0x58 \n"
128 " B loc_FF36D4A0 \n"
129
130 "loc_FF36D434:\n"
131 " BL sub_FF36D018_my \n"
132 " B loc_FF36D338 \n"
133
134 "loc_FF36D43C:\n"
135 " LDR R1, [R0, #4] \n"
136 " MOV R4, R0 \n"
137 " LDR R0, [R5, #4] \n"
138 " MOV R2, #0 \n"
139 " BL fwt_lseek \n"
140 " CMN R0, #1 \n"
141 " LDREQ R0, =0x9200013 \n"
142 " MOVEQ R1, R4 \n"
143 " STREQ R0, [R4, #0x10] \n"
144 " MOVEQ R0, #7 \n"
145 " BLEQ sub_FF36CF58 \n"
146 " B loc_FF36D338 \n"
147
148 "loc_FF36D46C:\n"
149 " MOV R4, R0 \n"
150 " LDRSB R0, [R0, #0x58] \n"
151 " CMP R0, #0 \n"
152 " BEQ loc_FF36D338 \n"
153 " STRB R0, [SP, #4] \n"
154 " ADD R0, R4, #0x58 \n"
155 " STRB R6, [SP, #5] \n"
156 " BL sub_FF072D20 \n"
157 " MOV R1, #0 \n"
158 " BL sub_FF070E34 \n"
159
160 " LDR R3, =ignore_current_write\n"
161 " LDR R3, [R3]\n"
162 " CMP R3, #0\n"
163 " BNE loc_B\n"
164
165 " ADD R0, SP, #4 \n"
166 " BL sub_FF06FD38 \n"
167 "loc_B:\n"
168 " ADD R0, R4, #0x58 \n"
169
170 "loc_FF36D4A0:\n"
171 "loc_A:\n"
172 " BL sub_FF072D20 \n"
173 " LDR R1, [R5, #0x18] \n"
174 " BL sub_FF070F70 \n"
175 " LDR R1, [R5, #0x14] \n"
176 " CMP R1, #0 \n"
177 " LDRNE R0, [R4, #0x10] \n"
178 " BLXNE R1 \n"
179 " B loc_FF36D338 \n"
180
181 "loc_FF36D4C0:\n"
182 " BL sub_FF36D6D4_my \n"
183 " B loc_FF36D338 \n"
184
185 "loc_FF36D4C8:\n"
186 " BL sub_FF36D1A4_my \n"
187 " B loc_FF36D338 \n"
188 );
189 }
190
191
192
193 void __attribute__((naked,noinline)) sub_FF36D018_my() {
194 asm volatile (
195 " STMFD SP!, {R4-R8,LR} \n"
196 " MOV R4, R0 \n"
197
198
199 " BL filewrite_main_hook\n"
200 " MOV R0, R4\n"
201
202 " LDR R0, [R0, #0x4C] \n"
203 " SUB SP, SP, #0x38 \n"
204 " TST R0, #1 \n"
205 " BEQ loc_FF36D174 \n"
206 " ADD R0, R4, #0x58 \n"
207 " BL sub_FF072D20 \n"
208 " MOV R1, #0 \n"
209 " BL sub_FF070E34 \n"
210 " LDR R0, [R4, #0xC] \n"
211 " BL sub_FF000370 \n"
212 " LDR R0, [R4, #0x4C] \n"
213 " LDR R5, =0x301 \n"
214 " TST R0, #0x10 \n"
215 " MOVNE R5, #9 \n"
216 " BNE loc_FF36D064 \n"
217 " TST R0, #0x40 \n"
218 " MOVNE R5, #1 \n"
219
220 "loc_FF36D064:\n"
221 " TST R0, #0x20 \n"
222 " BNE loc_FF36D078 \n"
223 " LDR R0, [R4, #0x54] \n"
224 " CMP R0, #1 \n"
225 " BNE loc_FF36D07C \n"
226
227 "loc_FF36D078:\n"
228 " ORR R5, R5, #0x8000 \n"
229
230 "loc_FF36D07C:\n"
231 " LDR R8, =0x1B6 \n"
232 " ADD R7, R4, #0x58 \n"
233 " LDR R6, [R4, #0xC] \n"
234 " MOV R2, R8 \n"
235 " MOV R1, R5 \n"
236 " MOV R0, R7 \n"
237 " BL fwt_open \n"
238 " CMN R0, #1 \n"
239 " BNE loc_FF36D0FC \n"
240 " MOV R0, R7 \n"
241 " BL sub_FF01D168 \n"
242 " MOV R2, #0xF \n"
243 " MOV R1, R7 \n"
244 " MOV R0, SP \n"
245 " BL sub_00690174 \n"
246 " MOV R0, #0 \n"
247 " LDR R1, =0x41FF \n"
248 " STRB R0, [SP, #0xF] \n"
249 " STR R1, [SP, #0x20] \n"
250 " MOV R1, #0x10 \n"
251 " STR R0, [SP, #0x28] \n"
252 " STR R1, [SP, #0x24] \n"
253 " ADD R1, SP, #0x20 \n"
254 " MOV R0, SP \n"
255 " STR R6, [SP, #0x2C] \n"
256 " STR R6, [SP, #0x30] \n"
257 " STR R6, [SP, #0x34] \n"
258 " BL sub_FF0707B0 \n"
259 " MOV R2, R8 \n"
260 " MOV R1, R5 \n"
261 " MOV R0, R7 \n"
262 " BL _Open \n"
263
264 "loc_FF36D0FC:\n"
265 " LDR R6, =0x11628 \n"
266 " CMN R0, #1 \n"
267 " MOV R5, R0 \n"
268 " STR R0, [R6, #4] \n"
269 " BNE loc_FF36D13C \n"
270 " ADD R0, R4, #0x58 \n"
271 " BL sub_FF072D20 \n"
272 " LDR R1, [R6, #0x18] \n"
273 " BL sub_FF070F70 \n"
274 " LDR R1, [R6, #0x14] \n"
275 " CMP R1, #0 \n"
276 " BEQ loc_FF36D19C \n"
277 " ADD SP, SP, #0x38 \n"
278 " LDMFD SP!, {R4-R8,LR} \n"
279 " LDR R0, =0x9200001 \n"
280 " BX R1 \n"
281
282 "loc_FF36D13C:\n"
283 " LDR R0, =0x18BAF8 \n"
284 " MOV R2, #0x20 \n"
285 " ADD R1, R4, #0x58 \n"
286 " BL sub_0069035C \n"
287
288
289 " LDR R3, =current_write_ignored\n"
290 " LDR R3, [R3]\n"
291 " CMP R3, #0\n"
292 " BNE loc_C\n"
293
294
295 " LDR R0, [R4, #0x4C] \n"
296 " TST R0, #0x80 \n"
297 " BEQ loc_FF36D174 \n"
298 " LDR R1, [R4, #8] \n"
299 " MOV R0, R5 \n"
300 " BL sub_FF01CE38 \n"
301 " CMP R0, #0 \n"
302 " MOVEQ R1, R4 \n"
303 " MOVEQ R0, #7 \n"
304 " BEQ loc_FF36D198 \n"
305
306 "loc_FF36D174:\n"
307 "loc_C:\n"
308 " LDR R0, [R4, #0x4C] \n"
309 " TST R0, #0x40 \n"
310 " LDREQ R0, [R4, #4] \n"
311 " CMPEQ R0, #0 \n"
312 " MOVNE R1, R4 \n"
313 " MOVNE R0, #9 \n"
314 " BLNE sub_FF36CF58 \n"
315 " MOV R1, R4 \n"
316 " MOV R0, #0 \n"
317
318 "loc_FF36D198:\n"
319 " BL sub_FF36CF58 \n"
320
321 "loc_FF36D19C:\n"
322 " ADD SP, SP, #0x38 \n"
323 " LDMFD SP!, {R4-R8,PC} \n"
324 );
325 }
326
327
328
329 void __attribute__((naked,noinline)) sub_FF36D6D4_my() {
330 asm volatile (
331 " STMFD SP!, {R4-R10,LR} \n"
332 " MOV R5, R0 \n"
333 " LDR R0, [R0] \n"
334 " CMP R0, #6 \n"
335 " BHI loc_FF36D700 \n"
336 " ADD R0, R5, R0, LSL#3 \n"
337 " LDR R8, [R0, #0x14]! \n"
338 " LDR R7, [R0, #4] \n"
339 " CMP R7, #0 \n"
340 " BNE loc_FF36D718 \n"
341 " B loc_FF36D70C \n"
342
343 "loc_FF36D700:\n"
344 " LDR R1, =0x341 \n"
345 " LDR R0, =0xFF36D4F8 /*'dwFWrite.c'*/ \n"
346 " BL _DebugAssert \n"
347
348 "loc_FF36D70C:\n"
349 " MOV R1, R5 \n"
350 " MOV R0, #7 \n"
351 " B loc_FF36D7AC \n"
352
353 "loc_FF36D718:\n"
354 " LDR R9, =0x11628 \n"
355 " MOV R4, R7 \n"
356
357 "loc_FF36D720:\n"
358 " LDR R0, [R5, #4] \n"
359 " CMP R4, #0x1000000 \n"
360 " MOVLS R6, R4 \n"
361 " MOVHI R6, #0x1000000 \n"
362 " BIC R1, R0, #0xFF000000 \n"
363 " CMP R1, #0 \n"
364 " BICNE R0, R0, #0xFF000000 \n"
365 " RSBNE R0, R0, #0x1000000 \n"
366 " CMPNE R6, R0 \n"
367 " MOVHI R6, R0 \n"
368 " LDR R0, [R9, #4] \n"
369 " MOV R2, R6 \n"
370 " MOV R1, R8 \n"
371 " BL fwt_write \n"
372 " LDR R1, [R5, #4] \n"
373 " CMP R6, R0 \n"
374 " ADD R1, R1, R0 \n"
375 " STR R1, [R5, #4] \n"
376 " BEQ loc_FF36D780 \n"
377 " CMN R0, #1 \n"
378 " LDRNE R0, =0x9200015 \n"
379 " LDREQ R0, =0x9200005 \n"
380 " STR R0, [R5, #0x10] \n"
381 " B loc_FF36D70C \n"
382
383 "loc_FF36D780:\n"
384 " SUB R4, R4, R0 \n"
385 " CMP R4, R7 \n"
386 " ADD R8, R8, R0 \n"
387 " MOVCS R1, #0x36C \n"
388 " LDRCS R0, =0xFF36D4F8 /*'dwFWrite.c'*/ \n"
389 " BLCS _DebugAssert \n"
390 " CMP R4, #0 \n"
391 " BNE loc_FF36D720 \n"
392 " LDR R0, [R5] \n"
393 " MOV R1, R5 \n"
394 " ADD R0, R0, #1 \n"
395
396 "loc_FF36D7AC:\n"
397 " LDMFD SP!, {R4-R10,LR} \n"
398 " B sub_FF36CF58 \n"
399 );
400 }
401
402
403
404 void __attribute__((naked,noinline)) sub_FF36D1A4_my() {
405 asm volatile (
406 " STMFD SP!, {R4-R6,LR} \n"
407 " MOV R4, R0 \n"
408 " LDR R0, [R0, #0x4C] \n"
409 " LDR R5, =0x11628 \n"
410 " TST R0, #2 \n"
411 " SUB SP, SP, #0x38 \n"
412 " BEQ sub_FF36D30C \n"
413 " LDR R0, [R5, #4] \n"
414 " CMN R0, #1 \n"
415 " BEQ sub_FF36D1F8 \n"
416 " LDR R1, [R4, #0x54] \n"
417 " LDR R6, =0x9200003 \n"
418 " CMP R1, #1 \n"
419 " BNE loc_FF36D1E4 \n"
420
421
422 " LDR R3, =current_write_ignored\n"
423 " LDR R3, [R3]\n"
424 " CMP R3, #0\n"
425 " BNE loc_D\n"
426
427
428 " BL sub_FF01CB8C \n"
429 " B sub_FF36D1E8 \n"
430
431 "loc_FF36D1E4:\n"
432 "loc_D:\n"
433 " BL fwt_close \n"
434 " LDR PC, =0xFF36D1E8 \n"
435 );
436 }